[igt-dev] [PATCH i-g-t v3 00/12] Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests

[igt-dev] [PATCH i-g-t v3 00/12] Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests

[Zbigniew Kempczyński]

Fix + increase tests coverage.

v2: Minor fixups, drop change in gem_mman (Zbigniew)
v3: Fix wrong condition in gem_mmap_offset/FIXED (Kamil)

Chris Wilson (12):
  lib: Fix off-by-one-page in 48b obj.flags
  lib/i915: Mark gem_create as handling const memory regions
  i915/gem_create: Verify all regions return cleared objects
  i915/gem_create: Stress creation with busy engines
  i915/gem_mmap_offset: Avoid set_domain when I915_MMAP_OFFSET_FIXED is
    used
  i915/gem_mmap_offset: Verify all regions return clear mmaps on
    creation
  i915/gem_mmap_offset: Verify all regions with ptrace
  i915/gem_mmap_offset: Verify all regions remain in isolation
  i915/gem_mmap_offset: Verify all regions have nonblocking pagefaults
  i915/gem_mmap_offset: Check all mmap types reject invalid objects
  i915/gem_mmap_offset: Exercise close race against all types/regions
  i915/gem_mmap_offset: Crudely measure read/write to different mmaps

 lib/i915/intel_memory_region.c |   4 +-
 lib/i915/intel_memory_region.h |   4 +-
 lib/igt_dummyload.c            |  63 +++--
 tests/i915/gem_create.c        | 143 ++++++++---
 tests/i915/gem_mmap_offset.c   | 453 ++++++++++++++++++++++-----------
 5 files changed, 449 insertions(+), 218 deletions(-)

-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 01/12] lib: Fix off-by-one-page in 48b obj.flags

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@linux.intel.com>

The kernel checks that the last byte of the object will fit inside the
32b GTT window unless the object is marked as being suitable for use
with 48b addressing. However, the spinner only checked the start of the
object which depending on the mix of size/alignment, could allow the
object to straddle the 32b boundary and not be marked as 48b capable.

Always set 48b for all the objects where ppGTT merites.

In the process, there was one location where we failed to write the
upper 32b of the address into the instruction.

Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
---
 lib/igt_dummyload.c | 63 ++++++++++++++++++++++-----------------------
 1 file changed, 31 insertions(+), 32 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index dc1bd51e08..17ae21f567 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -100,12 +100,21 @@ emit_recursive_batch(igt_spin_t *spin,
 	struct drm_i915_gem_execbuffer2 *execbuf;
 	struct drm_i915_gem_exec_object2 *obj;
 	unsigned int flags[GEM_MAX_ENGINES];
+	unsigned int objflags = 0;
 	unsigned int nengine;
 	int fence_fd = -1;
-	uint64_t addr, addr_scratch, ahnd = opts->ahnd, objflags = 0;
+	uint64_t addr, addr_scratch, ahnd = opts->ahnd;
 	uint32_t *cs;
 	int i;
 
+	igt_assert(!(opts->ctx && opts->ctx_id));
+
+	r = memset(relocs, 0, sizeof(relocs));
+	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
+	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
+	execbuf->flags = I915_EXEC_NO_RELOC;
+	obj = memset(spin->obj, 0, sizeof(spin->obj));
+
 	/*
 	 * Pick a random location for our spinner et al.
 	 *
@@ -121,8 +130,12 @@ emit_recursive_batch(igt_spin_t *spin,
 	 * that wrap.
 	 */
 
+	addr = gem_aperture_size(fd) / 2;
+	if (addr >> 32)
+		objflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+
 	if (!ahnd) {
-		addr = gem_aperture_size(fd) / 2;
+		addr /= 2;
 		if (addr >> 31)
 			addr = 1u << 31;
 		addr += random() % addr / 2;
@@ -131,8 +144,6 @@ emit_recursive_batch(igt_spin_t *spin,
 		objflags |= EXEC_OBJECT_PINNED;
 	}
 
-	igt_assert(!(opts->ctx && opts->ctx_id));
-
 	nengine = 0;
 	if (opts->engine == ALL_ENGINES) {
 		struct intel_execution_engine2 *engine;
@@ -150,11 +161,6 @@ emit_recursive_batch(igt_spin_t *spin,
 	}
 	igt_require(nengine);
 
-	memset(relocs, 0, sizeof(relocs));
-	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
-	execbuf->flags = I915_EXEC_NO_RELOC;
-	obj = memset(spin->obj, 0, sizeof(spin->obj));
-
 	obj[BATCH].handle =
 		handle_create(fd, BATCH_SIZE, opts->flags, &spin->batch);
 	if (!spin->batch) {
@@ -175,9 +181,7 @@ emit_recursive_batch(igt_spin_t *spin,
 							   BATCH_SIZE, 0,
 							   ALLOC_STRATEGY_LOW_TO_HIGH);
 	obj[BATCH].offset = CANONICAL(addr);
-	obj[BATCH].flags |= objflags;
-	if (obj[BATCH].offset >= (1ull << 32))
-		obj[BATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	obj[BATCH].flags = objflags;
 
 	addr += BATCH_SIZE;
 
@@ -192,27 +196,23 @@ emit_recursive_batch(igt_spin_t *spin,
 
 		obj[SCRATCH].handle = opts->dependency;
 		obj[SCRATCH].offset = CANONICAL(addr_scratch);
-		obj[SCRATCH].flags |= objflags;
-		if (obj[SCRATCH].offset >= (1ull << 32))
-			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+		obj[SCRATCH].flags = objflags;
 
 		if (!(opts->flags & IGT_SPIN_SOFTDEP)) {
 			obj[SCRATCH].flags |= EXEC_OBJECT_WRITE;
 
 			/* dummy write to dependency */
-			r = &relocs[obj[BATCH].relocation_count++];
 			r->presumed_offset = obj[SCRATCH].offset;
 			r->target_handle = obj[SCRATCH].handle;
 			r->offset = sizeof(uint32_t) * 1020;
 			r->delta = 0;
 			r->read_domains = I915_GEM_DOMAIN_RENDER;
 			r->write_domain = I915_GEM_DOMAIN_RENDER;
+			r++;
 		}
 
 		execbuf->buffer_count++;
 	} else if (opts->flags & IGT_SPIN_POLL_RUN) {
-		r = &relocs[obj[BATCH].relocation_count++];
-
 		igt_assert(!opts->dependency);
 
 		if (gen == 4 || gen == 5) {
@@ -244,6 +244,7 @@ emit_recursive_batch(igt_spin_t *spin,
 								   ALLOC_STRATEGY_LOW_TO_HIGH);
 		addr += 4096; /* guard page */
 		obj[SCRATCH].offset = CANONICAL(addr);
+		obj[SCRATCH].flags = objflags;
 		addr += 4096;
 
 		igt_assert_eq(spin->poll[SPIN_POLL_START_IDX], 0);
@@ -253,10 +254,6 @@ emit_recursive_batch(igt_spin_t *spin,
 		r->offset = sizeof(uint32_t) * 1;
 		r->delta = sizeof(uint32_t) * SPIN_POLL_START_IDX;
 
-		obj[SCRATCH].flags |= objflags;
-		if (obj[SCRATCH].offset >= (1ull << 32))
-			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
-
 		*cs++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
 
 		if (gen >= 8) {
@@ -274,6 +271,7 @@ emit_recursive_batch(igt_spin_t *spin,
 		*cs++ = 1;
 
 		execbuf->buffer_count++;
+		r++;
 	}
 
 	spin->handle = obj[BATCH].handle;
@@ -314,8 +312,6 @@ emit_recursive_batch(igt_spin_t *spin,
 	 * no matter how they modify it (from either the GPU or CPU).
 	 */
 	if (gen >= 8) { /* arbitrary cutoff between ring/execlists submission */
-		r = &relocs[obj[BATCH].relocation_count++];
-
 		/*
 		 * On Sandybridge+ the comparison is a strict greater-than:
 		 * if the value at spin->condition is greater than BB_END,
@@ -334,15 +330,17 @@ emit_recursive_batch(igt_spin_t *spin,
 		r->offset = (cs + 2 - spin->batch) * sizeof(*cs);
 		r->read_domains = I915_GEM_DOMAIN_COMMAND;
 		r->delta = (spin->condition - spin->batch) * sizeof(*cs);
+		igt_assert(r->delta < 4096);
 
 		*cs++ = MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE | 2;
 		*cs++ = MI_BATCH_BUFFER_END;
 		*cs++ = r->presumed_offset + r->delta;
-		*cs++ = 0;
+		*cs++ = r->presumed_offset >> 32;
+
+		r++;
 	}
 
 	/* recurse */
-	r = &relocs[obj[BATCH].relocation_count++];
 	r->target_handle = obj[BATCH].handle;
 	r->presumed_offset = obj[BATCH].offset;
 	r->offset = (cs + 1 - spin->batch) * sizeof(*cs);
@@ -363,11 +361,10 @@ emit_recursive_batch(igt_spin_t *spin,
 		*cs = r->presumed_offset + r->delta;
 		cs++;
 	}
-	obj[BATCH].relocs_ptr = to_user_pointer(relocs);
+	r++;
 
 	execbuf->buffers_ptr =
 	       	to_user_pointer(obj + (2 - execbuf->buffer_count));
-	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
 
 	if (opts->flags & IGT_SPIN_FENCE_OUT)
 		execbuf->flags |= I915_EXEC_FENCE_OUT;
@@ -382,14 +379,16 @@ emit_recursive_batch(igt_spin_t *spin,
 		execbuf->rsvd2 = opts->fence;
 	}
 
+	/* For allocator we have to rid of relocation_count */
+	if (!ahnd) {
+		obj[BATCH].relocs_ptr = to_user_pointer(relocs);
+		obj[BATCH].relocation_count = r - relocs;
+	}
+
 	for (i = 0; i < nengine; i++) {
 		execbuf->flags &= ~ENGINE_MASK;
 		execbuf->flags |= flags[i];
 
-		/* For allocator we have to rid of relocation_count */
-		for (int j = 0; j < ARRAY_SIZE(spin->obj) && ahnd; j++)
-			spin->obj[j].relocation_count = 0;
-
 		gem_execbuf_wr(fd, execbuf);
 
 		if (opts->flags & IGT_SPIN_FENCE_OUT) {
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 02/12] lib/i915: Mark gem_create as handling const memory regions

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@linux.intel.com>

Make the memory regions passed to gem_crate_in_memory_region_list() as
being const.

Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 lib/i915/intel_memory_region.c | 4 ++--
 lib/i915/intel_memory_region.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/i915/intel_memory_region.c b/lib/i915/intel_memory_region.c
index 93a18982c1..568bace949 100644
--- a/lib/i915/intel_memory_region.c
+++ b/lib/i915/intel_memory_region.c
@@ -198,7 +198,7 @@ bool gem_has_lmem(int fd)
 /* A version of gem_create_in_memory_region_list which can be allowed to
    fail so that the object creation can be retried */
 int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size, uint32_t flags,
-				       struct drm_i915_gem_memory_class_instance *mem_regions,
+				       const struct drm_i915_gem_memory_class_instance *mem_regions,
 				       int num_regions)
 {
 	struct drm_i915_gem_create_ext_memory_regions ext_regions = {
@@ -234,7 +234,7 @@ int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size,
  * @num_regions: @mem_regions length
  */
 uint32_t gem_create_in_memory_region_list(int fd, uint64_t size, uint32_t flags,
-					  struct drm_i915_gem_memory_class_instance *mem_regions,
+					  const struct drm_i915_gem_memory_class_instance *mem_regions,
 					  int num_regions)
 {
 	uint32_t handle;
diff --git a/lib/i915/intel_memory_region.h b/lib/i915/intel_memory_region.h
index e1bfe0ca65..fd04df83b5 100644
--- a/lib/i915/intel_memory_region.h
+++ b/lib/i915/intel_memory_region.h
@@ -65,11 +65,11 @@ unsigned int gem_get_lmem_region_count(int fd);
 bool gem_has_lmem(int fd);
 
 int __gem_create_in_memory_region_list(int fd, uint32_t *handle, uint64_t *size, uint32_t flags,
-				       struct drm_i915_gem_memory_class_instance *mem_regions,
+				       const struct drm_i915_gem_memory_class_instance *mem_regions,
 				       int num_regions);
 
 uint32_t gem_create_in_memory_region_list(int fd, uint64_t size, uint32_t flags,
-					  struct drm_i915_gem_memory_class_instance *mem_regions,
+					  const struct drm_i915_gem_memory_class_instance *mem_regions,
 					  int num_regions);
 
 /*
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 03/12] i915/gem_create: Verify all regions return cleared objects

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

We do not tolerate leaking stale information in newly created objects, so
make sure the test covers all memory regions.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_create.c | 99 +++++++++++++++++++++++++++++++----------
 1 file changed, 76 insertions(+), 23 deletions(-)

diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index d7d2a01722..114c1c7c9b 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -59,6 +59,7 @@
 #include "i915/gem_create.h"
 #include "i915/gem_engine_topology.h"
 #include "i915/gem_mman.h"
+#include "i915/intel_memory_region.h"
 #include "i915_drm.h"
 
 IGT_TEST_DESCRIPTION("Ensure that basic gem_create and gem_create_ext works"
@@ -145,45 +146,87 @@ static uint64_t get_npages(_Atomic(uint64_t) *global, uint64_t npages)
 
 struct thread_clear {
 	_Atomic(uint64_t) max;
+	struct drm_i915_gem_memory_class_instance region;
 	int timeout;
 	int i915;
 };
 
+static uint32_t batch_create(int i915)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle = gem_create(i915, sizeof(bbe));
+
+	gem_write(i915, handle, 0, &bbe, sizeof(bbe));
+	return handle;
+}
+
+static void make_resident(int i915, uint32_t batch, uint32_t handle)
+{
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		[0] = {
+			.handle = handle,
+			.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
+		},
+		[1] = {
+			.handle = batch ?: batch_create(i915),
+			.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
+		},
+	};
+	struct drm_i915_gem_execbuffer2 eb = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+	int err;
+
+	err = __gem_execbuf(i915, &eb);
+	if (obj[1].handle != batch)
+		gem_close(i915, obj[1].handle);
+
+	igt_assert(err == 0 || err == -E2BIG || err == -ENOSPC);
+}
+
 static void *thread_clear(void *data)
 {
 	struct thread_clear *arg = data;
 	unsigned long checked = 0, total = 0;
-	enum { PRW, GTT, WC, WB, __LAST__ } mode = PRW;
+	enum { PRW, GTT, WC, WB, __LAST__, FIXED } mode = PRW;
 	int i915 = arg->i915;
+	uint32_t batch = batch_create(i915);
+
+	if (__gem_write(i915, 0, 0, 0, 0) == -EOPNOTSUPP)
+		mode = FIXED;
 
 	igt_until_timeout(arg->timeout) {
-		struct drm_i915_gem_create create = {};
-		uint64_t npages;
+		uint64_t npages, size;
+		uint32_t handle;
 		void *ptr;
 
 		npages = random();
 		npages <<= 32;
 		npages |= random();
 		npages = get_npages(&arg->max, npages);
-		create.size = npages << 12;
+		size = npages << 12;
+
+		igt_assert_eq(__gem_create_in_memory_region_list(i915, &handle, &size, 0, &arg->region, 1), 0);
+		if (random() & 1)
+			make_resident(i915, batch, handle);
 
-		create_ioctl(i915, &create);
 		switch (mode) {
+		case FIXED:
+			ptr = __gem_mmap_offset__fixed(i915, handle, 0, size, PROT_READ);
+			break;
 		case __LAST__:
 		case PRW:
 			ptr = NULL;
 			break;
 		case WB:
-			ptr = __gem_mmap__cpu(i915, create.handle,
-					      0, create.size, PROT_READ);
+			ptr = __gem_mmap__cpu(i915, handle, 0, size, PROT_READ);
 			break;
 		case WC:
-			ptr = __gem_mmap__wc(i915, create.handle,
-					     0, create.size, PROT_READ);
+			ptr = __gem_mmap__wc(i915, handle, 0, size, PROT_READ);
 			break;
 		case GTT:
-			ptr = __gem_mmap__gtt(i915, create.handle,
-					      create.size, PROT_READ);
+			ptr = __gem_mmap__gtt(i915, handle, size, PROT_READ);
 			break;
 		}
 		/* No set-domains as we are being as naughty as possible */
@@ -195,7 +238,7 @@ static void *thread_clear(void *data)
 			};
 
 			if (!ptr)
-				gem_read(i915, create.handle, x[0], x, sizeof(x));
+				gem_read(i915, handle, x[0], x, sizeof(x));
 			else if (page & 1)
 				igt_memcpy_from_wc(x, ptr + x[0], sizeof(x));
 			else
@@ -207,26 +250,28 @@ static void *thread_clear(void *data)
 			checked++;
 		}
 		if (ptr)
-			munmap(ptr, create.size);
-		gem_close(i915, create.handle);
+			munmap(ptr, size);
+		gem_close(i915, handle);
 
 		total += npages;
 		atomic_fetch_add(&arg->max, npages);
 
-		if (++mode == __LAST__)
+		if (mode < __LAST__ && ++mode == __LAST__)
 			mode = PRW;
 	}
+	gem_close(i915, batch);
 
 	igt_info("Checked %'lu / %'lu pages\n", checked, total);
 	return (void *)(uintptr_t)checked;
 }
 
-static void always_clear(int i915, int timeout)
+static void always_clear(int i915, const struct gem_memory_region *r, int timeout)
 {
 	struct thread_clear arg = {
 		.i915 = i915,
+		.region = r->ci,
+		.max = r->size / 2 >> 12, /* in pages */
 		.timeout = timeout,
-		.max = igt_get_avail_ram_mb() << (20 - 12), /* in pages */
 	};
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	unsigned long checked;
@@ -244,7 +289,7 @@ static void always_clear(int i915, int timeout)
 	igt_info("Checked %'lu page allocations\n", checked);
 }
 
-static void busy_create(int i915, int timeout)
+static void busy_create(int i915, const struct gem_memory_region *r, int timeout)
 {
 	struct intel_execution_engine2 *e;
 	const intel_ctx_t *ctx;
@@ -267,7 +312,7 @@ static void busy_create(int i915, int timeout)
 			uint32_t handle;
 			igt_spin_t *next;
 
-			handle = gem_create(i915, 4096);
+			handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
 			next = igt_spin_new(i915,
 					    .ahnd = ahnd,
 					    .ctx = ctx,
@@ -808,12 +853,20 @@ igt_main
 		size_update(fd);
 
 	igt_describe("Verify that all new objects are clear.");
-	igt_subtest("create-clear")
-		always_clear(fd, 30);
+	igt_subtest_with_dynamic("create-clear") {
+		for_each_memory_region(r, fd) {
+			igt_dynamic_f("%s", r->name)
+				always_clear(fd, r, 30);
+		}
+	}
 
 	igt_describe("Create buffer objects while GPU is busy.");
-	igt_subtest("busy-create")
-		busy_create(fd, 30);
+	igt_subtest_with_dynamic("busy-create") {
+		for_each_memory_region(r, fd) {
+			igt_dynamic_f("%s", r->name)
+				busy_create(fd, r, 30);
+		}
+	}
 
 	igt_describe("Exercise create_ext placements extension.");
 	igt_subtest("create-ext-placement-sanity-check")
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 04/12] i915/gem_create: Stress creation with busy engines

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

Use shortlived non-preemptible batches to demonstrate an issue with
waiting on user controlled resources.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_create.c | 54 +++++++++++++++++++++++++++--------------
 1 file changed, 36 insertions(+), 18 deletions(-)

diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index 114c1c7c9b..c39390f326 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -289,7 +289,8 @@ static void always_clear(int i915, const struct gem_memory_region *r, int timeou
 	igt_info("Checked %'lu page allocations\n", checked);
 }
 
-static void busy_create(int i915, const struct gem_memory_region *r, int timeout)
+static void busy_create(int i915, const struct gem_memory_region *r, int timeout, unsigned int flags)
+#define BUSY_HOG 0x1
 {
 	struct intel_execution_engine2 *e;
 	const intel_ctx_t *ctx;
@@ -300,12 +301,14 @@ static void busy_create(int i915, const struct gem_memory_region *r, int timeout
 	ctx = intel_ctx_create_all_physical(i915);
 	ahnd = get_reloc_ahnd(i915, ctx->id);
 
-	igt_fork_hang_detector(i915);
-	for_each_ctx_engine(i915, ctx, e)
-		spin[e->flags] = igt_spin_new(i915,
-					      .ahnd = ahnd,
-					      .ctx = ctx,
-					      .engine = e->flags);
+	for_each_ctx_engine(i915, ctx, e) {
+		spin[e->flags] =
+			igt_spin_new(i915,
+				     .ahnd = ahnd,
+				     .ctx = ctx,
+				     .engine = e->flags,
+				     .flags = flags & BUSY_HOG ? IGT_SPIN_NO_PREEMPTION : 0);
+	}
 
 	igt_until_timeout(timeout) {
 		for_each_ctx_engine(i915, ctx, e) {
@@ -313,12 +316,13 @@ static void busy_create(int i915, const struct gem_memory_region *r, int timeout
 			igt_spin_t *next;
 
 			handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
-			next = igt_spin_new(i915,
-					    .ahnd = ahnd,
-					    .ctx = ctx,
-					    .engine = e->flags,
-					    .dependency = handle,
-					    .flags = IGT_SPIN_SOFTDEP);
+			next = __igt_spin_new(i915,
+					      .ahnd = ahnd,
+					      .ctx = ctx,
+					      .engine = e->flags,
+					      .dependency = handle,
+					      .flags = ((flags & BUSY_HOG ? IGT_SPIN_NO_PREEMPTION : 0) |
+							IGT_SPIN_SOFTDEP));
 			gem_close(i915, handle);
 
 			igt_spin_free(i915, spin[e->flags]);
@@ -334,7 +338,6 @@ static void busy_create(int i915, const struct gem_memory_region *r, int timeout
 	igt_info("Created %ld objects while busy\n", count);
 
 	gem_quiescent_gpu(i915);
-	igt_stop_hang_detector();
 }
 
 static void size_update(int fd)
@@ -861,11 +864,26 @@ igt_main
 	}
 
 	igt_describe("Create buffer objects while GPU is busy.");
-	igt_subtest_with_dynamic("busy-create") {
-		for_each_memory_region(r, fd) {
-			igt_dynamic_f("%s", r->name)
-				busy_create(fd, r, 30);
+	igt_subtest_group {
+		igt_fixture
+			igt_fork_hang_detector(fd);
+
+		igt_subtest_with_dynamic("busy-create") {
+			for_each_memory_region(r, fd) {
+				igt_dynamic_f("%s", r->name)
+					busy_create(fd, r, 30, 0);
+			}
 		}
+
+		igt_subtest_with_dynamic("hog-create") {
+			for_each_memory_region(r, fd) {
+				igt_dynamic_f("%s", r->name)
+					busy_create(fd, r, 30, BUSY_HOG);
+			}
+		}
+
+		igt_fixture
+			igt_stop_hang_detector();
 	}
 
 	igt_describe("Exercise create_ext placements extension.");
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 05/12] i915/gem_mmap_offset: Avoid set_domain when I915_MMAP_OFFSET_FIXED is used

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@linux.intel.com>

When OFFSET_FIXED mapping is in use avoid to set domain at all.

Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
---
 tests/i915/gem_mmap_offset.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 5e6b19eb34..edbc637a36 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -148,7 +148,8 @@ static void basic_uaf(int i915)
 		}
 
 		expected = calloc(obj_size, sizeof(*expected));
-		gem_set_domain(i915, handle, t->domain, 0);
+		if (t->domain)
+			gem_set_domain(i915, handle, t->domain, 0);
 		igt_assert_f(memcmp(addr, expected, obj_size) == 0,
 			     "mmap(%s) not clear on gem_create()\n",
 			     t->name);
@@ -157,15 +158,18 @@ static void basic_uaf(int i915)
 		buf = calloc(obj_size, sizeof(*buf));
 		memset(buf + 1024, 0x01, 1024);
 		gem_write(i915, handle, 0, buf, obj_size);
-		gem_set_domain(i915, handle, t->domain, 0);
+		if (t->domain)
+			gem_set_domain(i915, handle, t->domain, 0);
 		igt_assert_f(memcmp(buf, addr, obj_size) == 0,
 			     "mmap(%s) not coherent with gem_write()\n",
 			     t->name);
 
-		gem_set_domain(i915, handle, t->domain, t->domain);
+		if (t->domain)
+			gem_set_domain(i915, handle, t->domain, t->domain);
 		memset(addr + 2048, 0xff, 1024);
 		gem_read(i915, handle, 0, buf, obj_size);
-		gem_set_domain(i915, handle, t->domain, 0);
+		if (t->domain)
+			gem_set_domain(i915, handle, t->domain, 0);
 		igt_assert_f(memcmp(buf, addr, obj_size) == 0,
 			     "mmap(%s) not coherent with gem_read()\n",
 			     t->name);
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 06/12] i915/gem_mmap_offset: Verify all regions return clear mmaps on creation

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

We do not tolerate leaking stale information in newly created objects, so
make sure the test covers all memory regions.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_mmap_offset.c | 87 +++++++++++++++++++++++++-----------
 1 file changed, 60 insertions(+), 27 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index edbc637a36..8d237f2290 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -35,6 +35,7 @@
 
 #include "i915/gem.h"
 #include "i915/gem_create.h"
+#include "i915/intel_memory_region.h"
 #include "igt.h"
 #include "igt_x86.h"
 
@@ -75,6 +76,37 @@ __mmap_offset(int i915, uint32_t handle, uint64_t offset, uint64_t size,
 	return ptr;
 }
 
+static uint32_t batch_create(int i915)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle = gem_create(i915, sizeof(bbe));
+
+	gem_write(i915, handle, 0, &bbe, sizeof(bbe));
+	return handle;
+}
+
+static void make_resident(int i915, uint32_t batch, uint32_t handle)
+{
+	struct drm_i915_gem_exec_object2 obj[2] = {
+		[0] = {
+			.handle = handle,
+			.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
+		},
+		[1] = {
+			.handle = batch ?: batch_create(i915),
+			.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS,
+		},
+	};
+	struct drm_i915_gem_execbuffer2 eb = {
+		.buffers_ptr = to_user_pointer(obj),
+		.buffer_count = ARRAY_SIZE(obj),
+	};
+
+	gem_execbuf(i915, &eb);
+	if (obj[1].handle != batch)
+		gem_close(i915, obj[1].handle);
+}
+
 static void bad_object(int i915)
 {
 	uint32_t real_handle;
@@ -529,44 +561,35 @@ static uint64_t get_npages(_Atomic(uint64_t) *global, uint64_t npages)
 
 struct thread_clear {
 	_Atomic(uint64_t) max;
+	struct drm_i915_gem_memory_class_instance region;
 	int timeout;
 	int i915;
 };
 
-static int create_ioctl(int i915, struct drm_i915_gem_create *create)
-{
-	int err = 0;
-
-	if (igt_ioctl(i915, DRM_IOCTL_I915_GEM_CREATE, create)) {
-		err = -errno;
-		igt_assume(err != 0);
-	}
-
-	errno = 0;
-	return err;
-}
-
 static void *thread_clear(void *data)
 {
 	struct thread_clear *arg = data;
 	const struct mmap_offset *t;
-	unsigned long checked = 0;
+	unsigned long checked = 0, total = 0;
 	int i915 = arg->i915;
+	uint32_t batch = batch_create(i915);
 
 	t = mmap_offset_types;
 	igt_until_timeout(arg->timeout) {
-		struct drm_i915_gem_create create = {};
-		uint64_t npages;
+		uint64_t npages, size;
+		uint32_t handle;
 		void *ptr;
 
 		npages = random();
 		npages <<= 32;
 		npages |= random();
 		npages = get_npages(&arg->max, npages);
-		create.size = npages << 12;
+		size = npages << 12;
 
-		create_ioctl(i915, &create);
-		ptr = __mmap_offset(i915, create.handle, 0, create.size,
+		igt_assert_eq(__gem_create_in_memory_region_list(i915, &handle, &size, 0, &arg->region, 1), 0);
+		make_resident(i915, batch, handle);
+
+		ptr = __mmap_offset(i915, handle, 0, size,
 				    PROT_READ | PROT_WRITE,
 				    t->type);
 		/* No set-domains as we are being as naughty as possible */
@@ -584,26 +607,32 @@ static void *thread_clear(void *data)
 			for (int i = 0; i < ARRAY_SIZE(x); i++)
 				igt_assert_eq_u64(x[i], 0);
 		}
-		if (ptr)
-			munmap(ptr, create.size);
-		gem_close(i915, create.handle);
-		checked += npages;
+		if (ptr) {
+			munmap(ptr, size);
+			checked += npages;
+		}
+		gem_close(i915, handle);
 
+		total += npages;
 		atomic_fetch_add(&arg->max, npages);
 
 		if (!(++t)->name)
 			t = mmap_offset_types;
 	}
 
+	gem_close(i915, batch);
+
+	igt_info("Checked %'lu / %'lu pages\n", checked, total);
 	return (void *)(uintptr_t)checked;
 }
 
-static void always_clear(int i915, int timeout)
+static void always_clear(int i915, const struct gem_memory_region *r, int timeout)
 {
 	struct thread_clear arg = {
 		.i915 = i915,
+		.region = r->ci,
+		.max = r->size / 2 >> 12, /* in pages */
 		.timeout = timeout,
-		.max = igt_get_avail_ram_mb() << (20 - 12), /* in pages */
 	};
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	unsigned long checked;
@@ -750,8 +779,12 @@ igt_main
 	igt_subtest_f("open-flood")
 		open_flood(i915, 20);
 
-	igt_subtest_f("clear")
-		always_clear(i915, 20);
+	igt_subtest_with_dynamic("clear") {
+		for_each_memory_region(r, i915) {
+			igt_dynamic_f("%s", r->name)
+				always_clear(i915, r, 20);
+		}
+	}
 
 	igt_subtest_f("blt-coherency")
 		blt_coherency(i915);
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 07/12] i915/gem_mmap_offset: Verify all regions with ptrace

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

Check we can use ptrace to query *ptr of each mmap for each region.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_mmap_offset.c | 84 ++++++++++++++++++++----------------
 1 file changed, 46 insertions(+), 38 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 8d237f2290..608080c717 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -370,64 +370,72 @@ static void test_ptrace(int i915)
 	const unsigned int SZ = 3 * 4096;
 	unsigned long *ptr, *cpy;
 	unsigned long AA, CC;
-	uint32_t bo;
 
 	memset(&AA, 0xaa, sizeof(AA));
 	memset(&CC, 0x55, sizeof(CC));
 
 	cpy = malloc(SZ);
-	bo = gem_create(i915, SZ);
+	igt_assert(cpy);
 
-	for_each_mmap_offset_type(i915, t) {
-		ptr = __mmap_offset(i915, bo, 0, SZ,
-				    PROT_READ | PROT_WRITE,
-				    t->type);
-		if (!ptr)
-			continue;
+	for_each_memory_region(r, i915) {
+		uint64_t size = SZ;
+		uint32_t bo;
 
-		igt_dynamic_f("%s", t->name) {
-			pid_t pid;
+		igt_assert_eq(__gem_create_in_memory_region_list(i915, &bo, &size, 0, &r->ci, 1), 0);
+		make_resident(i915, 0, bo);
 
-			memset(cpy, AA, SZ);
-			memset(ptr, CC, SZ);
+		for_each_mmap_offset_type(i915, t) {
+			ptr = __mmap_offset(i915, bo, 0, size,
+					    PROT_READ | PROT_WRITE,
+					    t->type);
+			if (!ptr)
+				continue;
 
-			igt_assert(!memchr_inv(ptr, CC, SZ));
-			igt_assert(!memchr_inv(cpy, AA, SZ));
+			igt_dynamic_f("%s-%s", r->name, t->name) {
+				pid_t pid;
 
-			igt_fork(child, 1) {
-				ptrace(PTRACE_TRACEME, 0, NULL, NULL);
-				raise(SIGSTOP);
-			}
+				memset(cpy, AA, SZ);
+				memset(ptr, CC, SZ);
 
-			/* Wait for the child to ready themselves [SIGSTOP] */
-			pid = wait(NULL);
+				igt_assert(!memchr_inv(ptr, CC, SZ));
+				igt_assert(!memchr_inv(cpy, AA, SZ));
 
-			ptrace(PTRACE_ATTACH, pid, NULL, NULL);
-			for (int i = 0; i < SZ / sizeof(long); i++) {
-				long ret;
+				igt_fork(child, 1) {
+					ptrace(PTRACE_TRACEME, 0, NULL, NULL);
+					raise(SIGSTOP);
+				}
 
-				ret = ptrace(PTRACE_PEEKDATA, pid, ptr + i);
-				igt_assert_eq_u64(ret, CC);
-				cpy[i] = ret;
+				/* Wait for the child to ready themselves [SIGSTOP] */
+				pid = wait(NULL);
 
-				ret = ptrace(PTRACE_POKEDATA, pid, ptr + i, AA);
-				igt_assert_eq(ret, 0l);
-			}
-			ptrace(PTRACE_DETACH, pid, NULL, NULL);
+				ptrace(PTRACE_ATTACH, pid, NULL, NULL);
+				for (int i = 0; i < SZ / sizeof(long); i++) {
+					long ret;
+
+					ret = ptrace(PTRACE_PEEKDATA, pid, ptr + i);
+					igt_assert_eq_u64(ret, CC);
+					cpy[i] = ret;
+
+					ret = ptrace(PTRACE_POKEDATA, pid, ptr + i, AA);
+					igt_assert_eq(ret, 0l);
+				}
+				ptrace(PTRACE_DETACH, pid, NULL, NULL);
 
-			/* Wakeup the child for it to exit */
-			kill(SIGCONT, pid);
-			igt_waitchildren();
+				/* Wakeup the child for it to exit */
+				kill(SIGCONT, pid);
+				igt_waitchildren();
 
-			/* The two buffers should now be swapped */
-			igt_assert(!memchr_inv(ptr, AA, SZ));
-			igt_assert(!memchr_inv(cpy, CC, SZ));
+				/* The two buffers should now be swapped */
+				igt_assert(!memchr_inv(ptr, AA, SZ));
+				igt_assert(!memchr_inv(cpy, CC, SZ));
+			}
+
+			munmap(ptr, size);
 		}
 
-		munmap(ptr, SZ);
+		gem_close(i915, bo);
 	}
 
-	gem_close(i915, bo);
 	free(cpy);
 }
 
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 08/12] i915/gem_mmap_offset: Verify all regions remain in isolation

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

Check that we don't leak mmap pointers to different regions.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_mmap_offset.c | 99 +++++++++++++++++++-----------------
 1 file changed, 51 insertions(+), 48 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 608080c717..c9a3eb5b94 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -219,68 +219,71 @@ static void basic_uaf(int i915)
 
 static void isolation(int i915)
 {
-	for_each_mmap_offset_type(i915, t) {
-		struct drm_i915_gem_mmap_offset mmap_arg = {
-			.flags = t->type
-		};
-		int A = gem_reopen_driver(i915);
-		int B = gem_reopen_driver(i915);
-		uint64_t offset_a, offset_b;
-		uint32_t a, b;
-		void *ptr;
-
-		a = gem_create(A, 4096);
-		b = gem_open(B, gem_flink(A, a));
-
-		mmap_arg.handle = a;
-		if (mmap_offset_ioctl(A, &mmap_arg)) {
-			close(A);
-			close(B);
-			continue;
-		}
-		offset_a = mmap_arg.offset;
-
-		mmap_arg.handle = b;
-		igt_assert_eq(mmap_offset_ioctl(B, &mmap_arg), 0);
-		offset_b = mmap_arg.offset;
-
-		igt_info("A[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
-			 t->name, A, a, offset_a);
-		igt_info("B[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
-			 t->name, B, b, offset_b);
+	for_each_memory_region(r, i915) {
+		igt_info("%s\n", r->name);
+		for_each_mmap_offset_type(i915, t) {
+			struct drm_i915_gem_mmap_offset mmap_arg = {
+				.flags = t->type
+			};
+			int A = gem_reopen_driver(i915);
+			int B = gem_reopen_driver(i915);
+			uint64_t offset_a, offset_b;
+			uint32_t a, b;
+			void *ptr;
+
+			a = gem_create_in_memory_region_list(A, 4096, 0, &r->ci, 1);
+			b = gem_open(B, gem_flink(A, a));
+
+			mmap_arg.handle = a;
+			if (mmap_offset_ioctl(A, &mmap_arg)) {
+				close(A);
+				close(B);
+				continue;
+			}
+			offset_a = mmap_arg.offset;
 
-		errno = 0;
-		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, i915, offset_a);
-		igt_assert(ptr == MAP_FAILED);
-		igt_assert_eq(errno, EACCES);
+			mmap_arg.handle = b;
+			igt_assert_eq(mmap_offset_ioctl(B, &mmap_arg), 0);
+			offset_b = mmap_arg.offset;
 
-		errno = 0;
-		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, i915, offset_b);
-		igt_assert(ptr == MAP_FAILED);
-		igt_assert_eq(errno, EACCES);
+			igt_info("\tA[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+				 t->name, A, a, offset_a);
+			igt_info("\tB[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+				 t->name, B, b, offset_b);
 
-		if (offset_a != offset_b) {
 			errno = 0;
-			ptr = mmap(0, 4096, PROT_READ, MAP_SHARED, B, offset_a);
+			ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, i915, offset_a);
 			igt_assert(ptr == MAP_FAILED);
 			igt_assert_eq(errno, EACCES);
 
 			errno = 0;
-			ptr = mmap(0, 4096, PROT_READ, MAP_SHARED, A, offset_b);
+			ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, i915, offset_b);
 			igt_assert(ptr == MAP_FAILED);
 			igt_assert_eq(errno, EACCES);
-		}
 
-		close(B);
+			if (offset_a != offset_b) {
+				errno = 0;
+				ptr = mmap(0, 4096, PROT_READ, MAP_SHARED, B, offset_a);
+				igt_assert(ptr == MAP_FAILED);
+				igt_assert_eq(errno, EACCES);
 
-		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
-		igt_assert(ptr != MAP_FAILED);
-		munmap(ptr, 4096);
+				errno = 0;
+				ptr = mmap(0, 4096, PROT_READ, MAP_SHARED, A, offset_b);
+				igt_assert(ptr == MAP_FAILED);
+				igt_assert_eq(errno, EACCES);
+			}
 
-		close(A);
+			close(B);
+
+			ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+			igt_assert(ptr != MAP_FAILED);
+			munmap(ptr, 4096);
+
+			close(A);
 
-		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
-		igt_assert(ptr == MAP_FAILED);
+			ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+			igt_assert(ptr == MAP_FAILED);
+		}
 	}
 }
 
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 09/12] i915/gem_mmap_offset: Verify all regions have nonblocking pagefaults

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

Check that if we fault in a page that is active on the gpu, it doesn't
wait for completion.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
---
 tests/i915/gem_mmap_offset.c | 38 +++++++++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index c9a3eb5b94..8d47fdb735 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -287,7 +287,7 @@ static void isolation(int i915)
 	}
 }
 
-static void pf_nonblock(int i915)
+static void pf_nonblock_batch(int i915)
 {
 	uint64_t ahnd = get_reloc_ahnd(i915, 0);
 	igt_spin_t *spin = igt_spin_new(i915, .ahnd = ahnd);
@@ -313,6 +313,42 @@ static void pf_nonblock(int i915)
 	put_ahnd(ahnd);
 }
 
+static void pf_nonblock(int i915)
+{
+	uint64_t ahnd = get_reloc_ahnd(i915, 0);
+
+	pf_nonblock_batch(i915);
+
+	for_each_memory_region(r, i915) {
+		igt_spin_t *spin;
+		uint32_t handle;
+
+		handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
+		spin = igt_spin_new(i915, .ahnd = ahnd, .dependency = handle);
+
+		for_each_mmap_offset_type(i915, t) {
+			uint32_t *ptr;
+
+			ptr = __mmap_offset(i915, handle, 0, 4096,
+					    PROT_READ | PROT_WRITE,
+					    t->type);
+			if (!ptr)
+				continue;
+
+			igt_set_timeout(1, t->name);
+			/* no set-domain as we want to verify the pagefault is async */
+			ptr[256] = 0;
+			igt_reset_timeout();
+
+			munmap(ptr, 4096);
+		}
+
+		igt_spin_free(i915, spin);
+		gem_close(i915, handle);
+	}
+	put_ahnd(ahnd);
+}
+
 static void *memchr_inv(const void *s, int c, size_t n)
 {
 	const uint8_t *us = s;
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 10/12] i915/gem_mmap_offset: Check all mmap types reject invalid objects

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@linux.intel.com>

Extend the bad_object negative subtest to cover all mmap types.

Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_mmap_offset.c | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 8d47fdb735..762eab18a5 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -121,15 +121,17 @@ static void bad_object(int i915)
 	handles[i] = real_handle + 1;
 
 	for (; i >= 0; i--) {
-		struct drm_i915_gem_mmap_offset arg = {
-			.handle = handles[i],
-			.flags = I915_MMAP_OFFSET_WB,
-		};
+		for_each_mmap_offset_type(i915, t) {
+			struct drm_i915_gem_mmap_offset arg = {
+				.handle = handles[i],
+				.flags = t->type,
+			};
 
-		igt_debug("Trying MMAP IOCTL with handle %x\n",
-			  handles[i]);
-		igt_assert_eq(mmap_offset_ioctl(i915, &arg),
-			      -ENOENT);
+			igt_debug("Trying MMAP IOCTL[%s] with handle %x\n",
+				  t->name, handles[i]);
+			igt_assert_eq(mmap_offset_ioctl(i915, &arg),
+				      -ENOENT);
+		}
 	}
 
 	gem_close(i915, real_handle);
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 11/12] i915/gem_mmap_offset: Exercise close race against all types/regions

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@linux.intel.com>

Iterate over all mmmap types and memory regions looking for races
against closing the object.

Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
---
 tests/i915/gem_mmap_offset.c | 41 ++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 20 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 762eab18a5..7fd0690962 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -491,29 +491,30 @@ static void close_race(int i915, int timeout)
 
 	igt_fork(child, ncpus + 1) {
 		do {
-			struct drm_i915_gem_mmap_offset mmap_arg = {};
-			const int i = 1 + random() % ncpus;
-			uint32_t old;
-
-			mmap_arg.handle = gem_create(i915, 4096);
-			mmap_arg.flags = I915_MMAP_OFFSET_WB;
-			old = atomic_exchange(&handles[i], mmap_arg.handle);
-			ioctl(i915, DRM_IOCTL_GEM_CLOSE, &old);
-
-			if (ioctl(i915,
-				  DRM_IOCTL_I915_GEM_MMAP_OFFSET,
-				  &mmap_arg) != -1) {
-				void *ptr;
-
-				ptr = mmap64(0, 4096,
-					     PROT_WRITE, MAP_SHARED, i915,
-					     mmap_arg.offset);
-				if (ptr != MAP_FAILED) {
+			for_each_memory_region(r, i915) {
+				const int i = 1 + random() % ncpus;
+				uint64_t size = 4096;
+				uint32_t bo, old;
+
+				igt_assert_eq(__gem_create_in_memory_region_list(i915, &bo, &size, 0, &r->ci, 1), 0);
+				make_resident(i915, 0, bo);
+
+				old = atomic_exchange(&handles[i], bo);
+				ioctl(i915, DRM_IOCTL_GEM_CLOSE, &old);
+
+				for_each_mmap_offset_type(i915, t) {
+					void *ptr;
+
+					ptr = __mmap_offset(i915, bo, 0, size,
+							    PROT_READ | PROT_WRITE,
+							    t->type);
+					if (!ptr)
+						continue;
+
 					*(volatile uint32_t *)ptr = 0;
-					munmap(ptr, 4096);
+					munmap(ptr, size);
 				}
 			}
-
 		} while (!READ_ONCE(handles[0]));
 	}
 
-- 
2.34.1

[igt-dev] [PATCH i-g-t v3 12/12] i915/gem_mmap_offset: Crudely measure read/write to different mmaps

[Zbigniew Kempczyński]

From: Chris Wilson <chris.p.wilson@intel.com>

Compare the read/write performance of different mmap types to different
memory regions.

Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
 tests/i915/gem_mmap_offset.c | 74 ++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 7fd0690962..f51d7e38f5 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -107,6 +107,73 @@ static void make_resident(int i915, uint32_t batch, uint32_t handle)
 		gem_close(i915, obj[1].handle);
 }
 
+static void perf(int i915, const struct gem_memory_region *r)
+{
+#define MiB (1024 * 1024)
+	const unsigned int rep = 1024;
+	const uint64_t sz = 4096;
+	struct timespec tv;
+	uint32_t handle;
+	char buf[4096];
+
+	/*
+	 * Time reading/writing through each mmap type into each
+	 * memory region to have a rough estimate of the memory
+	 * bandwidth exposed to userspace across each link.
+	 *
+	 * For example, we would expect that reading and writing to
+	 * lmem would utilise the full PCIe bandwidth (>3.2GiB/s),
+	 * and notably be symmetric, the same in both directions.
+	 */
+
+	handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
+	make_resident(i915, 0, handle);
+
+	for_each_mmap_offset_type(i915, t) {
+		double ns;
+		void *ptr;
+
+		ptr = __mmap_offset(i915, handle, 0, sz,
+				    PROT_READ | PROT_WRITE,
+				    t->type);
+		if (!ptr)
+			continue;
+
+		igt_nsec_elapsed(memset(&tv, 0, sizeof(tv)));
+		for (int i = 0; i < rep; i++)
+			memset(ptr, 0, sz);
+		ns = igt_nsec_elapsed(&tv);
+		igt_info("%s: Clear    %12.2fMiB/s\n",
+			 t->name, sz * rep * NSEC_PER_SEC / ns / MiB);
+
+		igt_nsec_elapsed(memset(&tv, 0, sizeof(tv)));
+		for (int i = 0; i < rep; i++)
+			memcpy(ptr, buf, sz);
+		ns = igt_nsec_elapsed(&tv);
+		igt_info("%s: Write    %12.2fMiB/s\n",
+			 t->name, sz * rep * NSEC_PER_SEC / ns / MiB);
+
+		igt_nsec_elapsed(memset(&tv, 0, sizeof(tv)));
+		for (int i = 0; i < rep; i++)
+			memcpy(buf, ptr, sz);
+		ns = igt_nsec_elapsed(&tv);
+		igt_info("%s: Read     %12.2fMiB/s\n",
+			 t->name, sz * rep * NSEC_PER_SEC / ns / MiB);
+
+		igt_nsec_elapsed(memset(&tv, 0, sizeof(tv)));
+		for (int i = 0; i < rep; i++)
+			igt_memcpy_from_wc(buf, ptr, sz);
+		ns = igt_nsec_elapsed(&tv);
+		igt_info("%s: movntqda %12.2fMiB/s\n",
+			 t->name, sz * rep * NSEC_PER_SEC / ns / MiB);
+
+		munmap(ptr, sz);
+	}
+
+	gem_close(i915, handle);
+#undef MiB
+}
+
 static void bad_object(int i915)
 {
 	uint32_t real_handle;
@@ -836,6 +903,13 @@ igt_main
 		}
 	}
 
+	igt_subtest_with_dynamic("perf") {
+		for_each_memory_region(r, i915) {
+			igt_dynamic_f("%s", r->name)
+				perf(i915, r);
+		}
+	}
+
 	igt_subtest_f("blt-coherency")
 		blt_coherency(i915);
 
-- 
2.34.1

Re: [igt-dev] [PATCH i-g-t v3 09/12] i915/gem_mmap_offset: Verify all regions have nonblocking pagefaults

[Zbigniew Kempczyński]

On Fri, Sep 02, 2022 at 03:00:04PM +0200, Zbigniew Kempczyński wrote:
> From: Chris Wilson <chris.p.wilson@intel.com>
> 
> Check that if we fault in a page that is active on the gpu, it doesn't
> wait for completion.
> 
> Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
> ---
>  tests/i915/gem_mmap_offset.c | 38 +++++++++++++++++++++++++++++++++++-
>  1 file changed, 37 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
> index c9a3eb5b94..8d47fdb735 100644
> --- a/tests/i915/gem_mmap_offset.c
> +++ b/tests/i915/gem_mmap_offset.c
> @@ -287,7 +287,7 @@ static void isolation(int i915)
>  	}
>  }
>  
> -static void pf_nonblock(int i915)
> +static void pf_nonblock_batch(int i915)
>  {
>  	uint64_t ahnd = get_reloc_ahnd(i915, 0);
>  	igt_spin_t *spin = igt_spin_new(i915, .ahnd = ahnd);
> @@ -313,6 +313,42 @@ static void pf_nonblock(int i915)
>  	put_ahnd(ahnd);
>  }
>  
> +static void pf_nonblock(int i915)
> +{
> +	uint64_t ahnd = get_reloc_ahnd(i915, 0);
> +
> +	pf_nonblock_batch(i915);
> +
> +	for_each_memory_region(r, i915) {
> +		igt_spin_t *spin;
> +		uint32_t handle;
> +
> +		handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
> +		spin = igt_spin_new(i915, .ahnd = ahnd, .dependency = handle);
> +
> +		for_each_mmap_offset_type(i915, t) {
> +			uint32_t *ptr;
> +
> +			ptr = __mmap_offset(i915, handle, 0, 4096,
> +					    PROT_READ | PROT_WRITE,
> +					    t->type);
> +			if (!ptr)
> +				continue;
> +
> +			igt_set_timeout(1, t->name);
> +			/* no set-domain as we want to verify the pagefault is async */
> +			ptr[256] = 0;
> +			igt_reset_timeout();
> +
> +			munmap(ptr, 4096);
> +		}
> +
> +		igt_spin_free(i915, spin);
> +		gem_close(i915, handle);
> +	}
> +	put_ahnd(ahnd);
> +}
> +
>  static void *memchr_inv(const void *s, int c, size_t n)
>  {
>  	const uint8_t *us = s;
> -- 
> 2.34.1
>

Looks good for me.

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

--
Zbigniew 

[igt-dev] ✓ Fi.CI.BAT: success for Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 14524 bytes --]

== Series Details ==

Series: Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests (rev3)
URL   : https://patchwork.freedesktop.org/series/108022/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12064 -> IGTPW_7725
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html

Participating hosts (32 -> 32)
------------------------------

  Additional (2): fi-rkl-11600 bat-dg1-5 
  Missing    (2): fi-bdw-samus bat-jsl-3 

New tests
---------

  New tests have been introduced between CI_DRM_12064 and IGTPW_7725:

### New IGT tests (4) ###

  * igt@kms_flip@basic-flip-vs-dpms@d-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [0.68] s

  * igt@kms_flip@basic-flip-vs-modeset@d-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [0.69] s

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [0.98] s

  * igt@kms_flip@basic-plain-flip@d-dp2:
    - Statuses : 1 pass(s)
    - Exec time: [0.70] s

  

Known issues
------------

  Here are the changes found in IGTPW_7725 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@read:
    - bat-dg1-5:          NOTRUN -> [SKIP][1] ([i915#2582]) +4 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@fbdev@read.html

  * igt@gem_huc_copy@huc-copy:
    - fi-rkl-11600:       NOTRUN -> [SKIP][2] ([i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - fi-rkl-11600:       NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_mmap@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][4] ([i915#4083])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@gem_mmap@basic.html

  * igt@gem_tiled_fence_blits@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][5] ([i915#4077]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html

  * igt@gem_tiled_pread_basic:
    - fi-rkl-11600:       NOTRUN -> [SKIP][6] ([i915#3282])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@gem_tiled_pread_basic.html
    - bat-dg1-5:          NOTRUN -> [SKIP][7] ([i915#4079]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
    - fi-rkl-11600:       NOTRUN -> [SKIP][8] ([i915#3012])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
    - bat-dg1-5:          NOTRUN -> [SKIP][9] ([i915#1155])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg1-5:          NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@i915_pm_rps@basic-api.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [PASS][11] -> [INCOMPLETE][12] ([i915#4785])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
    - bat-dg1-5:          NOTRUN -> [DMESG-FAIL][13] ([i915#4494] / [i915#4957])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@i915_selftest@live@hangcheck.html

  * igt@i915_suspend@basic-s2idle-without-i915:
    - bat-dg1-5:          NOTRUN -> [INCOMPLETE][14] ([i915#6011])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@i915_suspend@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-rkl-11600:       NOTRUN -> [INCOMPLETE][15] ([i915#5982])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
    - fi-bdw-5557u:       [PASS][16] -> [INCOMPLETE][17] ([i915#146] / [i915#6598])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][18] ([i915#4212]) +7 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg1-5:          NOTRUN -> [SKIP][19] ([i915#4215])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_busy@basic:
    - bat-dg1-5:          NOTRUN -> [SKIP][20] ([i915#1845] / [i915#4303])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_busy@basic.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-rkl-11600:       NOTRUN -> [SKIP][21] ([fdo#111827]) +7 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@kms_chamelium@hdmi-hpd-fast.html
    - bat-dg1-5:          NOTRUN -> [SKIP][22] ([fdo#111827]) +7 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
    - fi-rkl-11600:       NOTRUN -> [SKIP][23] ([i915#4103])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
    - fi-bsw-kefka:       [PASS][24] -> [FAIL][25] ([i915#6298])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-rkl-11600:       NOTRUN -> [SKIP][26] ([fdo#109285] / [i915#4098])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
    - bat-dg1-5:          NOTRUN -> [SKIP][27] ([fdo#109285])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
    - bat-dg1-5:          NOTRUN -> [SKIP][28] ([i915#4078]) +13 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_pipe_crc_basic@nonblocking-crc.html

  * igt@kms_psr@sprite_plane_onoff:
    - fi-rkl-11600:       NOTRUN -> [SKIP][29] ([i915#1072]) +3 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html
    - bat-dg1-5:          NOTRUN -> [SKIP][30] ([i915#1072] / [i915#4078]) +3 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-rkl-11600:       NOTRUN -> [SKIP][31] ([i915#3555] / [i915#4098])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-dg1-5:          NOTRUN -> [SKIP][32] ([i915#3555])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg1-5:          NOTRUN -> [SKIP][33] ([i915#1845] / [i915#3708])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-read:
    - bat-dg1-5:          NOTRUN -> [SKIP][34] ([i915#3708]) +2 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@basic-gtt:
    - bat-dg1-5:          NOTRUN -> [SKIP][35] ([i915#3708] / [i915#4077]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@prime_vgem@basic-gtt.html

  * igt@prime_vgem@basic-read:
    - fi-rkl-11600:       NOTRUN -> [SKIP][36] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@basic-userptr:
    - bat-dg1-5:          NOTRUN -> [SKIP][37] ([i915#3708] / [i915#4873])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@prime_vgem@basic-userptr.html
    - fi-rkl-11600:       NOTRUN -> [SKIP][38] ([fdo#109295] / [i915#3301] / [i915#3708])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-rkl-11600/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - fi-hsw-4770:        NOTRUN -> [FAIL][39] ([fdo#109271] / [i915#4312] / [i915#5594] / [i915#6246])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-hsw-4770/igt@runner@aborted.html
    - bat-dg1-5:          NOTRUN -> [FAIL][40] ([i915#4312] / [i915#5257])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg1-5/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_ringfill@basic-all:
    - {bat-dg2-9}:        [FAIL][41] ([i915#5886]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/bat-dg2-9/igt@gem_ringfill@basic-all.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-dg2-9/igt@gem_ringfill@basic-all.html

  * igt@i915_selftest@live@hangcheck:
    - {bat-adln-1}:       [INCOMPLETE][43] ([i915#6297]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/bat-adln-1/igt@i915_selftest@live@hangcheck.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-adln-1/igt@i915_selftest@live@hangcheck.html
    - {fi-jsl-1}:         [INCOMPLETE][45] ([i915#5153]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/fi-jsl-1/igt@i915_selftest@live@hangcheck.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/fi-jsl-1/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@hugepages:
    - {bat-adln-1}:       [DMESG-WARN][47] ([i915#5278]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/bat-adln-1/igt@i915_selftest@live@hugepages.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/bat-adln-1/igt@i915_selftest@live@hugepages.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4303]: https://gitlab.freedesktop.org/drm/intel/issues/4303
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#5886]: https://gitlab.freedesktop.org/drm/intel/issues/5886
  [i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
  [i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6297]: https://gitlab.freedesktop.org/drm/intel/issues/6297
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6642 -> IGTPW_7725

  CI-20190529: 20190529
  CI_DRM_12064: deda08d41aef283357a629e7ddb9a7f5e3616d74 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_7725: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html
  IGT_6642: c018ce1d1ab8e570f665cf5d58c9802a44d66cc1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git


Testlist changes
----------------

+igt@gem_create@hog-create
+igt@gem_mmap_offset@perf

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html

[-- Attachment #2: Type: text/html, Size: 17217 bytes --]

[igt-dev] ✗ Fi.CI.IGT: failure for Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 41600 bytes --]

== Series Details ==

Series: Fix spinner 48b + add I915_MMAP_OFFSET_FIXED tests (rev3)
URL   : https://patchwork.freedesktop.org/series/108022/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12064_full -> IGTPW_7725_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_7725_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_7725_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html

Participating hosts (11 -> 9)
------------------------------

  Additional (1): shard-rkl 
  Missing    (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_7725_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_mmap_offset@close-race:
    - shard-glk:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk9/igt@gem_mmap_offset@close-race.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk5/igt@gem_mmap_offset@close-race.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_cursor_crc@cursor-onscreen-512x170}:
    - {shard-rkl}:        NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * {igt@kms_cursor_crc@cursor-onscreen-512x512}:
    - {shard-tglu}:       NOTRUN -> [SKIP][4] +8 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglu-2/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * {igt@kms_cursor_crc@cursor-rapid-movement-512x512}:
    - shard-iclb:         NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  
New tests
---------

  New tests have been introduced between CI_DRM_12064_full and IGTPW_7725_full:

### New IGT tests (11) ###

  * igt@gem_create@busy-create@smem0:
    - Statuses : 5 pass(s)
    - Exec time: [32.24, 32.27] s

  * igt@gem_create@create-clear@smem0:
    - Statuses : 5 pass(s)
    - Exec time: [32.33, 37.46] s

  * igt@gem_create@hog-create:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_create@hog-create@smem0:
    - Statuses : 5 pass(s)
    - Exec time: [32.24, 32.27] s

  * igt@gem_mmap_offset@clear@smem0:
    - Statuses : 5 pass(s)
    - Exec time: [22.46, 24.32] s

  * igt@gem_mmap_offset@perf:
    - Statuses :
    - Exec time: [None] s

  * igt@gem_mmap_offset@perf@smem0:
    - Statuses : 5 pass(s)
    - Exec time: [0.13, 0.39] s

  * igt@gem_mmap_offset@ptrace@smem0-gtt:
    - Statuses : 5 pass(s)
    - Exec time: [0.03, 0.08] s

  * igt@gem_mmap_offset@ptrace@smem0-uc:
    - Statuses : 5 pass(s)
    - Exec time: [0.02, 0.07] s

  * igt@gem_mmap_offset@ptrace@smem0-wb:
    - Statuses : 5 pass(s)
    - Exec time: [0.02, 0.07] s

  * igt@gem_mmap_offset@ptrace@smem0-wc:
    - Statuses : 5 pass(s)
    - Exec time: [0.02, 0.07] s

  

Known issues
------------

  Here are the changes found in IGTPW_7725_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [PASS][6] -> [SKIP][7] ([i915#658])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb2/igt@feature_discovery@psr2.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@feature_discovery@psr2.html

  * igt@gem_ccs@block-copy-uncompressed:
    - shard-iclb:         NOTRUN -> [SKIP][8] ([i915#5327])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@gem_ccs@block-copy-uncompressed.html

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-tglb:         [PASS][9] -> [FAIL][10] ([i915#6268])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-tglb6/igt@gem_ctx_exec@basic-nohangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
    - shard-snb:          NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb4/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html

  * igt@gem_eio@in-flight-10ms:
    - shard-tglb:         [PASS][12] -> [TIMEOUT][13] ([i915#3063])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-tglb2/igt@gem_eio@in-flight-10ms.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb2/igt@gem_eio@in-flight-10ms.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-iclb:         [PASS][14] -> [TIMEOUT][15] ([i915#3070])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb3/igt@gem_eio@in-flight-contexts-10ms.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-iclb:         [PASS][16] -> [SKIP][17] ([i915#4525]) +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb1/igt@gem_exec_balancer@parallel-out-fence.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb8/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][18] -> [FAIL][19] ([i915#2842]) +2 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
    - shard-apl:          [PASS][20] -> [FAIL][21] ([i915#2842])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl8/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-iclb:         NOTRUN -> [SKIP][22] ([fdo#109283])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb1/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_exec_params@secure-non-root:
    - shard-iclb:         NOTRUN -> [SKIP][23] ([fdo#112283])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@gem_exec_params@secure-non-root.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([i915#4613]) +1 similar issue
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb7/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_lmem_swapping@verify:
    - shard-tglb:         NOTRUN -> [SKIP][25] ([i915#4613])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb1/igt@gem_lmem_swapping@verify.html
    - shard-glk:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#4613])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@gem_lmem_swapping@verify.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#4613]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl2/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-iclb:         NOTRUN -> [SKIP][28] ([i915#4270])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][29] ([i915#768])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_userptr_blits@input-checking:
    - shard-apl:          NOTRUN -> [DMESG-WARN][30] ([i915#4991])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@gem_userptr_blits@input-checking.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-iclb:         NOTRUN -> [SKIP][31] ([i915#3297])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@gem_userptr_blits@unsync-overlap.html
    - shard-tglb:         NOTRUN -> [SKIP][32] ([i915#3297])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb3/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gen3_render_tiledy_blits:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([fdo#109289]) +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@gen3_render_tiledy_blits.html

  * igt@gen7_exec_parse@batch-without-end:
    - shard-tglb:         NOTRUN -> [SKIP][34] ([fdo#109289]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb2/igt@gen7_exec_parse@batch-without-end.html

  * igt@i915_selftest@live@hangcheck:
    - shard-snb:          [PASS][35] -> [INCOMPLETE][36] ([i915#3921])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-snb4/igt@i915_selftest@live@hangcheck.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb6/igt@i915_selftest@live@hangcheck.html

  * igt@kms_atomic@atomic_plane_damage:
    - shard-iclb:         NOTRUN -> [SKIP][37] ([i915#4765])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb1/igt@kms_atomic@atomic_plane_damage.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-iclb:         NOTRUN -> [SKIP][38] ([i915#5286]) +1 similar issue
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb1/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-tglb:         NOTRUN -> [SKIP][39] ([i915#5286]) +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][40] ([fdo#110725] / [fdo#111614]) +2 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +3 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk7/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][42] ([fdo#109278] / [i915#3886]) +4 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][43] ([i915#3689] / [i915#6095])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb5/igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs.html

  * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +6 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl1/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html
    - shard-tglb:         NOTRUN -> [SKIP][45] ([i915#3689] / [i915#3886])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb5/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-4_tiled_dg2_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][46] ([i915#3689]) +2 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb3/igt@kms_ccs@pipe-d-bad-pixel-format-4_tiled_dg2_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][47] ([fdo#111615] / [i915#3689])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb2/igt@kms_ccs@pipe-d-bad-pixel-format-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][48] ([fdo#109278]) +10 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - shard-snb:          NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb2/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@vga-frame-dump:
    - shard-apl:          NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl8/igt@kms_chamelium@vga-frame-dump.html

  * igt@kms_color_chamelium@ctm-max:
    - shard-tglb:         NOTRUN -> [SKIP][51] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb7/igt@kms_color_chamelium@ctm-max.html
    - shard-glk:          NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@kms_color_chamelium@ctm-max.html
    - shard-iclb:         NOTRUN -> [SKIP][53] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@kms_color_chamelium@ctm-max.html

  * igt@kms_content_protection@mei_interface:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109300] / [fdo#111066])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb7/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-tglb:         NOTRUN -> [SKIP][55] ([fdo#109274] / [fdo#111825]) +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
    - shard-glk:          [PASS][56] -> [FAIL][57] ([i915#2346])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html

  * igt@kms_dp_tiled_display@basic-test-pattern:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([i915#426])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb2/igt@kms_dp_tiled_display@basic-test-pattern.html
    - shard-iclb:         NOTRUN -> [SKIP][59] ([i915#426])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb1/igt@kms_dp_tiled_display@basic-test-pattern.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-blt-4tiled:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([i915#5287]) +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@kms_draw_crc@draw-method-xrgb2101010-blt-4tiled.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-render-4tiled:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([i915#5287])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb2/igt@kms_draw_crc@draw-method-xrgb2101010-render-4tiled.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-glk:          NOTRUN -> [FAIL][62] ([i915#4767])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk7/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-dpms-vs-vblank-race:
    - shard-tglb:         NOTRUN -> [SKIP][63] ([fdo#109274] / [fdo#111825] / [i915#3637])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb5/igt@kms_flip@2x-dpms-vs-vblank-race.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][64] ([fdo#109274]) +4 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend@b-dp1:
    - shard-apl:          [PASS][65] -> [DMESG-WARN][66] ([i915#180]) +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl1/igt@kms_flip@flip-vs-suspend@b-dp1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl8/igt@kms_flip@flip-vs-suspend@b-dp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1:
    - shard-glk:          [PASS][67] -> [FAIL][68] ([i915#2122])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk3/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][69] ([i915#2672]) +8 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([i915#6375])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
    - shard-tglb:         NOTRUN -> [SKIP][71] ([i915#2672])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][72] ([i915#2672] / [i915#3555]) +2 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
    - shard-tglb:         NOTRUN -> [SKIP][73] ([i915#6497]) +2 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-apl:          NOTRUN -> [SKIP][74] ([fdo#109271]) +131 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt:
    - shard-iclb:         NOTRUN -> [SKIP][75] ([fdo#109280]) +12 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-tglb:         NOTRUN -> [SKIP][76] ([fdo#109280] / [fdo#111825]) +3 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-snb:          NOTRUN -> [SKIP][77] ([fdo#109271]) +115 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch:
    - shard-iclb:         NOTRUN -> [SKIP][78] ([i915#3555])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb8/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
    - shard-apl:          NOTRUN -> [FAIL][79] ([fdo#108145] / [i915#265]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
    - shard-glk:          NOTRUN -> [FAIL][80] ([fdo#108145] / [i915#265])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html

  * igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-edp-1:
    - shard-iclb:         NOTRUN -> [SKIP][81] ([i915#5176]) +2 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-edp-1.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1:
    - shard-iclb:         [PASS][82] -> [SKIP][83] ([i915#5235]) +2 similar issues
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb1/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html

  * igt@kms_psr@psr2_basic:
    - shard-tglb:         NOTRUN -> [FAIL][84] ([i915#132] / [i915#3467])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@kms_psr@psr2_basic.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-glk:          NOTRUN -> [SKIP][85] ([fdo#109271]) +43 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk7/igt@kms_psr@psr2_sprite_blt.html
    - shard-iclb:         NOTRUN -> [SKIP][86] ([fdo#109441]) +1 similar issue
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][87] -> [SKIP][88] ([fdo#109441]) +1 similar issue
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-iclb:         NOTRUN -> [SKIP][89] ([i915#5289])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#111615] / [i915#5289])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_setmode@basic@pipe-a-vga-1:
    - shard-snb:          NOTRUN -> [FAIL][91] ([i915#5465]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb7/igt@kms_setmode@basic@pipe-a-vga-1.html

  * igt@nouveau_crc@pipe-b-source-rg:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([i915#2530]) +1 similar issue
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@nouveau_crc@pipe-b-source-rg.html

  * igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame:
    - shard-tglb:         NOTRUN -> [SKIP][93] ([i915#2530])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb3/igt@nouveau_crc@pipe-c-ctx-flip-skip-current-frame.html

  * igt@prime_nv_test@nv_write_i915_gtt_mmap_read:
    - shard-iclb:         NOTRUN -> [SKIP][94] ([fdo#109291]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb8/igt@prime_nv_test@nv_write_i915_gtt_mmap_read.html

  * igt@sysfs_clients@fair-0:
    - shard-apl:          NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#2994]) +1 similar issue
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@sysfs_clients@fair-0.html
    - shard-tglb:         NOTRUN -> [SKIP][96] ([i915#2994])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb7/igt@sysfs_clients@fair-0.html
    - shard-glk:          NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#2994])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@sysfs_clients@fair-0.html
    - shard-iclb:         NOTRUN -> [SKIP][98] ([i915#2994])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@sysfs_clients@fair-0.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-snb:          [DMESG-WARN][99] ([i915#4528]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-snb7/igt@core_hotunplug@unbind-rebind.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-snb5/igt@core_hotunplug@unbind-rebind.html

  * igt@gem_ctx_isolation@preservation-s3@vecs0:
    - shard-iclb:         [SKIP][101] -> [PASS][102] +3 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb5/igt@gem_ctx_isolation@preservation-s3@vecs0.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb5/igt@gem_ctx_isolation@preservation-s3@vecs0.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-iclb:         [SKIP][103] ([i915#4525]) -> [PASS][104] +2 similar issues
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb3/igt@gem_exec_balancer@parallel-keep-in-fence.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-glk:          [FAIL][105] ([i915#2842]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk3/igt@gem_exec_fair@basic-none@vcs0.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk9/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-apl:          [FAIL][107] ([i915#2842]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-tglb:         [FAIL][109] ([i915#2842]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-tglb1/igt@gem_exec_fair@basic-pace@vecs0.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-tglb6/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][111] ([i915#2842]) -> [PASS][112]
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb1/igt@gem_exec_fair@basic-throttle@rcs0.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@i915_selftest@perf@request:
    - shard-iclb:         [DMESG-FAIL][113] ([i915#4391]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb7/igt@i915_selftest@perf@request.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@i915_selftest@perf@request.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
    - shard-apl:          [FAIL][115] ([i915#2346]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html

  * igt@kms_dp_aux_dev:
    - shard-iclb:         [DMESG-WARN][117] ([i915#4391]) -> [PASS][118] +1 similar issue
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb7/igt@kms_dp_aux_dev.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_dp_aux_dev.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1:
    - shard-iclb:         [DMESG-WARN][119] ([i915#2867]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-edp-1.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
    - shard-apl:          [DMESG-WARN][121] ([i915#180]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [SKIP][123] ([fdo#109441]) -> [PASS][124] +2 similar issues
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb5/igt@kms_psr@psr2_no_drrs.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_psr@psr2_no_drrs.html

  * igt@perf@stress-open-close:
    - shard-glk:          [INCOMPLETE][125] ([i915#5213]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-glk8/igt@perf@stress-open-close.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-glk5/igt@perf@stress-open-close.html

  
#### Warnings ####

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-iclb:         [SKIP][127] ([i915#588]) -> [SKIP][128] ([i915#658])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
    - shard-iclb:         [SKIP][129] ([i915#2920]) -> [SKIP][130] ([i915#658]) +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb8/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
    - shard-iclb:         [SKIP][131] ([fdo#111068] / [i915#658]) -> [SKIP][132] ([i915#2920])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-iclb:         [FAIL][133] ([i915#5939]) -> [SKIP][134] ([fdo#109642] / [fdo#111068] / [i915#658])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-iclb2/igt@kms_psr2_su@page_flip-nv12.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-iclb6/igt@kms_psr2_su@page_flip-nv12.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138]) ([fdo#109271] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl3/igt@runner@aborted.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl2/igt@runner@aborted.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl7/igt@runner@aborted.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12064/shard-apl1/igt@runner@aborted.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl3/igt@runner@aborted.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl6/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl1/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/shard-apl8/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
  [fdo#111066]: https://bugs.freedesktop.org/show_bug.cgi?id=111066
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
  [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
  [i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
  [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
  [i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4765]: https://gitlab.freedesktop.org/drm/intel/issues/4765
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
  [i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
  [i915#5939]: https://gitlab.freedesktop.org/drm/intel/issues/5939
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6375]: https://gitlab.freedesktop.org/drm/intel/issues/6375
  [i915#6403]: https://gitlab.freedesktop.org/drm/intel/issues/6403
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
  [i915#768]: https://gitlab.freedesktop.org/drm/intel/issues/768


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6642 -> IGTPW_7725
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_12064: deda08d41aef283357a629e7ddb9a7f5e3616d74 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_7725: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html
  IGT_6642: c018ce1d1ab8e570f665cf5d58c9802a44d66cc1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7725/index.html

[-- Attachment #2: Type: text/html, Size: 46798 bytes --]

Re: [igt-dev] [PATCH i-g-t v3 01/12] lib: Fix off-by-one-page in 48b obj.flags

[Kamil Konieczny]

Hi,

On 2022-09-02 at 14:59:56 +0200, Zbigniew Kempczyński wrote:
> From: Chris Wilson <chris.p.wilson@linux.intel.com>
> 
> The kernel checks that the last byte of the object will fit inside the
> 32b GTT window unless the object is marked as being suitable for use
> with 48b addressing. However, the spinner only checked the start of the
> object which depending on the mix of size/alignment, could allow the
> object to straddle the 32b boundary and not be marked as 48b capable.
> 
> Always set 48b for all the objects where ppGTT merites.
> 
> In the process, there was one location where we failed to write the
> upper 32b of the address into the instruction.
> 
> Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
> ---
>  lib/igt_dummyload.c | 63 ++++++++++++++++++++++-----------------------
>  1 file changed, 31 insertions(+), 32 deletions(-)
> 
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index dc1bd51e08..17ae21f567 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -100,12 +100,21 @@ emit_recursive_batch(igt_spin_t *spin,
>  	struct drm_i915_gem_execbuffer2 *execbuf;
>  	struct drm_i915_gem_exec_object2 *obj;
>  	unsigned int flags[GEM_MAX_ENGINES];
> +	unsigned int objflags = 0;
>  	unsigned int nengine;
>  	int fence_fd = -1;
> -	uint64_t addr, addr_scratch, ahnd = opts->ahnd, objflags = 0;
> +	uint64_t addr, addr_scratch, ahnd = opts->ahnd;
>  	uint32_t *cs;
>  	int i;
>  
> +	igt_assert(!(opts->ctx && opts->ctx_id));
> +
> +	r = memset(relocs, 0, sizeof(relocs));
> +	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
> +	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
> +	execbuf->flags = I915_EXEC_NO_RELOC;
> +	obj = memset(spin->obj, 0, sizeof(spin->obj));
> +
>  	/*
>  	 * Pick a random location for our spinner et al.
>  	 *
> @@ -121,8 +130,12 @@ emit_recursive_batch(igt_spin_t *spin,
>  	 * that wrap.
>  	 */
>  
> +	addr = gem_aperture_size(fd) / 2;

imho this divide by 2 is a bit too early.

> +	if (addr >> 32)
> +		objflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +
>  	if (!ahnd) {
> -		addr = gem_aperture_size(fd) / 2;
> +		addr /= 2;

imho this is a bit too restrictive, that will use 1/8 of address
space, while the best will be from 1/4 ... 3/4

>  		if (addr >> 31)
>  			addr = 1u << 31;
>  		addr += random() % addr / 2;

Maybe here it should be:
		size = 1/2 * aperture;
  		addr += random() % size;

Regards,
Kamil

> @@ -131,8 +144,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  		objflags |= EXEC_OBJECT_PINNED;
>  	}
>  
> -	igt_assert(!(opts->ctx && opts->ctx_id));
> -
>  	nengine = 0;
>  	if (opts->engine == ALL_ENGINES) {
>  		struct intel_execution_engine2 *engine;
> @@ -150,11 +161,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  	}
>  	igt_require(nengine);
>  
> -	memset(relocs, 0, sizeof(relocs));
> -	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
> -	execbuf->flags = I915_EXEC_NO_RELOC;
> -	obj = memset(spin->obj, 0, sizeof(spin->obj));
> -
>  	obj[BATCH].handle =
>  		handle_create(fd, BATCH_SIZE, opts->flags, &spin->batch);
>  	if (!spin->batch) {
> @@ -175,9 +181,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  							   BATCH_SIZE, 0,
>  							   ALLOC_STRATEGY_LOW_TO_HIGH);
>  	obj[BATCH].offset = CANONICAL(addr);
> -	obj[BATCH].flags |= objflags;
> -	if (obj[BATCH].offset >= (1ull << 32))
> -		obj[BATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +	obj[BATCH].flags = objflags;
>  
>  	addr += BATCH_SIZE;
>  
> @@ -192,27 +196,23 @@ emit_recursive_batch(igt_spin_t *spin,
>  
>  		obj[SCRATCH].handle = opts->dependency;
>  		obj[SCRATCH].offset = CANONICAL(addr_scratch);
> -		obj[SCRATCH].flags |= objflags;
> -		if (obj[SCRATCH].offset >= (1ull << 32))
> -			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +		obj[SCRATCH].flags = objflags;
>  
>  		if (!(opts->flags & IGT_SPIN_SOFTDEP)) {
>  			obj[SCRATCH].flags |= EXEC_OBJECT_WRITE;
>  
>  			/* dummy write to dependency */
> -			r = &relocs[obj[BATCH].relocation_count++];
>  			r->presumed_offset = obj[SCRATCH].offset;
>  			r->target_handle = obj[SCRATCH].handle;
>  			r->offset = sizeof(uint32_t) * 1020;
>  			r->delta = 0;
>  			r->read_domains = I915_GEM_DOMAIN_RENDER;
>  			r->write_domain = I915_GEM_DOMAIN_RENDER;
> +			r++;
>  		}
>  
>  		execbuf->buffer_count++;
>  	} else if (opts->flags & IGT_SPIN_POLL_RUN) {
> -		r = &relocs[obj[BATCH].relocation_count++];
> -
>  		igt_assert(!opts->dependency);
>  
>  		if (gen == 4 || gen == 5) {
> @@ -244,6 +244,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  								   ALLOC_STRATEGY_LOW_TO_HIGH);
>  		addr += 4096; /* guard page */
>  		obj[SCRATCH].offset = CANONICAL(addr);
> +		obj[SCRATCH].flags = objflags;
>  		addr += 4096;
>  
>  		igt_assert_eq(spin->poll[SPIN_POLL_START_IDX], 0);
> @@ -253,10 +254,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  		r->offset = sizeof(uint32_t) * 1;
>  		r->delta = sizeof(uint32_t) * SPIN_POLL_START_IDX;
>  
> -		obj[SCRATCH].flags |= objflags;
> -		if (obj[SCRATCH].offset >= (1ull << 32))
> -			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> -
>  		*cs++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
>  
>  		if (gen >= 8) {
> @@ -274,6 +271,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  		*cs++ = 1;
>  
>  		execbuf->buffer_count++;
> +		r++;
>  	}
>  
>  	spin->handle = obj[BATCH].handle;
> @@ -314,8 +312,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  	 * no matter how they modify it (from either the GPU or CPU).
>  	 */
>  	if (gen >= 8) { /* arbitrary cutoff between ring/execlists submission */
> -		r = &relocs[obj[BATCH].relocation_count++];
> -
>  		/*
>  		 * On Sandybridge+ the comparison is a strict greater-than:
>  		 * if the value at spin->condition is greater than BB_END,
> @@ -334,15 +330,17 @@ emit_recursive_batch(igt_spin_t *spin,
>  		r->offset = (cs + 2 - spin->batch) * sizeof(*cs);
>  		r->read_domains = I915_GEM_DOMAIN_COMMAND;
>  		r->delta = (spin->condition - spin->batch) * sizeof(*cs);
> +		igt_assert(r->delta < 4096);
>  
>  		*cs++ = MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE | 2;
>  		*cs++ = MI_BATCH_BUFFER_END;
>  		*cs++ = r->presumed_offset + r->delta;
> -		*cs++ = 0;
> +		*cs++ = r->presumed_offset >> 32;
> +
> +		r++;
>  	}
>  
>  	/* recurse */
> -	r = &relocs[obj[BATCH].relocation_count++];
>  	r->target_handle = obj[BATCH].handle;
>  	r->presumed_offset = obj[BATCH].offset;
>  	r->offset = (cs + 1 - spin->batch) * sizeof(*cs);
> @@ -363,11 +361,10 @@ emit_recursive_batch(igt_spin_t *spin,
>  		*cs = r->presumed_offset + r->delta;
>  		cs++;
>  	}
> -	obj[BATCH].relocs_ptr = to_user_pointer(relocs);
> +	r++;
>  
>  	execbuf->buffers_ptr =
>  	       	to_user_pointer(obj + (2 - execbuf->buffer_count));
> -	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
>  
>  	if (opts->flags & IGT_SPIN_FENCE_OUT)
>  		execbuf->flags |= I915_EXEC_FENCE_OUT;
> @@ -382,14 +379,16 @@ emit_recursive_batch(igt_spin_t *spin,
>  		execbuf->rsvd2 = opts->fence;
>  	}
>  
> +	/* For allocator we have to rid of relocation_count */
> +	if (!ahnd) {
> +		obj[BATCH].relocs_ptr = to_user_pointer(relocs);
> +		obj[BATCH].relocation_count = r - relocs;
> +	}
> +
>  	for (i = 0; i < nengine; i++) {
>  		execbuf->flags &= ~ENGINE_MASK;
>  		execbuf->flags |= flags[i];
>  
> -		/* For allocator we have to rid of relocation_count */
> -		for (int j = 0; j < ARRAY_SIZE(spin->obj) && ahnd; j++)
> -			spin->obj[j].relocation_count = 0;
> -
>  		gem_execbuf_wr(fd, execbuf);
>  
>  		if (opts->flags & IGT_SPIN_FENCE_OUT) {
> -- 
> 2.34.1
> 

Re: [igt-dev] [PATCH i-g-t v3 01/12] lib: Fix off-by-one-page in 48b obj.flags

[Kamil Konieczny]

Hi,

On 2022-09-02 at 14:59:56 +0200, Zbigniew Kempczyński wrote:
> From: Chris Wilson <chris.p.wilson@linux.intel.com>
> 
> The kernel checks that the last byte of the object will fit inside the
> 32b GTT window unless the object is marked as being suitable for use
> with 48b addressing. However, the spinner only checked the start of the
> object which depending on the mix of size/alignment, could allow the
> object to straddle the 32b boundary and not be marked as 48b capable.
> 
> Always set 48b for all the objects where ppGTT merites.
> 
> In the process, there was one location where we failed to write the
> upper 32b of the address into the instruction.
> 
> Signed-off-by: Chris Wilson <chris.p.wilson@linux.intel.com>
> ---
>  lib/igt_dummyload.c | 63 ++++++++++++++++++++++-----------------------
>  1 file changed, 31 insertions(+), 32 deletions(-)
> 
> diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
> index dc1bd51e08..17ae21f567 100644
> --- a/lib/igt_dummyload.c
> +++ b/lib/igt_dummyload.c
> @@ -100,12 +100,21 @@ emit_recursive_batch(igt_spin_t *spin,
>  	struct drm_i915_gem_execbuffer2 *execbuf;
>  	struct drm_i915_gem_exec_object2 *obj;
>  	unsigned int flags[GEM_MAX_ENGINES];
> +	unsigned int objflags = 0;
>  	unsigned int nengine;
>  	int fence_fd = -1;
> -	uint64_t addr, addr_scratch, ahnd = opts->ahnd, objflags = 0;
> +	uint64_t addr, addr_scratch, ahnd = opts->ahnd;
>  	uint32_t *cs;
>  	int i;
>  
> +	igt_assert(!(opts->ctx && opts->ctx_id));
> +
> +	r = memset(relocs, 0, sizeof(relocs));
> +	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
> +	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
> +	execbuf->flags = I915_EXEC_NO_RELOC;
> +	obj = memset(spin->obj, 0, sizeof(spin->obj));
> +
>  	/*
>  	 * Pick a random location for our spinner et al.
>  	 *
> @@ -121,8 +130,12 @@ emit_recursive_batch(igt_spin_t *spin,
>  	 * that wrap.
>  	 */
>  
> +	addr = gem_aperture_size(fd) / 2;
> +	if (addr >> 32)
> +		objflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +

It looks that for ppGTT driver returns 2^48 so this check is ok.

>  	if (!ahnd) {
> -		addr = gem_aperture_size(fd) / 2;
> +		addr /= 2;
>  		if (addr >> 31)
>  			addr = 1u << 31;
>  		addr += random() % addr / 2;
> @@ -131,8 +144,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  		objflags |= EXEC_OBJECT_PINNED;
>  	}
>  
> -	igt_assert(!(opts->ctx && opts->ctx_id));
> -
>  	nengine = 0;
>  	if (opts->engine == ALL_ENGINES) {
>  		struct intel_execution_engine2 *engine;
> @@ -150,11 +161,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  	}
>  	igt_require(nengine);
>  
> -	memset(relocs, 0, sizeof(relocs));
> -	execbuf = memset(&spin->execbuf, 0, sizeof(spin->execbuf));
> -	execbuf->flags = I915_EXEC_NO_RELOC;
> -	obj = memset(spin->obj, 0, sizeof(spin->obj));
> -
>  	obj[BATCH].handle =
>  		handle_create(fd, BATCH_SIZE, opts->flags, &spin->batch);
>  	if (!spin->batch) {
> @@ -175,9 +181,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  							   BATCH_SIZE, 0,
>  							   ALLOC_STRATEGY_LOW_TO_HIGH);
>  	obj[BATCH].offset = CANONICAL(addr);
> -	obj[BATCH].flags |= objflags;
> -	if (obj[BATCH].offset >= (1ull << 32))
> -		obj[BATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +	obj[BATCH].flags = objflags;
>  
>  	addr += BATCH_SIZE;
>  
> @@ -192,27 +196,23 @@ emit_recursive_batch(igt_spin_t *spin,
>  
>  		obj[SCRATCH].handle = opts->dependency;
>  		obj[SCRATCH].offset = CANONICAL(addr_scratch);
> -		obj[SCRATCH].flags |= objflags;
> -		if (obj[SCRATCH].offset >= (1ull << 32))
> -			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> +		obj[SCRATCH].flags = objflags;
>  
>  		if (!(opts->flags & IGT_SPIN_SOFTDEP)) {
>  			obj[SCRATCH].flags |= EXEC_OBJECT_WRITE;
>  
>  			/* dummy write to dependency */
> -			r = &relocs[obj[BATCH].relocation_count++];
>  			r->presumed_offset = obj[SCRATCH].offset;
>  			r->target_handle = obj[SCRATCH].handle;
>  			r->offset = sizeof(uint32_t) * 1020;
>  			r->delta = 0;
>  			r->read_domains = I915_GEM_DOMAIN_RENDER;
>  			r->write_domain = I915_GEM_DOMAIN_RENDER;
> +			r++;
>  		}
>  
>  		execbuf->buffer_count++;
>  	} else if (opts->flags & IGT_SPIN_POLL_RUN) {
> -		r = &relocs[obj[BATCH].relocation_count++];
> -
>  		igt_assert(!opts->dependency);
>  
>  		if (gen == 4 || gen == 5) {
> @@ -244,6 +244,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  								   ALLOC_STRATEGY_LOW_TO_HIGH);
>  		addr += 4096; /* guard page */
>  		obj[SCRATCH].offset = CANONICAL(addr);
> +		obj[SCRATCH].flags = objflags;
>  		addr += 4096;
>  
>  		igt_assert_eq(spin->poll[SPIN_POLL_START_IDX], 0);
> @@ -253,10 +254,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  		r->offset = sizeof(uint32_t) * 1;
>  		r->delta = sizeof(uint32_t) * SPIN_POLL_START_IDX;
>  
> -		obj[SCRATCH].flags |= objflags;
> -		if (obj[SCRATCH].offset >= (1ull << 32))
> -			obj[SCRATCH].flags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
> -
>  		*cs++ = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
>  
>  		if (gen >= 8) {
> @@ -274,6 +271,7 @@ emit_recursive_batch(igt_spin_t *spin,
>  		*cs++ = 1;
>  
>  		execbuf->buffer_count++;
> +		r++;
>  	}
>  
>  	spin->handle = obj[BATCH].handle;
> @@ -314,8 +312,6 @@ emit_recursive_batch(igt_spin_t *spin,
>  	 * no matter how they modify it (from either the GPU or CPU).
>  	 */
>  	if (gen >= 8) { /* arbitrary cutoff between ring/execlists submission */
> -		r = &relocs[obj[BATCH].relocation_count++];
> -
>  		/*
>  		 * On Sandybridge+ the comparison is a strict greater-than:
>  		 * if the value at spin->condition is greater than BB_END,
> @@ -334,15 +330,17 @@ emit_recursive_batch(igt_spin_t *spin,
>  		r->offset = (cs + 2 - spin->batch) * sizeof(*cs);
>  		r->read_domains = I915_GEM_DOMAIN_COMMAND;
>  		r->delta = (spin->condition - spin->batch) * sizeof(*cs);
> +		igt_assert(r->delta < 4096);
>  
>  		*cs++ = MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE | 2;
>  		*cs++ = MI_BATCH_BUFFER_END;
>  		*cs++ = r->presumed_offset + r->delta;
> -		*cs++ = 0;
> +		*cs++ = r->presumed_offset >> 32;
> +
> +		r++;
>  	}
>  
>  	/* recurse */
> -	r = &relocs[obj[BATCH].relocation_count++];
>  	r->target_handle = obj[BATCH].handle;
>  	r->presumed_offset = obj[BATCH].offset;
>  	r->offset = (cs + 1 - spin->batch) * sizeof(*cs);
> @@ -363,11 +361,10 @@ emit_recursive_batch(igt_spin_t *spin,
>  		*cs = r->presumed_offset + r->delta;
>  		cs++;
>  	}
> -	obj[BATCH].relocs_ptr = to_user_pointer(relocs);
> +	r++;
>  
>  	execbuf->buffers_ptr =
>  	       	to_user_pointer(obj + (2 - execbuf->buffer_count));
> -	execbuf->rsvd1 = opts->ctx ? opts->ctx->id : opts->ctx_id;
>  
>  	if (opts->flags & IGT_SPIN_FENCE_OUT)
>  		execbuf->flags |= I915_EXEC_FENCE_OUT;
> @@ -382,14 +379,16 @@ emit_recursive_batch(igt_spin_t *spin,
>  		execbuf->rsvd2 = opts->fence;
>  	}
>  
> +	/* For allocator we have to rid of relocation_count */
_______ ^
This comment is not valid here, code below do different action.

With this fixed,
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>

> +	if (!ahnd) {
> +		obj[BATCH].relocs_ptr = to_user_pointer(relocs);
> +		obj[BATCH].relocation_count = r - relocs;
> +	}
> +
>  	for (i = 0; i < nengine; i++) {
>  		execbuf->flags &= ~ENGINE_MASK;
>  		execbuf->flags |= flags[i];
>  
> -		/* For allocator we have to rid of relocation_count */
> -		for (int j = 0; j < ARRAY_SIZE(spin->obj) && ahnd; j++)
> -			spin->obj[j].relocation_count = 0;
> -
>  		gem_execbuf_wr(fd, execbuf);
>  
>  		if (opts->flags & IGT_SPIN_FENCE_OUT) {
> -- 
> 2.34.1
>