From: Colin Foster <colin.foster@in-advantage.com> To: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Terry Bowman <terry.bowman@amd.com>, Vladimir Oltean <vladimir.oltean@nxp.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Andy Shevchenko <andy.shevchenko@gmail.com>, Dan Williams <dan.j.williams@intel.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, UNGLinuxDriver@microchip.com, Steen Hegelund <Steen.Hegelund@microchip.com>, Lars Povlsen <lars.povlsen@microchip.com>, Linus Walleij <linus.walleij@linaro.org>, Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>, Eric Dumazet <edumazet@google.com>, "David S. Miller" <davem@davemloft.net>, Russell King <linux@armlinux.org.uk>, Heiner Kallweit <hkallweit1@gmail.com>, Andrew Lunn <andrew@lunn.ch>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh+dt@kernel.org>, Lee Jones <lee@kernel.org>, katie.morris@in-advantage.com, Rob Herring <robh@kernel.org> Subject: [RESEND PATCH v16 mfd 7/8] dt-bindings: mfd: ocelot: add bindings for VSC7512 Date: Mon, 5 Sep 2022 09:21:31 -0700 [thread overview] Message-ID: <20220905162132.2943088-8-colin.foster@in-advantage.com> (raw) In-Reply-To: <20220905162132.2943088-1-colin.foster@in-advantage.com> Add devicetree bindings for SPI-controlled Ocelot chips, specifically the VSC7512. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- (No changes since v14) v14 * Add Vladimir Reviewed tag --- .../devicetree/bindings/mfd/mscc,ocelot.yaml | 160 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 161 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml new file mode 100644 index 000000000000..8bf45a5673a4 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ocelot Externally-Controlled Ethernet Switch + +maintainers: + - Colin Foster <colin.foster@in-advantage.com> + +description: | + The Ocelot ethernet switch family contains chips that have an internal CPU + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have + the option to be controlled externally, which is the purpose of this driver. + + The switch family is a multi-port networking switch that supports many + interfaces. Additionally, the device can perform pin control, MDIO buses, and + external GPIO expanders. + +properties: + compatible: + enum: + - mscc,vsc7512 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + spi-max-frequency: + maxItems: 1 + +patternProperties: + "^pinctrl@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml + + "^gpio@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml + properties: + compatible: + enum: + - mscc,ocelot-sgpio + + "^mdio@[0-9a-f]+$": + type: object + $ref: /schemas/net/mscc,miim.yaml + properties: + compatible: + enum: + - mscc,ocelot-miim + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - spi-max-frequency + +additionalProperties: false + +examples: + - | + ocelot_clock: ocelot-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + soc@0 { + compatible = "mscc,vsc7512"; + spi-max-frequency = <2500000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mdio@7107009c { + compatible = "mscc,ocelot-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7107009c 0x24>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + mdio@710700c0 { + compatible = "mscc,ocelot-miim"; + pinctrl-names = "default"; + pinctrl-0 = <&miim1_pins>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x710700c0 0x24>; + + sw_phy4: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + reg = <0x71070034 0x6c>; + + sgpio_pins: sgpio-pins { + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + function = "sg0"; + }; + + miim1_pins: miim1-pins { + pins = "GPIO_14", "GPIO_15"; + function = "miim"; + }; + }; + + gpio@710700f8 { + compatible = "mscc,ocelot-sgpio"; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <12500000>; + clocks = <&ocelot_clock>; + microchip,sgpio-port-ranges = <0 15>; + pinctrl-names = "default"; + pinctrl-0 = <&sgpio_pins>; + reg = <0x710700f8 0x100>; + + sgpio_in0: gpio@0 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <0>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + + sgpio_out1: gpio@1 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <1>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + }; + }; + }; + +... + diff --git a/MAINTAINERS b/MAINTAINERS index e0732e9f9090..a5df3b0b9601 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14744,6 +14744,7 @@ F: tools/testing/selftests/drivers/net/ocelot/* OCELOT EXTERNAL SWITCH CONTROL M: Colin Foster <colin.foster@in-advantage.com> S: Supported +F: Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml F: include/linux/mfd/ocelot.h OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Colin Foster <colin.foster@in-advantage.com> To: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Terry Bowman <terry.bowman@amd.com>, Vladimir Oltean <vladimir.oltean@nxp.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Andy Shevchenko <andy.shevchenko@gmail.com>, Dan Williams <dan.j.williams@intel.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, UNGLinuxDriver@microchip.com, Steen Hegelund <Steen.Hegelund@microchip.com>, Lars Povlsen <lars.povlsen@microchip.com>, Linus Walleij <linus.walleij@linaro.org>, Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>, Eric Dumazet <edumazet@google.com>, "David S. Miller" <davem@davemloft.net>, Russell King <linux@armlinux.org.uk>, Heiner Kallweit <hkallweit1@gmail.com>, Andrew Lunn <andrew@lunn.ch>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Rob Herring <robh+dt@kernel.org>, Lee Jones <lee@kernel.org>, katie.morris@in-advantage.com, Rob Herring <robh@kernel.org> Subject: [RESEND PATCH v16 mfd 7/8] dt-bindings: mfd: ocelot: add bindings for VSC7512 Date: Mon, 5 Sep 2022 09:21:31 -0700 [thread overview] Message-ID: <20220905162132.2943088-8-colin.foster@in-advantage.com> (raw) In-Reply-To: <20220905162132.2943088-1-colin.foster@in-advantage.com> Add devicetree bindings for SPI-controlled Ocelot chips, specifically the VSC7512. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- (No changes since v14) v14 * Add Vladimir Reviewed tag --- .../devicetree/bindings/mfd/mscc,ocelot.yaml | 160 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 161 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml new file mode 100644 index 000000000000..8bf45a5673a4 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ocelot Externally-Controlled Ethernet Switch + +maintainers: + - Colin Foster <colin.foster@in-advantage.com> + +description: | + The Ocelot ethernet switch family contains chips that have an internal CPU + (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have + the option to be controlled externally, which is the purpose of this driver. + + The switch family is a multi-port networking switch that supports many + interfaces. Additionally, the device can perform pin control, MDIO buses, and + external GPIO expanders. + +properties: + compatible: + enum: + - mscc,vsc7512 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + spi-max-frequency: + maxItems: 1 + +patternProperties: + "^pinctrl@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml + + "^gpio@[0-9a-f]+$": + type: object + $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml + properties: + compatible: + enum: + - mscc,ocelot-sgpio + + "^mdio@[0-9a-f]+$": + type: object + $ref: /schemas/net/mscc,miim.yaml + properties: + compatible: + enum: + - mscc,ocelot-miim + +required: + - compatible + - reg + - '#address-cells' + - '#size-cells' + - spi-max-frequency + +additionalProperties: false + +examples: + - | + ocelot_clock: ocelot-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + soc@0 { + compatible = "mscc,vsc7512"; + spi-max-frequency = <2500000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + mdio@7107009c { + compatible = "mscc,ocelot-miim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7107009c 0x24>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + + mdio@710700c0 { + compatible = "mscc,ocelot-miim"; + pinctrl-names = "default"; + pinctrl-0 = <&miim1_pins>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x710700c0 0x24>; + + sw_phy4: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + reg = <0x71070034 0x6c>; + + sgpio_pins: sgpio-pins { + pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3"; + function = "sg0"; + }; + + miim1_pins: miim1-pins { + pins = "GPIO_14", "GPIO_15"; + function = "miim"; + }; + }; + + gpio@710700f8 { + compatible = "mscc,ocelot-sgpio"; + #address-cells = <1>; + #size-cells = <0>; + bus-frequency = <12500000>; + clocks = <&ocelot_clock>; + microchip,sgpio-port-ranges = <0 15>; + pinctrl-names = "default"; + pinctrl-0 = <&sgpio_pins>; + reg = <0x710700f8 0x100>; + + sgpio_in0: gpio@0 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <0>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + + sgpio_out1: gpio@1 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <1>; + gpio-controller; + #gpio-cells = <3>; + ngpios = <64>; + }; + }; + }; + }; + +... + diff --git a/MAINTAINERS b/MAINTAINERS index e0732e9f9090..a5df3b0b9601 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14744,6 +14744,7 @@ F: tools/testing/selftests/drivers/net/ocelot/* OCELOT EXTERNAL SWITCH CONTROL M: Colin Foster <colin.foster@in-advantage.com> S: Supported +F: Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml F: include/linux/mfd/ocelot.h OCXL (Open Coherent Accelerator Processor Interface OpenCAPI) DRIVER -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-05 16:22 UTC|newest] Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-05 16:21 [RESEND PATCH v16 mfd 0/8] add support for VSC7512 control over SPI Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 1/8] mfd: ocelot: add helper to get regmap from a resource Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:40 ` Lee Jones 2022-09-08 9:40 ` Lee Jones 2022-09-08 14:22 ` Vladimir Oltean 2022-09-08 14:22 ` Vladimir Oltean 2022-09-08 15:04 ` Colin Foster 2022-09-08 15:04 ` Colin Foster 2022-09-09 7:21 ` Lee Jones 2022-09-09 7:21 ` Lee Jones 2022-09-19 17:14 ` Jakub Kicinski 2022-09-19 17:14 ` Jakub Kicinski 2022-09-19 19:05 ` Colin Foster 2022-09-19 19:05 ` Colin Foster 2022-09-08 15:08 ` Colin Foster 2022-09-08 15:08 ` Colin Foster 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 2/8] net: mdio: mscc-miim: add ability to be used in a non-mmio configuration Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:41 ` Lee Jones 2022-09-08 9:41 ` Lee Jones 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 3/8] pinctrl: ocelot: " Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:41 ` Lee Jones 2022-09-08 9:41 ` Lee Jones 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 4/8] pinctrl: microchip-sgpio: allow sgpio driver to be used as a module Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:42 ` Lee Jones 2022-09-08 9:42 ` Lee Jones 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 5/8] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:42 ` Lee Jones 2022-09-08 9:42 ` Lee Jones 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 6/8] resource: add define macro for register address resources Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:43 ` Lee Jones 2022-09-08 9:43 ` Lee Jones 2022-09-05 16:21 ` Colin Foster [this message] 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 7/8] dt-bindings: mfd: ocelot: add bindings for VSC7512 Colin Foster 2022-09-08 9:43 ` Lee Jones 2022-09-08 9:43 ` Lee Jones 2022-10-09 15:38 ` Krzysztof Kozlowski 2022-10-09 15:38 ` Krzysztof Kozlowski 2022-09-05 16:21 ` [RESEND PATCH v16 mfd 8/8] mfd: ocelot: add support for the vsc7512 chip via spi Colin Foster 2022-09-05 16:21 ` Colin Foster 2022-09-08 9:44 ` Lee Jones 2022-09-08 9:44 ` Lee Jones 2022-09-09 6:57 ` [GIT PULL] Immutable branch between MFD, Net and Pinctrl due for the v6.0 merge window Lee Jones 2022-09-09 6:57 ` Lee Jones
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220905162132.2943088-8-colin.foster@in-advantage.com \ --to=colin.foster@in-advantage.com \ --cc=Jonathan.Cameron@huawei.com \ --cc=Steen.Hegelund@microchip.com \ --cc=UNGLinuxDriver@microchip.com \ --cc=andrew@lunn.ch \ --cc=andy.shevchenko@gmail.com \ --cc=dan.j.williams@intel.com \ --cc=davem@davemloft.net \ --cc=devicetree@vger.kernel.org \ --cc=edumazet@google.com \ --cc=gregkh@linuxfoundation.org \ --cc=hkallweit1@gmail.com \ --cc=katie.morris@in-advantage.com \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=kuba@kernel.org \ --cc=lars.povlsen@microchip.com \ --cc=lee@kernel.org \ --cc=linus.walleij@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-gpio@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=netdev@vger.kernel.org \ --cc=pabeni@redhat.com \ --cc=robh+dt@kernel.org \ --cc=robh@kernel.org \ --cc=terry.bowman@amd.com \ --cc=vladimir.oltean@nxp.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.