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* [PATCH 0/4] Further multi-gt handling
@ 2022-09-14 22:04 ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniele Ceraolo Spurio, dri-devel

Now that MTL is going to start providing two GTs, there are a few more
places in the driver that need to iterate over each GT instead of
operating directly on gt0.  Also some more deliberate cleanup is needed,
in cases where we fail GT/engine initialization after the first GT has
been fully setup.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Chris Wilson (1):
  drm/i915/gt: Cleanup partial engine discovery failures

Tvrtko Ursulin (3):
  drm/i915: Make GEM resume all engines
  drm/i915: Make GEM suspend all GTs
  drm/i915: Handle all GTs on driver (un)load paths

 drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 33 ++++++++++++++--
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 ++++++--
 drivers/gpu/drm/i915/i915_driver.c        |  3 +-
 drivers/gpu/drm/i915/i915_gem.c           | 46 +++++++++++++++++------
 4 files changed, 78 insertions(+), 20 deletions(-)

-- 
2.37.3


^ permalink raw reply	[flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 0/4] Further multi-gt handling
@ 2022-09-14 22:04 ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel

Now that MTL is going to start providing two GTs, there are a few more
places in the driver that need to iterate over each GT instead of
operating directly on gt0.  Also some more deliberate cleanup is needed,
in cases where we fail GT/engine initialization after the first GT has
been fully setup.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Chris Wilson (1):
  drm/i915/gt: Cleanup partial engine discovery failures

Tvrtko Ursulin (3):
  drm/i915: Make GEM resume all engines
  drm/i915: Make GEM suspend all GTs
  drm/i915: Handle all GTs on driver (un)load paths

 drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 33 ++++++++++++++--
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 ++++++--
 drivers/gpu/drm/i915/i915_driver.c        |  3 +-
 drivers/gpu/drm/i915/i915_gem.c           | 46 +++++++++++++++++------
 4 files changed, 78 insertions(+), 20 deletions(-)

-- 
2.37.3


^ permalink raw reply	[flat|nested] 22+ messages in thread
* [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
@ 2022-09-14 22:04   ` Matt Roper
  -1 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Janusz Krzysztofik, Chris Wilson, dri-devel, Chris Wilson

From: Chris Wilson <chris.p.wilson@intel.com>

If we abort driver initialisation in the middle of gt/engine discovery,
some engines will be fully setup and some not. Those incompletely setup
engines only have 'engine->release == NULL' and so will leak any of the
common objects allocated.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 1f7188129cd1..bff12b4ec314 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1196,6 +1196,12 @@ void intel_engine_destroy_pinned_context(struct intel_context *ce)
 	intel_context_put(ce);
 }
 
+static void destroy_pinned_context(struct intel_context *ce)
+{
+	if (ce)
+		intel_engine_destroy_pinned_context(ce);
+}
+
 static struct intel_context *
 create_kernel_context(struct intel_engine_cs *engine)
 {
@@ -1274,8 +1280,13 @@ int intel_engines_init(struct intel_gt *gt)
 			return err;
 
 		err = setup(engine);
-		if (err)
+		if (err) {
+			intel_engine_cleanup_common(engine);
 			return err;
+		}
+
+		/* The backend should now be responsible for cleanup */
+		GEM_BUG_ON(engine->release == NULL);
 
 		err = engine_init_common(engine);
 		if (err)
@@ -1307,8 +1318,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
 	if (engine->default_state)
 		fput(engine->default_state);
 
-	if (engine->kernel_context)
-		intel_engine_destroy_pinned_context(engine->kernel_context);
+	destroy_pinned_context(engine->kernel_context);
 
 	GEM_BUG_ON(!llist_empty(&engine->barrier_tasks));
 	cleanup_status_page(engine);
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures
@ 2022-09-14 22:04   ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Chris Wilson, dri-devel, Chris Wilson

From: Chris Wilson <chris.p.wilson@intel.com>

If we abort driver initialisation in the middle of gt/engine discovery,
some engines will be fully setup and some not. Those incompletely setup
engines only have 'engine->release == NULL' and so will leak any of the
common objects allocated.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 1f7188129cd1..bff12b4ec314 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1196,6 +1196,12 @@ void intel_engine_destroy_pinned_context(struct intel_context *ce)
 	intel_context_put(ce);
 }
 
+static void destroy_pinned_context(struct intel_context *ce)
+{
+	if (ce)
+		intel_engine_destroy_pinned_context(ce);
+}
+
 static struct intel_context *
 create_kernel_context(struct intel_engine_cs *engine)
 {
@@ -1274,8 +1280,13 @@ int intel_engines_init(struct intel_gt *gt)
 			return err;
 
 		err = setup(engine);
-		if (err)
+		if (err) {
+			intel_engine_cleanup_common(engine);
 			return err;
+		}
+
+		/* The backend should now be responsible for cleanup */
+		GEM_BUG_ON(engine->release == NULL);
 
 		err = engine_init_common(engine);
 		if (err)
@@ -1307,8 +1318,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
 	if (engine->default_state)
 		fput(engine->default_state);
 
-	if (engine->kernel_context)
-		intel_engine_destroy_pinned_context(engine->kernel_context);
+	destroy_pinned_context(engine->kernel_context);
 
 	GEM_BUG_ON(!llist_empty(&engine->barrier_tasks));
 	cleanup_status_page(engine);
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [PATCH 2/4] drm/i915: Make GEM resume all engines
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
@ 2022-09-14 22:04   ` Matt Roper
  -1 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Andi Shyti, dri-devel, Tvrtko Ursulin

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Walk all GTs from i915_gem_resume when resuming engines.

Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 3428f735e786..2c80cc8362b6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -212,7 +212,8 @@ int i915_gem_freeze_late(struct drm_i915_private *i915)
 
 void i915_gem_resume(struct drm_i915_private *i915)
 {
-	int ret;
+	struct intel_gt *gt;
+	int ret, i, j;
 
 	GEM_TRACE("%s\n", dev_name(i915->drm.dev));
 
@@ -224,8 +225,25 @@ void i915_gem_resume(struct drm_i915_private *i915)
 	 * guarantee that the context image is complete. So let's just reset
 	 * it and start again.
 	 */
-	intel_gt_resume(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		if (intel_gt_resume(gt))
+			goto err_wedged;
 
 	ret = lmem_restore(i915, I915_TTM_BACKUP_ALLOW_GPU);
 	GEM_WARN_ON(ret);
+
+	return;
+
+err_wedged:
+	for_each_gt(gt, i915, j) {
+		if (!intel_gt_is_wedged(gt)) {
+			dev_err(i915->drm.dev,
+				"Failed to re-initialize GPU[%u], declaring it wedged!\n",
+				j);
+			intel_gt_set_wedged(gt);
+		}
+
+		if (j == i)
+			break;
+	}
 }
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915: Make GEM resume all engines
@ 2022-09-14 22:04   ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Andi Shyti, dri-devel

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Walk all GTs from i915_gem_resume when resuming engines.

Cc: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 3428f735e786..2c80cc8362b6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -212,7 +212,8 @@ int i915_gem_freeze_late(struct drm_i915_private *i915)
 
 void i915_gem_resume(struct drm_i915_private *i915)
 {
-	int ret;
+	struct intel_gt *gt;
+	int ret, i, j;
 
 	GEM_TRACE("%s\n", dev_name(i915->drm.dev));
 
@@ -224,8 +225,25 @@ void i915_gem_resume(struct drm_i915_private *i915)
 	 * guarantee that the context image is complete. So let's just reset
 	 * it and start again.
 	 */
-	intel_gt_resume(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		if (intel_gt_resume(gt))
+			goto err_wedged;
 
 	ret = lmem_restore(i915, I915_TTM_BACKUP_ALLOW_GPU);
 	GEM_WARN_ON(ret);
+
+	return;
+
+err_wedged:
+	for_each_gt(gt, i915, j) {
+		if (!intel_gt_is_wedged(gt)) {
+			dev_err(i915->drm.dev,
+				"Failed to re-initialize GPU[%u], declaring it wedged!\n",
+				j);
+			intel_gt_set_wedged(gt);
+		}
+
+		if (j == i)
+			break;
+	}
 }
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [PATCH 3/4] drm/i915: Make GEM suspend all GTs
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
@ 2022-09-14 22:04   ` Matt Roper
  -1 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel, Tvrtko Ursulin

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Walk all GTs when suspending.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 2c80cc8362b6..e5bfb6be9f7a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -22,6 +22,9 @@
 
 void i915_gem_suspend(struct drm_i915_private *i915)
 {
+	struct intel_gt *gt;
+	unsigned int i;
+
 	GEM_TRACE("%s\n", dev_name(i915->drm.dev));
 
 	intel_wakeref_auto(&to_gt(i915)->userfault_wakeref, 0);
@@ -36,7 +39,8 @@ void i915_gem_suspend(struct drm_i915_private *i915)
 	 * state. Fortunately, the kernel_context is disposable and we do
 	 * not rely on its state.
 	 */
-	intel_gt_suspend_prepare(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		intel_gt_suspend_prepare(gt);
 
 	i915_gem_drain_freed_objects(i915);
 }
@@ -131,7 +135,9 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 		&i915->mm.purge_list,
 		NULL
 	}, **phase;
+	struct intel_gt *gt;
 	unsigned long flags;
+	unsigned int i;
 	bool flush = false;
 
 	/*
@@ -154,7 +160,8 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 	 * machine in an unusable condition.
 	 */
 
-	intel_gt_suspend_late(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		intel_gt_suspend_late(gt);
 
 	spin_lock_irqsave(&i915->mm.obj_lock, flags);
 	for (phase = phases; *phase; phase++) {
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915: Make GEM suspend all GTs
@ 2022-09-14 22:04   ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Walk all GTs when suspending.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 2c80cc8362b6..e5bfb6be9f7a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -22,6 +22,9 @@
 
 void i915_gem_suspend(struct drm_i915_private *i915)
 {
+	struct intel_gt *gt;
+	unsigned int i;
+
 	GEM_TRACE("%s\n", dev_name(i915->drm.dev));
 
 	intel_wakeref_auto(&to_gt(i915)->userfault_wakeref, 0);
@@ -36,7 +39,8 @@ void i915_gem_suspend(struct drm_i915_private *i915)
 	 * state. Fortunately, the kernel_context is disposable and we do
 	 * not rely on its state.
 	 */
-	intel_gt_suspend_prepare(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		intel_gt_suspend_prepare(gt);
 
 	i915_gem_drain_freed_objects(i915);
 }
@@ -131,7 +135,9 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 		&i915->mm.purge_list,
 		NULL
 	}, **phase;
+	struct intel_gt *gt;
 	unsigned long flags;
+	unsigned int i;
 	bool flush = false;
 
 	/*
@@ -154,7 +160,8 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
 	 * machine in an unusable condition.
 	 */
 
-	intel_gt_suspend_late(to_gt(i915));
+	for_each_gt(gt, i915, i)
+		intel_gt_suspend_late(gt);
 
 	spin_lock_irqsave(&i915->mm.obj_lock, flags);
 	for (phase = phases; *phase; phase++) {
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
@ 2022-09-14 22:04   ` Matt Roper
  -1 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniele Ceraolo Spurio, dri-devel, Tvrtko Ursulin

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

This, along with the changes already landed in commit 1c66a12ab431
("drm/i915: Handle each GT on init/release and suspend/resume") makes
engines from all GTs actually known to the driver.

To accomplish this we need to sprinkle a lot of for_each_gt calls around
but is otherwise pretty un-eventuful.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c |  3 +-
 drivers/gpu/drm/i915/i915_gem.c    | 46 ++++++++++++++++++++++--------
 2 files changed, 36 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c459eb362c47..9d1fc2477f80 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1661,7 +1661,8 @@ static int intel_runtime_suspend(struct device *kdev)
 
 		intel_runtime_pm_enable_interrupts(dev_priv);
 
-		intel_gt_runtime_resume(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i)
+			intel_gt_runtime_resume(gt);
 
 		enable_rpm_wakeref_asserts(rpm);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f18cc6270b2b..0bf71082f21a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1128,6 +1128,8 @@ void i915_gem_drain_workqueue(struct drm_i915_private *i915)
 
 int i915_gem_init(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
 	int ret;
 
 	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
@@ -1158,9 +1160,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_init_clock_gating(dev_priv);
 
-	ret = intel_gt_init(to_gt(dev_priv));
-	if (ret)
-		goto err_unlock;
+	for_each_gt(gt, dev_priv, i) {
+		ret = intel_gt_init(gt);
+		if (ret)
+			goto err_unlock;
+	}
 
 	return 0;
 
@@ -1173,8 +1177,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 err_unlock:
 	i915_gem_drain_workqueue(dev_priv);
 
-	if (ret != -EIO)
-		intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	if (ret != -EIO) {
+		for_each_gt(gt, dev_priv, i) {
+			intel_gt_driver_remove(gt);
+			intel_gt_driver_release(gt);
+		}
+
+		for_each_gt(gt, dev_priv, i)
+			intel_uc_cleanup_firmwares(&gt->uc);
+	}
 
 	if (ret == -EIO) {
 		/*
@@ -1182,10 +1193,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 		 * as wedged. But we only want to do this when the GPU is angry,
 		 * for all other failure, such as an allocation failure, bail.
 		 */
-		if (!intel_gt_is_wedged(to_gt(dev_priv))) {
-			i915_probe_error(dev_priv,
-					 "Failed to initialize GPU, declaring it wedged!\n");
-			intel_gt_set_wedged(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i) {
+			if (!intel_gt_is_wedged(gt)) {
+				i915_probe_error(dev_priv,
+						"Failed to initialize GPU, declaring it wedged!\n");
+				intel_gt_set_wedged(gt);
+			}
 		}
 
 		/* Minimal basic recovery for KMS */
@@ -1213,10 +1226,14 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
 
 void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
+
 	intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
 
 	i915_gem_suspend_late(dev_priv);
-	intel_gt_driver_remove(to_gt(dev_priv));
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_remove(gt);
 	dev_priv->uabi_engines = RB_ROOT;
 
 	/* Flush any outstanding unpin_work. */
@@ -1227,9 +1244,14 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 
 void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 {
-	intel_gt_driver_release(to_gt(dev_priv));
+	struct intel_gt *gt;
+	unsigned int i;
+
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_release(gt);
 
-	intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	for_each_gt(gt, dev_priv, i)
+		intel_uc_cleanup_firmwares(&gt->uc);
 
 	i915_gem_drain_freed_objects(dev_priv);
 
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths
@ 2022-09-14 22:04   ` Matt Roper
  0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-14 22:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: dri-devel

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

This, along with the changes already landed in commit 1c66a12ab431
("drm/i915: Handle each GT on init/release and suspend/resume") makes
engines from all GTs actually known to the driver.

To accomplish this we need to sprinkle a lot of for_each_gt calls around
but is otherwise pretty un-eventuful.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c |  3 +-
 drivers/gpu/drm/i915/i915_gem.c    | 46 ++++++++++++++++++++++--------
 2 files changed, 36 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c459eb362c47..9d1fc2477f80 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1661,7 +1661,8 @@ static int intel_runtime_suspend(struct device *kdev)
 
 		intel_runtime_pm_enable_interrupts(dev_priv);
 
-		intel_gt_runtime_resume(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i)
+			intel_gt_runtime_resume(gt);
 
 		enable_rpm_wakeref_asserts(rpm);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f18cc6270b2b..0bf71082f21a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1128,6 +1128,8 @@ void i915_gem_drain_workqueue(struct drm_i915_private *i915)
 
 int i915_gem_init(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
 	int ret;
 
 	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
@@ -1158,9 +1160,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_init_clock_gating(dev_priv);
 
-	ret = intel_gt_init(to_gt(dev_priv));
-	if (ret)
-		goto err_unlock;
+	for_each_gt(gt, dev_priv, i) {
+		ret = intel_gt_init(gt);
+		if (ret)
+			goto err_unlock;
+	}
 
 	return 0;
 
@@ -1173,8 +1177,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 err_unlock:
 	i915_gem_drain_workqueue(dev_priv);
 
-	if (ret != -EIO)
-		intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	if (ret != -EIO) {
+		for_each_gt(gt, dev_priv, i) {
+			intel_gt_driver_remove(gt);
+			intel_gt_driver_release(gt);
+		}
+
+		for_each_gt(gt, dev_priv, i)
+			intel_uc_cleanup_firmwares(&gt->uc);
+	}
 
 	if (ret == -EIO) {
 		/*
@@ -1182,10 +1193,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 		 * as wedged. But we only want to do this when the GPU is angry,
 		 * for all other failure, such as an allocation failure, bail.
 		 */
-		if (!intel_gt_is_wedged(to_gt(dev_priv))) {
-			i915_probe_error(dev_priv,
-					 "Failed to initialize GPU, declaring it wedged!\n");
-			intel_gt_set_wedged(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i) {
+			if (!intel_gt_is_wedged(gt)) {
+				i915_probe_error(dev_priv,
+						"Failed to initialize GPU, declaring it wedged!\n");
+				intel_gt_set_wedged(gt);
+			}
 		}
 
 		/* Minimal basic recovery for KMS */
@@ -1213,10 +1226,14 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
 
 void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
+
 	intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
 
 	i915_gem_suspend_late(dev_priv);
-	intel_gt_driver_remove(to_gt(dev_priv));
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_remove(gt);
 	dev_priv->uabi_engines = RB_ROOT;
 
 	/* Flush any outstanding unpin_work. */
@@ -1227,9 +1244,14 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 
 void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 {
-	intel_gt_driver_release(to_gt(dev_priv));
+	struct intel_gt *gt;
+	unsigned int i;
+
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_release(gt);
 
-	intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	for_each_gt(gt, dev_priv, i)
+		intel_uc_cleanup_firmwares(&gt->uc);
 
 	i915_gem_drain_freed_objects(dev_priv);
 
-- 
2.37.3


^ permalink raw reply related	[flat|nested] 22+ messages in thread
* Re: [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths
  2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
@ 2022-09-15  1:01     ` Ceraolo Spurio, Daniele
  -1 siblings, 0 replies; 22+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-09-15  1:01 UTC (permalink / raw)
  To: Matt Roper, intel-gfx; +Cc: dri-devel, Tvrtko Ursulin



On 9/14/2022 3:04 PM, Matt Roper wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> This, along with the changes already landed in commit 1c66a12ab431
> ("drm/i915: Handle each GT on init/release and suspend/resume") makes
> engines from all GTs actually known to the driver.
>
> To accomplish this we need to sprinkle a lot of for_each_gt calls around
> but is otherwise pretty un-eventuful.
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_driver.c |  3 +-
>   drivers/gpu/drm/i915/i915_gem.c    | 46 ++++++++++++++++++++++--------
>   2 files changed, 36 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index c459eb362c47..9d1fc2477f80 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1661,7 +1661,8 @@ static int intel_runtime_suspend(struct device *kdev)
>   
>   		intel_runtime_pm_enable_interrupts(dev_priv);
>   
> -		intel_gt_runtime_resume(to_gt(dev_priv));
> +		for_each_gt(gt, dev_priv, i)
> +			intel_gt_runtime_resume(gt);
>   
>   		enable_rpm_wakeref_asserts(rpm);
>   
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f18cc6270b2b..0bf71082f21a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1128,6 +1128,8 @@ void i915_gem_drain_workqueue(struct drm_i915_private *i915)
>   
>   int i915_gem_init(struct drm_i915_private *dev_priv)
>   {
> +	struct intel_gt *gt;
> +	unsigned int i;
>   	int ret;
>   
>   	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
> @@ -1158,9 +1160,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   	 */
>   	intel_init_clock_gating(dev_priv);
>   
> -	ret = intel_gt_init(to_gt(dev_priv));
> -	if (ret)
> -		goto err_unlock;
> +	for_each_gt(gt, dev_priv, i) {
> +		ret = intel_gt_init(gt);
> +		if (ret)
> +			goto err_unlock;
> +	}
>   
>   	return 0;
>   
> @@ -1173,8 +1177,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   err_unlock:
>   	i915_gem_drain_workqueue(dev_priv);
>   
> -	if (ret != -EIO)
> -		intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
> +	if (ret != -EIO) {
> +		for_each_gt(gt, dev_priv, i) {
> +			intel_gt_driver_remove(gt);
> +			intel_gt_driver_release(gt);
> +		}
> +
> +		for_each_gt(gt, dev_priv, i)
> +			intel_uc_cleanup_firmwares(&gt->uc);

Any reason not to have the uc_cleanup in the same loop as the gt functions?
Also, you're looping intel_uc_cleanup_firmwares but not 
intel_uc_fetch_firmwares(). Not an issue since the cleanup function will 
skip if the fetch was not done, but I though it was worth mentioning. I 
can include the loop for the fetch as part of the support for the media 
GuC (which I'll send after this is merged).

> +	}
>   
>   	if (ret == -EIO) {
>   		/*
> @@ -1182,10 +1193,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   		 * as wedged. But we only want to do this when the GPU is angry,
>   		 * for all other failure, such as an allocation failure, bail.
>   		 */
> -		if (!intel_gt_is_wedged(to_gt(dev_priv))) {
> -			i915_probe_error(dev_priv,
> -					 "Failed to initialize GPU, declaring it wedged!\n");
> -			intel_gt_set_wedged(to_gt(dev_priv));
> +		for_each_gt(gt, dev_priv, i) {
> +			if (!intel_gt_is_wedged(gt)) {
> +				i915_probe_error(dev_priv,
> +						"Failed to initialize GPU, declaring it wedged!\n");
> +				intel_gt_set_wedged(gt);
> +			}
>   		}
>   
>   		/* Minimal basic recovery for KMS */
> @@ -1213,10 +1226,14 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
>   
>   void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
>   {
> +	struct intel_gt *gt;
> +	unsigned int i;
> +
>   	intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
>   
>   	i915_gem_suspend_late(dev_priv);
> -	intel_gt_driver_remove(to_gt(dev_priv));
> +	for_each_gt(gt, dev_priv, i)
> +		intel_gt_driver_remove(gt);
>   	dev_priv->uabi_engines = RB_ROOT;
>   
>   	/* Flush any outstanding unpin_work. */
> @@ -1227,9 +1244,14 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
>   
>   void i915_gem_driver_release(struct drm_i915_private *dev_priv)
>   {
> -	intel_gt_driver_release(to_gt(dev_priv));
> +	struct intel_gt *gt;
> +	unsigned int i;
> +
> +	for_each_gt(gt, dev_priv, i)
> +		intel_gt_driver_release(gt);
>   
> -	intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
> +	for_each_gt(gt, dev_priv, i)
> +		intel_uc_cleanup_firmwares(&gt->uc);

Same here, those can be in the same loop.

Daniele

>   
>   	i915_gem_drain_freed_objects(dev_priv);
>   


^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths
@ 2022-09-15  1:01     ` Ceraolo Spurio, Daniele
  0 siblings, 0 replies; 22+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-09-15  1:01 UTC (permalink / raw)
  To: Matt Roper, intel-gfx; +Cc: dri-devel



On 9/14/2022 3:04 PM, Matt Roper wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> This, along with the changes already landed in commit 1c66a12ab431
> ("drm/i915: Handle each GT on init/release and suspend/resume") makes
> engines from all GTs actually known to the driver.
>
> To accomplish this we need to sprinkle a lot of for_each_gt calls around
> but is otherwise pretty un-eventuful.
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_driver.c |  3 +-
>   drivers/gpu/drm/i915/i915_gem.c    | 46 ++++++++++++++++++++++--------
>   2 files changed, 36 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index c459eb362c47..9d1fc2477f80 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1661,7 +1661,8 @@ static int intel_runtime_suspend(struct device *kdev)
>   
>   		intel_runtime_pm_enable_interrupts(dev_priv);
>   
> -		intel_gt_runtime_resume(to_gt(dev_priv));
> +		for_each_gt(gt, dev_priv, i)
> +			intel_gt_runtime_resume(gt);
>   
>   		enable_rpm_wakeref_asserts(rpm);
>   
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f18cc6270b2b..0bf71082f21a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1128,6 +1128,8 @@ void i915_gem_drain_workqueue(struct drm_i915_private *i915)
>   
>   int i915_gem_init(struct drm_i915_private *dev_priv)
>   {
> +	struct intel_gt *gt;
> +	unsigned int i;
>   	int ret;
>   
>   	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
> @@ -1158,9 +1160,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   	 */
>   	intel_init_clock_gating(dev_priv);
>   
> -	ret = intel_gt_init(to_gt(dev_priv));
> -	if (ret)
> -		goto err_unlock;
> +	for_each_gt(gt, dev_priv, i) {
> +		ret = intel_gt_init(gt);
> +		if (ret)
> +			goto err_unlock;
> +	}
>   
>   	return 0;
>   
> @@ -1173,8 +1177,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   err_unlock:
>   	i915_gem_drain_workqueue(dev_priv);
>   
> -	if (ret != -EIO)
> -		intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
> +	if (ret != -EIO) {
> +		for_each_gt(gt, dev_priv, i) {
> +			intel_gt_driver_remove(gt);
> +			intel_gt_driver_release(gt);
> +		}
> +
> +		for_each_gt(gt, dev_priv, i)
> +			intel_uc_cleanup_firmwares(&gt->uc);

Any reason not to have the uc_cleanup in the same loop as the gt functions?
Also, you're looping intel_uc_cleanup_firmwares but not 
intel_uc_fetch_firmwares(). Not an issue since the cleanup function will 
skip if the fetch was not done, but I though it was worth mentioning. I 
can include the loop for the fetch as part of the support for the media 
GuC (which I'll send after this is merged).

> +	}
>   
>   	if (ret == -EIO) {
>   		/*
> @@ -1182,10 +1193,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>   		 * as wedged. But we only want to do this when the GPU is angry,
>   		 * for all other failure, such as an allocation failure, bail.
>   		 */
> -		if (!intel_gt_is_wedged(to_gt(dev_priv))) {
> -			i915_probe_error(dev_priv,
> -					 "Failed to initialize GPU, declaring it wedged!\n");
> -			intel_gt_set_wedged(to_gt(dev_priv));
> +		for_each_gt(gt, dev_priv, i) {
> +			if (!intel_gt_is_wedged(gt)) {
> +				i915_probe_error(dev_priv,
> +						"Failed to initialize GPU, declaring it wedged!\n");
> +				intel_gt_set_wedged(gt);
> +			}
>   		}
>   
>   		/* Minimal basic recovery for KMS */
> @@ -1213,10 +1226,14 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
>   
>   void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
>   {
> +	struct intel_gt *gt;
> +	unsigned int i;
> +
>   	intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
>   
>   	i915_gem_suspend_late(dev_priv);
> -	intel_gt_driver_remove(to_gt(dev_priv));
> +	for_each_gt(gt, dev_priv, i)
> +		intel_gt_driver_remove(gt);
>   	dev_priv->uabi_engines = RB_ROOT;
>   
>   	/* Flush any outstanding unpin_work. */
> @@ -1227,9 +1244,14 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
>   
>   void i915_gem_driver_release(struct drm_i915_private *dev_priv)
>   {
> -	intel_gt_driver_release(to_gt(dev_priv));
> +	struct intel_gt *gt;
> +	unsigned int i;
> +
> +	for_each_gt(gt, dev_priv, i)
> +		intel_gt_driver_release(gt);
>   
> -	intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
> +	for_each_gt(gt, dev_priv, i)
> +		intel_uc_cleanup_firmwares(&gt->uc);

Same here, those can be in the same loop.

Daniele

>   
>   	i915_gem_drain_freed_objects(dev_priv);
>   


^ permalink raw reply	[flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Further multi-gt handling
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
                   ` (4 preceding siblings ...)
  (?)
@ 2022-09-15  2:18 ` Patchwork
  -1 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-09-15  2:18 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

== Series Details ==

Series: Further multi-gt handling
URL   : https://patchwork.freedesktop.org/series/108577/
State : warning

== Summary ==

Error: dim checkpatch failed
7cda801d9e36 drm/i915/gt: Cleanup partial engine discovery failures
-:43: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!engine->release"
#43: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:1289:
+		GEM_BUG_ON(engine->release == NULL);

-:56: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address mismatch: 'From: Chris Wilson <chris.p.wilson@intel.com>' != 'Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>'

total: 0 errors, 1 warnings, 1 checks, 35 lines checked
f6b63c25ea92 drm/i915: Make GEM resume all engines
c19f4077a5e6 drm/i915: Make GEM suspend all GTs
261248f1b8f7 drm/i915: Handle all GTs on driver (un)load paths
-:88: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#88: FILE: drivers/gpu/drm/i915/i915_gem.c:1199:
+				i915_probe_error(dev_priv,
+						"Failed to initialize GPU, declaring it wedged!\n");

total: 0 errors, 0 warnings, 1 checks, 95 lines checked



^ permalink raw reply	[flat|nested] 22+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Further multi-gt handling
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
                   ` (5 preceding siblings ...)
  (?)
@ 2022-09-15  2:37 ` Patchwork
  -1 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-09-15  2:37 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 7672 bytes --]

== Series Details ==

Series: Further multi-gt handling
URL   : https://patchwork.freedesktop.org/series/108577/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12139 -> Patchwork_108577v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/index.html

Participating hosts (39 -> 41)
------------------------------

  Additional (3): bat-rplp-1 bat-dg2-8 fi-hsw-4770 
  Missing    (1): fi-ctg-p8600 

Known issues
------------

  Here are the changes found in Patchwork_108577v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_backlight@basic-brightness:
    - fi-hsw-4770:        NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#3012])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        NOTRUN -> [INCOMPLETE][2] ([i915#4785])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@requests:
    - fi-pnv-d510:        [PASS][3] -> [DMESG-FAIL][4] ([i915#4528])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-pnv-d510/igt@i915_selftest@live@requests.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-pnv-d510/igt@i915_selftest@live@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-rkl-11600:       [PASS][5] -> [INCOMPLETE][6] ([i915#5982])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - fi-hsw-4770:        NOTRUN -> [SKIP][7] ([fdo#109271]) +9 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-hsw-4770:        NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +7 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_psr@sprite_plane_onoff:
    - fi-hsw-4770:        NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#1072]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  * igt@runner@aborted:
    - fi-hsw-4770:        NOTRUN -> [FAIL][10] ([fdo#109271] / [i915#4312] / [i915#5594] / [i915#6246])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-hsw-4770/igt@runner@aborted.html
    - fi-pnv-d510:        NOTRUN -> [FAIL][11] ([fdo#109271] / [i915#2403] / [i915#4312])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-pnv-d510/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_ringfill@basic-all:
    - {bat-dg2-9}:        [FAIL][12] ([i915#5886]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/bat-dg2-9/igt@gem_ringfill@basic-all.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/bat-dg2-9/igt@gem_ringfill@basic-all.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
    - fi-bsw-kefka:       [FAIL][14] ([i915#6298]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#5886]: https://gitlab.freedesktop.org/drm/intel/issues/5886
  [i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
  [i915#6246]: https://gitlab.freedesktop.org/drm/intel/issues/6246
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6380]: https://gitlab.freedesktop.org/drm/intel/issues/6380
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6842]: https://gitlab.freedesktop.org/drm/intel/issues/6842


Build changes
-------------

  * Linux: CI_DRM_12139 -> Patchwork_108577v1

  CI-20190529: 20190529
  CI_DRM_12139: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_108577v1: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

ec972fedc596 drm/i915: Handle all GTs on driver (un)load paths
197c77196e16 drm/i915: Make GEM suspend all GTs
3cbdb8a7a8ec drm/i915: Make GEM resume all engines
c9fd45f42037 drm/i915/gt: Cleanup partial engine discovery failures

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/index.html

[-- Attachment #2: Type: text/html, Size: 6986 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures
  2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
@ 2022-09-15 10:40     ` Janusz Krzysztofik
  -1 siblings, 0 replies; 22+ messages in thread
From: Janusz Krzysztofik @ 2022-09-15 10:40 UTC (permalink / raw)
  To: intel-gfx, Matt Roper; +Cc: Chris Wilson, dri-devel, Chris Wilson

Hi Matt,

On Thursday, 15 September 2022 00:04:24 CEST Matt Roper wrote:
> From: Chris Wilson <chris.p.wilson@intel.com>
> 
> If we abort driver initialisation in the middle of gt/engine discovery,
> some engines will be fully setup and some not. Those incompletely setup
> engines only have 'engine->release == NULL' and so will leak any of the
> common objects allocated.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 1f7188129cd1..bff12b4ec314 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -1196,6 +1196,12 @@ void intel_engine_destroy_pinned_context(struct intel_context *ce)
>  	intel_context_put(ce);
>  }
>  
> +static void destroy_pinned_context(struct intel_context *ce)
> +{
> +	if (ce)
> +		intel_engine_destroy_pinned_context(ce);
> +}
> +
>  static struct intel_context *
>  create_kernel_context(struct intel_engine_cs *engine)
>  {
> @@ -1274,8 +1280,13 @@ int intel_engines_init(struct intel_gt *gt)
>  			return err;
>  
>  		err = setup(engine);
> -		if (err)
> +		if (err) {
> +			intel_engine_cleanup_common(engine);
>  			return err;
> +		}
> +
> +		/* The backend should now be responsible for cleanup */
> +		GEM_BUG_ON(engine->release == NULL);

LGTM

>  
>  		err = engine_init_common(engine);
>  		if (err)
> @@ -1307,8 +1318,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
>  	if (engine->default_state)
>  		fput(engine->default_state);
>  
> -	if (engine->kernel_context)
> -		intel_engine_destroy_pinned_context(engine->kernel_context);
> +	destroy_pinned_context(engine->kernel_context);

I think there is no point for this hunk, and consequently for the first one.  
A version of intel_engine_destroy_pinned_context() that accepts NULL can be 
added later, when we see need for similar code optimisation in more places, if 
ever.

Thanks,
Janusz

>  
>  	GEM_BUG_ON(!llist_empty(&engine->barrier_tasks));
>  	cleanup_status_page(engine);
> 



^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures
@ 2022-09-15 10:40     ` Janusz Krzysztofik
  0 siblings, 0 replies; 22+ messages in thread
From: Janusz Krzysztofik @ 2022-09-15 10:40 UTC (permalink / raw)
  To: intel-gfx, Matt Roper; +Cc: Chris Wilson, dri-devel, Chris Wilson

Hi Matt,

On Thursday, 15 September 2022 00:04:24 CEST Matt Roper wrote:
> From: Chris Wilson <chris.p.wilson@intel.com>
> 
> If we abort driver initialisation in the middle of gt/engine discovery,
> some engines will be fully setup and some not. Those incompletely setup
> engines only have 'engine->release == NULL' and so will leak any of the
> common objects allocated.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 1f7188129cd1..bff12b4ec314 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -1196,6 +1196,12 @@ void intel_engine_destroy_pinned_context(struct intel_context *ce)
>  	intel_context_put(ce);
>  }
>  
> +static void destroy_pinned_context(struct intel_context *ce)
> +{
> +	if (ce)
> +		intel_engine_destroy_pinned_context(ce);
> +}
> +
>  static struct intel_context *
>  create_kernel_context(struct intel_engine_cs *engine)
>  {
> @@ -1274,8 +1280,13 @@ int intel_engines_init(struct intel_gt *gt)
>  			return err;
>  
>  		err = setup(engine);
> -		if (err)
> +		if (err) {
> +			intel_engine_cleanup_common(engine);
>  			return err;
> +		}
> +
> +		/* The backend should now be responsible for cleanup */
> +		GEM_BUG_ON(engine->release == NULL);

LGTM

>  
>  		err = engine_init_common(engine);
>  		if (err)
> @@ -1307,8 +1318,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs *engine)
>  	if (engine->default_state)
>  		fput(engine->default_state);
>  
> -	if (engine->kernel_context)
> -		intel_engine_destroy_pinned_context(engine->kernel_context);
> +	destroy_pinned_context(engine->kernel_context);

I think there is no point for this hunk, and consequently for the first one.  
A version of intel_engine_destroy_pinned_context() that accepts NULL can be 
added later, when we see need for similar code optimisation in more places, if 
ever.

Thanks,
Janusz

>  
>  	GEM_BUG_ON(!llist_empty(&engine->barrier_tasks));
>  	cleanup_status_page(engine);
> 



^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 0/4] Further multi-gt handling
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
                   ` (6 preceding siblings ...)
  (?)
@ 2022-09-15 12:25 ` Jani Nikula
  2022-09-15 21:41   ` Andi Shyti
  2022-09-15 23:29   ` Matt Roper
  -1 siblings, 2 replies; 22+ messages in thread
From: Jani Nikula @ 2022-09-15 12:25 UTC (permalink / raw)
  To: Matt Roper, intel-gfx; +Cc: dri-devel

On Wed, 14 Sep 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> Now that MTL is going to start providing two GTs, there are a few more
> places in the driver that need to iterate over each GT instead of
> operating directly on gt0.  Also some more deliberate cleanup is needed,
> in cases where we fail GT/engine initialization after the first GT has
> been fully setup.

Hijacking the thread a bit, not to be considered a blocker for this
series:

Is there a plan to kzalloc i915->gt[0] too in intel_gt_probe_all() so we
wouldn't need to have intel_gt gt0 in struct drm_i915_private? And the
to_gt() inline would return i915->gt[0] instead of &i915->gt0? (And
maybe i915_drv.h wouldn't need the definition of intel_gt anymore! :o)

BR,
Jani.


>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>
> Chris Wilson (1):
>   drm/i915/gt: Cleanup partial engine discovery failures
>
> Tvrtko Ursulin (3):
>   drm/i915: Make GEM resume all engines
>   drm/i915: Make GEM suspend all GTs
>   drm/i915: Handle all GTs on driver (un)load paths
>
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 33 ++++++++++++++--
>  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 ++++++--
>  drivers/gpu/drm/i915/i915_driver.c        |  3 +-
>  drivers/gpu/drm/i915/i915_gem.c           | 46 +++++++++++++++++------
>  4 files changed, 78 insertions(+), 20 deletions(-)

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Further multi-gt handling
  2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
                   ` (7 preceding siblings ...)
  (?)
@ 2022-09-15 19:15 ` Patchwork
  -1 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2022-09-15 19:15 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 38010 bytes --]

== Series Details ==

Series: Further multi-gt handling
URL   : https://patchwork.freedesktop.org/series/108577/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12139_full -> Patchwork_108577v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_108577v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_108577v1_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_108577v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live@gt_pm:
    - shard-iclb:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@i915_selftest@live@gt_pm.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@i915_selftest@live@gt_pm.html

  
Known issues
------------

  Here are the changes found in Patchwork_108577v1_full that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - shard-glk:          ([PASS][3], [PASS][4], [FAIL][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) ([i915#4392]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk7/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk7/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk1/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk1/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk2/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk2/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk2/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk3/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk3/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk3/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk6/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk6/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk6/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk6/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk8/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk8/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk8/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk8/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk9/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk9/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk9/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@drm_fdinfo@all-busy-check-all:
    - shard-iclb:         [PASS][52] -> [SKIP][53] ([i915#5608]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@drm_fdinfo@all-busy-check-all.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@drm_fdinfo@all-busy-check-all.html

  * igt@gem_create@create-massive:
    - shard-glk:          NOTRUN -> [DMESG-WARN][54] ([i915#4991])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk6/igt@gem_create@create-massive.html

  * igt@gem_eio@kms:
    - shard-tglb:         [PASS][55] -> [FAIL][56] ([i915#5784])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb6/igt@gem_eio@kms.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb1/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-iclb:         [PASS][57] -> [SKIP][58] ([i915#4525]) +1 similar issue
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][59] -> [FAIL][60] ([i915#2846])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/igt@gem_exec_fair@basic-deadline.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk8/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_flush@basic-wb-prw-default:
    - shard-iclb:         [PASS][61] -> [SKIP][62] ([fdo#109315]) +16 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@gem_exec_flush@basic-wb-prw-default.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@gem_exec_flush@basic-wb-prw-default.html

  * igt@gem_exec_params@invalid-bsd2-flag-on-blt:
    - shard-iclb:         [PASS][63] -> [SKIP][64] ([fdo#109276] / [fdo#109315])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@gem_exec_params@invalid-bsd2-flag-on-blt.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@gem_exec_params@invalid-bsd2-flag-on-blt.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [PASS][65] -> [SKIP][66] ([i915#2190])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb1/igt@gem_huc_copy@huc-copy.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb7/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
    - shard-glk:          NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#4613])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@gem_lmem_swapping@heavy-verify-multi.html

  * igt@gem_pread@exhaustion:
    - shard-glk:          NOTRUN -> [WARN][68] ([i915#2658])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@gem_pread@exhaustion.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-glk:          NOTRUN -> [SKIP][69] ([fdo#109271]) +51 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_softpin@evict-single-offset:
    - shard-tglb:         [PASS][70] -> [FAIL][71] ([i915#4171])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb1/igt@gem_softpin@evict-single-offset.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb7/igt@gem_softpin@evict-single-offset.html

  * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#3886]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#3886])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl7/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - shard-glk:          NOTRUN -> [SKIP][74] ([fdo#109271] / [fdo#111827]) +1 similar issue
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
    - shard-apl:          NOTRUN -> [SKIP][75] ([fdo#109271] / [fdo#111827]) +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl7/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_concurrent@pipe-c:
    - shard-iclb:         NOTRUN -> [SKIP][76] ([i915#2575]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_concurrent@pipe-c.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-apl:          NOTRUN -> [SKIP][77] ([fdo#109271]) +16 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl7/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2:
    - shard-glk:          [PASS][78] -> [FAIL][79] ([i915#79])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk7/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][80] ([i915#2587] / [i915#2672])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
    - shard-iclb:         [PASS][81] -> [SKIP][82] ([i915#3555])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][83] ([i915#2672]) +5 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-iclb:         NOTRUN -> [SKIP][84] ([fdo#109315]) +5 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-glk:          NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html

  * igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1:
    - shard-glk:          [PASS][86] -> [FAIL][87] ([i915#1888])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
    - shard-glk:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658]) +1 similar issue
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-iclb:         [PASS][89] -> [SKIP][90] ([fdo#109642] / [fdo#111068] / [i915#658])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@kms_psr2_su@page_flip-xrgb8888.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb1/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@psr2_sprite_mmap_cpu:
    - shard-iclb:         [PASS][91] -> [SKIP][92] ([fdo#109441]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb1/igt@kms_psr@psr2_sprite_mmap_cpu.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-iclb:         [PASS][93] -> [SKIP][94] ([i915#5519])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [PASS][95] -> [DMESG-WARN][96] ([i915#180])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@syncobj_wait@multi-wait-for-submit-unsubmitted-signaled:
    - shard-iclb:         [PASS][97] -> [SKIP][98] ([i915#2575]) +6 similar issues
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@syncobj_wait@multi-wait-for-submit-unsubmitted-signaled.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@syncobj_wait@multi-wait-for-submit-unsubmitted-signaled.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-glk:          [FAIL][99] ([i915#2842]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [FAIL][101] ([i915#2842]) -> [PASS][102]
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][103] ([i915#2842]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [DMESG-WARN][105] ([i915#180]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl3/igt@gem_softpin@noreloc-s3.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl7/igt@gem_softpin@noreloc-s3.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][107] ([i915#454]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@i915_pm_dc@dc6-dpms.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
    - shard-glk:          [FAIL][109] ([i915#2346]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1:
    - shard-glk:          [FAIL][111] ([i915#2122]) -> [PASS][112] +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk7/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2:
    - shard-glk:          [FAIL][113] ([i915#79]) -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
    - shard-glk:          [FAIL][115] ([i915#1888] / [i915#2546]) -> [PASS][116] +1 similar issue
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-glk5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1:
    - shard-iclb:         [SKIP][117] ([i915#5235]) -> [PASS][118] +2 similar issues
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb1/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-c-edp-1.html

  * igt@kms_psr@psr2_cursor_mmap_gtt:
    - shard-iclb:         [SKIP][119] ([fdo#109441]) -> [PASS][120] +1 similar issue
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html

  
#### Warnings ####

  * igt@gem_ccs@block-copy-inplace:
    - shard-iclb:         [SKIP][121] ([i915#5327]) -> [SKIP][122] ([fdo#109315])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@gem_ccs@block-copy-inplace.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@gem_ccs@block-copy-inplace.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][123] ([i915#3063]) -> [FAIL][124] ([i915#5784])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb6/igt@gem_eio@unwedge-stress.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb1/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         [FAIL][125] ([i915#6117]) -> [SKIP][126] ([i915#4525])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@gem_exec_balancer@parallel-ordering.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb7/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-iclb:         [SKIP][127] ([i915#4270]) -> [SKIP][128] ([fdo#109315])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@gem_pxp@reject-modify-context-protection-off-3.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - shard-tglb:         [FAIL][129] ([i915#2681] / [i915#3591]) -> [WARN][130] ([i915#2681])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb8/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-tglb3/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
    - shard-iclb:         [FAIL][131] ([i915#2684]) -> [WARN][132] ([i915#2684])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-iclb:         [SKIP][133] ([fdo#110725] / [fdo#111614]) -> [SKIP][134] ([fdo#109315]) +1 similar issue
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs:
    - shard-iclb:         [SKIP][135] ([fdo#109278]) -> [SKIP][136] ([fdo#109315])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-iclb:         [SKIP][137] ([fdo#109284] / [fdo#111827]) -> [SKIP][138] ([i915#2575])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_chamelium@dp-hpd-with-enabled-mode.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_content_protection@type1:
    - shard-iclb:         [SKIP][139] ([fdo#109300] / [fdo#111066]) -> [SKIP][140] ([i915#2575])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_content_protection@type1.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_content_protection@type1.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-iclb:         [SKIP][141] ([fdo#109274]) -> [SKIP][142] ([i915#2575]) +2 similar issues
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt:
    - shard-iclb:         [SKIP][143] ([fdo#109280]) -> [SKIP][144] ([fdo#109315]) +2 similar issues
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c:
    - shard-iclb:         [SKIP][145] ([fdo#109289]) -> [SKIP][146] ([fdo#109315])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
    - shard-iclb:         [SKIP][147] ([i915#658]) -> [SKIP][148] ([i915#2920])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area:
    - shard-iclb:         [SKIP][149] ([fdo#111068] / [i915#658]) -> [SKIP][150] ([i915#2920])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb1/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-iclb:         [SKIP][151] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [SKIP][152] ([fdo#109315])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [SKIP][153] ([fdo#109441]) -> [SKIP][154] ([fdo#109315])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_psr@psr2_sprite_render.html
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_psr@psr2_sprite_render.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-iclb:         [SKIP][155] ([i915#3555]) -> [SKIP][156] ([i915#2575])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_setmode@invalid-clone-single-crtc.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm:
    - shard-iclb:         [SKIP][157] ([fdo#109278]) -> [SKIP][158] ([fdo#109278] / [i915#2575])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@kms_vblank@pipe-d-ts-continuation-modeset-rpm.html

  * igt@nouveau_crc@pipe-b-source-outp-inactive:
    - shard-iclb:         [SKIP][159] ([i915#2530]) -> [SKIP][160] ([i915#2575])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@nouveau_crc@pipe-b-source-outp-inactive.html
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@nouveau_crc@pipe-b-source-outp-inactive.html

  * igt@nouveau_crc@pipe-d-source-outp-complete:
    - shard-iclb:         [SKIP][161] ([fdo#109278] / [i915#2530]) -> [SKIP][162] ([fdo#109278] / [i915#2575])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb6/igt@nouveau_crc@pipe-d-source-outp-complete.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-iclb3/igt@nouveau_crc@pipe-d-source-outp-complete.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][163], [FAIL][164], [FAIL][165], [FAIL][166]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170]) ([fdo#109271] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl8/igt@runner@aborted.html
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl1/igt@runner@aborted.html
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl3/igt@runner@aborted.html
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl7/igt@runner@aborted.html
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl6/igt@runner@aborted.html
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl1/igt@runner@aborted.html
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl3/igt@runner@aborted.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/shard-apl4/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110254]: https://bugs.freedesktop.org/show_bug.cgi?id=110254
  [fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
  [fdo#111066]: https://bugs.freedesktop.org/show_bug.cgi?id=111066
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
  [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4392]: https://gitlab.freedesktop.org/drm/intel/issues/4392
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
  [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
  [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79


Build changes
-------------

  * Linux: CI_DRM_12139 -> Patchwork_108577v1

  CI-20190529: 20190529
  CI_DRM_12139: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_108577v1: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108577v1/index.html

[-- Attachment #2: Type: text/html, Size: 41234 bytes --]

^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 2/4] drm/i915: Make GEM resume all engines
  2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
  (?)
@ 2022-09-15 21:34   ` Andi Shyti
  -1 siblings, 0 replies; 22+ messages in thread
From: Andi Shyti @ 2022-09-15 21:34 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx, dri-devel

Hi Matt,

On Wed, Sep 14, 2022 at 03:04:25PM -0700, Matt Roper wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Walk all GTs from i915_gem_resume when resuming engines.
> 
> Cc: Andi Shyti <andi.shyti@intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

I had this (and others) in my multi-gt branch from a long time
but never had time to clean it up and send it. Thanks for taking
it.

Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

Thanks,
Andi

> ---
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index 3428f735e786..2c80cc8362b6 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -212,7 +212,8 @@ int i915_gem_freeze_late(struct drm_i915_private *i915)
>  
>  void i915_gem_resume(struct drm_i915_private *i915)
>  {
> -	int ret;
> +	struct intel_gt *gt;
> +	int ret, i, j;
>  
>  	GEM_TRACE("%s\n", dev_name(i915->drm.dev));
>  
> @@ -224,8 +225,25 @@ void i915_gem_resume(struct drm_i915_private *i915)
>  	 * guarantee that the context image is complete. So let's just reset
>  	 * it and start again.
>  	 */
> -	intel_gt_resume(to_gt(i915));
> +	for_each_gt(gt, i915, i)
> +		if (intel_gt_resume(gt))
> +			goto err_wedged;
>  
>  	ret = lmem_restore(i915, I915_TTM_BACKUP_ALLOW_GPU);
>  	GEM_WARN_ON(ret);
> +
> +	return;
> +
> +err_wedged:
> +	for_each_gt(gt, i915, j) {
> +		if (!intel_gt_is_wedged(gt)) {
> +			dev_err(i915->drm.dev,
> +				"Failed to re-initialize GPU[%u], declaring it wedged!\n",
> +				j);
> +			intel_gt_set_wedged(gt);
> +		}
> +
> +		if (j == i)
> +			break;
> +	}
>  }
> -- 
> 2.37.3

^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: Make GEM suspend all GTs
  2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
  (?)
@ 2022-09-15 21:36   ` Andi Shyti
  -1 siblings, 0 replies; 22+ messages in thread
From: Andi Shyti @ 2022-09-15 21:36 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-gfx, dri-devel

Hi Matt,

On Wed, Sep 14, 2022 at 03:04:26PM -0700, Matt Roper wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Walk all GTs when suspending.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

I had this as well... thanks again!

Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>

Andi

^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 0/4] Further multi-gt handling
  2022-09-15 12:25 ` [Intel-gfx] [PATCH 0/4] " Jani Nikula
@ 2022-09-15 21:41   ` Andi Shyti
  2022-09-15 23:29   ` Matt Roper
  1 sibling, 0 replies; 22+ messages in thread
From: Andi Shyti @ 2022-09-15 21:41 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx, dri-devel

Hi Jani,

On Thu, Sep 15, 2022 at 03:25:15PM +0300, Jani Nikula wrote:
> On Wed, 14 Sep 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> > Now that MTL is going to start providing two GTs, there are a few more
> > places in the driver that need to iterate over each GT instead of
> > operating directly on gt0.  Also some more deliberate cleanup is needed,
> > in cases where we fail GT/engine initialization after the first GT has
> > been fully setup.
> 
> Hijacking the thread a bit, not to be considered a blocker for this
> series:
> 
> Is there a plan to kzalloc i915->gt[0] too in intel_gt_probe_all() so we
> wouldn't need to have intel_gt gt0 in struct drm_i915_private? And the
> to_gt() inline would return i915->gt[0] instead of &i915->gt0? (And
> maybe i915_drv.h wouldn't need the definition of intel_gt anymore! :o)

I had a patch that was doing that and sent it long time ago and
it was rejected.

I can't find it but I will check better to see what was the
reason for it to be rejected.

Andi

^ permalink raw reply	[flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 0/4] Further multi-gt handling
  2022-09-15 12:25 ` [Intel-gfx] [PATCH 0/4] " Jani Nikula
  2022-09-15 21:41   ` Andi Shyti
@ 2022-09-15 23:29   ` Matt Roper
  1 sibling, 0 replies; 22+ messages in thread
From: Matt Roper @ 2022-09-15 23:29 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx, dri-devel

On Thu, Sep 15, 2022 at 03:25:15PM +0300, Jani Nikula wrote:
> On Wed, 14 Sep 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> > Now that MTL is going to start providing two GTs, there are a few more
> > places in the driver that need to iterate over each GT instead of
> > operating directly on gt0.  Also some more deliberate cleanup is needed,
> > in cases where we fail GT/engine initialization after the first GT has
> > been fully setup.
> 
> Hijacking the thread a bit, not to be considered a blocker for this
> series:
> 
> Is there a plan to kzalloc i915->gt[0] too in intel_gt_probe_all() so we
> wouldn't need to have intel_gt gt0 in struct drm_i915_private? And the
> to_gt() inline would return i915->gt[0] instead of &i915->gt0? (And
> maybe i915_drv.h wouldn't need the definition of intel_gt anymore! :o)

Yeah, in the more medium-term I would like to dynamically allocate gt0
(and probably the primary uncore structure too) so that they don't need
to be embedded into dev_priv.  I'll probably wait until most of the
other MTL stuff has landed and we have some CI machines setup to make
sure it doesn't accidentally break anything before doing that though.


Matt

> 
> BR,
> Jani.
> 
> 
> >
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> >
> > Chris Wilson (1):
> >   drm/i915/gt: Cleanup partial engine discovery failures
> >
> > Tvrtko Ursulin (3):
> >   drm/i915: Make GEM resume all engines
> >   drm/i915: Make GEM suspend all GTs
> >   drm/i915: Handle all GTs on driver (un)load paths
> >
> >  drivers/gpu/drm/i915/gem/i915_gem_pm.c    | 33 ++++++++++++++--
> >  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 16 ++++++--
> >  drivers/gpu/drm/i915/i915_driver.c        |  3 +-
> >  drivers/gpu/drm/i915/i915_gem.c           | 46 +++++++++++++++++------
> >  4 files changed, 78 insertions(+), 20 deletions(-)
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 22+ messages in thread
end of thread, other threads:[~2022-09-15 23:30 UTC | newest]

Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-14 22:04 [PATCH 0/4] Further multi-gt handling Matt Roper
2022-09-14 22:04 ` [Intel-gfx] " Matt Roper
2022-09-14 22:04 ` [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures Matt Roper
2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
2022-09-15 10:40   ` Janusz Krzysztofik
2022-09-15 10:40     ` [Intel-gfx] " Janusz Krzysztofik
2022-09-14 22:04 ` [PATCH 2/4] drm/i915: Make GEM resume all engines Matt Roper
2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
2022-09-15 21:34   ` Andi Shyti
2022-09-14 22:04 ` [PATCH 3/4] drm/i915: Make GEM suspend all GTs Matt Roper
2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
2022-09-15 21:36   ` Andi Shyti
2022-09-14 22:04 ` [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths Matt Roper
2022-09-14 22:04   ` [Intel-gfx] " Matt Roper
2022-09-15  1:01   ` Ceraolo Spurio, Daniele
2022-09-15  1:01     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-09-15  2:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Further multi-gt handling Patchwork
2022-09-15  2:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-15 12:25 ` [Intel-gfx] [PATCH 0/4] " Jani Nikula
2022-09-15 21:41   ` Andi Shyti
2022-09-15 23:29   ` Matt Roper
2022-09-15 19:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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