* [PATCH 0/1] New GuC and new GuC/HuC names @ 2022-09-14 23:46 ` John.C.Harrison 0 siblings, 0 replies; 15+ messages in thread From: John.C.Harrison @ 2022-09-14 23:46 UTC (permalink / raw) To: Intel-GFX; +Cc: John Harrison, DRI-Devel From: John Harrison <John.C.Harrison@Intel.com> Update the GuC version numbers to expect the latest release. Also start using GuC/HuC firmware files with reduced version information in the file name. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> John Harrison (1): drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) -- 2.37.3 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 0/1] New GuC and new GuC/HuC names @ 2022-09-14 23:46 ` John.C.Harrison 0 siblings, 0 replies; 15+ messages in thread From: John.C.Harrison @ 2022-09-14 23:46 UTC (permalink / raw) To: Intel-GFX; +Cc: DRI-Devel From: John Harrison <John.C.Harrison@Intel.com> Update the GuC version numbers to expect the latest release. Also start using GuC/HuC firmware files with reduced version information in the file name. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> John Harrison (1): drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) -- 2.37.3 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison @ 2022-09-14 23:46 ` John.C.Harrison -1 siblings, 0 replies; 15+ messages in thread From: John.C.Harrison @ 2022-09-14 23:46 UTC (permalink / raw) To: Intel-GFX; +Cc: John Harrison, DRI-Devel From: John Harrison <John.C.Harrison@Intel.com> Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms that are officially GuC/HuC enabled. Also, update the expected GuC version numbers to the latest firmware release for those platforms. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index 1169e2a09da24..b91ad4aede1f7 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, * security fixes, etc. to be enabled. */ #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ + fw_def(DG1, 0, huc_raw(dg1)) \ fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ -- 2.37.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names @ 2022-09-14 23:46 ` John.C.Harrison 0 siblings, 0 replies; 15+ messages in thread From: John.C.Harrison @ 2022-09-14 23:46 UTC (permalink / raw) To: Intel-GFX; +Cc: DRI-Devel From: John Harrison <John.C.Harrison@Intel.com> Going forwards, the intention is for GuC firmware files to be named for their major version only and HuC firmware files to have no version number in the name at all. This patch adds those entries for all platforms that are officially GuC/HuC enabled. Also, update the expected GuC version numbers to the latest firmware release for those platforms. Signed-off-by: John Harrison <John.C.Harrison@Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index 1169e2a09da24..b91ad4aede1f7 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, * security fixes, etc. to be enabled. */ #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ + fw_def(DG1, 0, huc_raw(dg1)) \ fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ -- 2.37.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison (?) @ 2022-09-15 0:38 ` Ceraolo Spurio, Daniele -1 siblings, 0 replies; 15+ messages in thread From: Ceraolo Spurio, Daniele @ 2022-09-15 0:38 UTC (permalink / raw) To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel On 9/14/2022 4:46 PM, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Going forwards, the intention is for GuC firmware files to be named > for their major version only and HuC firmware files to have no version > number in the name at all. This patch adds those entries for all > platforms that are officially GuC/HuC enabled. > > Also, update the expected GuC version numbers to the latest firmware > release for those platforms. You didn't record that this is a v2 (the patch name is different but it is the same patch ;) ). The changes LGTM: Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Daniele > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 1169e2a09da24..b91ad4aede1f7 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > * security fixes, etc. to be enabled. > */ > #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ > - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ > + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ > + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ > + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ > - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ > + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ > fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ > @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) > > #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ > + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ > + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ > - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ > + fw_def(DG1, 0, huc_raw(dg1)) \ > fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison @ 2022-09-15 8:59 ` Tvrtko Ursulin -1 siblings, 0 replies; 15+ messages in thread From: Tvrtko Ursulin @ 2022-09-15 8:59 UTC (permalink / raw) To: John.C.Harrison, Intel-GFX; +Cc: Ceraolo Spurio, Daniele, DRI-Devel Hi, On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Going forwards, the intention is for GuC firmware files to be named > for their major version only and HuC firmware files to have no version > number in the name at all. This patch adds those entries for all > platforms that are officially GuC/HuC enabled. > > Also, update the expected GuC version numbers to the latest firmware > release for those platforms. > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 1169e2a09da24..b91ad4aede1f7 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > * security fixes, etc. to be enabled. > */ > #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ > - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ > + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ Just glancing over out of curiosity. Part which confused me is that if only major is supposed to be used then what is the '5' in guc_maj(dg2, 70, 5) ? I also couldn't find guc_maj with grep so I guess it's some sort of a magic concatenation macro or what? Regards, Tvrtko > + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ > + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ > - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ > + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ > fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ > @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) > > #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ > + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ > + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ > - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ > + fw_def(DG1, 0, huc_raw(dg1)) \ > fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names @ 2022-09-15 8:59 ` Tvrtko Ursulin 0 siblings, 0 replies; 15+ messages in thread From: Tvrtko Ursulin @ 2022-09-15 8:59 UTC (permalink / raw) To: John.C.Harrison, Intel-GFX; +Cc: DRI-Devel Hi, On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Going forwards, the intention is for GuC firmware files to be named > for their major version only and HuC firmware files to have no version > number in the name at all. This patch adds those entries for all > platforms that are officially GuC/HuC enabled. > > Also, update the expected GuC version numbers to the latest firmware > release for those platforms. > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 1169e2a09da24..b91ad4aede1f7 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > * security fixes, etc. to be enabled. > */ > #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ > - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ > + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ Just glancing over out of curiosity. Part which confused me is that if only major is supposed to be used then what is the '5' in guc_maj(dg2, 70, 5) ? I also couldn't find guc_maj with grep so I guess it's some sort of a magic concatenation macro or what? Regards, Tvrtko > + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ > fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ > + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ > - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ > + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ > fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ > fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ > @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, > fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) > > #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ > + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ > + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ > fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ > - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ > + fw_def(DG1, 0, huc_raw(dg1)) \ > fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ > fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-15 8:59 ` Tvrtko Ursulin @ 2022-09-15 20:03 ` John Harrison -1 siblings, 0 replies; 15+ messages in thread From: John Harrison @ 2022-09-15 20:03 UTC (permalink / raw) To: Tvrtko Ursulin, Intel-GFX; +Cc: Ceraolo Spurio, Daniele, DRI-Devel On 9/15/2022 01:59, Tvrtko Ursulin wrote: > > Hi, > > On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >> From: John Harrison <John.C.Harrison@Intel.com> >> >> Going forwards, the intention is for GuC firmware files to be named >> for their major version only and HuC firmware files to have no version >> number in the name at all. This patch adds those entries for all >> platforms that are officially GuC/HuC enabled. >> >> Also, update the expected GuC version numbers to the latest firmware >> release for those platforms. >> >> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >> --- >> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >> 1 file changed, 7 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> index 1169e2a09da24..b91ad4aede1f7 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw >> *uc_fw, >> * security fixes, etc. to be enabled. >> */ >> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ > > Just glancing over out of curiosity. Part which confused me is that if > only major is supposed to be used then what is the '5' in guc_maj(dg2, > 70, 5) ? See the earlier patch that added support for version reduced filenames. The minor number is still specified because want to be able to warn the user if their firmware is out of date and causing them to miss features, security fixes, etc. The driver will still load any old firmware with the right name and work with it, but user's need to know that there are updates available. > > I also couldn't find guc_maj with grep so I guess it's some sort of a > magic concatenation macro or what? 'guc_maj' is a macro parameter as per the definition of the macro three lines above. According to where INTEL_GUC_FIRMWARE_DEFS is used, it becomes either a mechanism for creating just a 'MODULE_FIRMWARE' definition for the firmware file or a table entry giving all the version information as well as the filename. John. > > Regards, > > Tvrtko > >> + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ >> fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ >> fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ >> + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ >> fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ >> - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ >> + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ >> fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ >> @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw >> *uc_fw, >> fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) >> #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ >> + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ >> fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ >> + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ >> fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ >> - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ >> + fw_def(DG1, 0, huc_raw(dg1)) \ >> fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ >> fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ >> fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names @ 2022-09-15 20:03 ` John Harrison 0 siblings, 0 replies; 15+ messages in thread From: John Harrison @ 2022-09-15 20:03 UTC (permalink / raw) To: Tvrtko Ursulin, Intel-GFX; +Cc: DRI-Devel On 9/15/2022 01:59, Tvrtko Ursulin wrote: > > Hi, > > On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >> From: John Harrison <John.C.Harrison@Intel.com> >> >> Going forwards, the intention is for GuC firmware files to be named >> for their major version only and HuC firmware files to have no version >> number in the name at all. This patch adds those entries for all >> platforms that are officially GuC/HuC enabled. >> >> Also, update the expected GuC version numbers to the latest firmware >> release for those platforms. >> >> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >> --- >> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >> 1 file changed, 7 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> index 1169e2a09da24..b91ad4aede1f7 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw >> *uc_fw, >> * security fixes, etc. to be enabled. >> */ >> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ > > Just glancing over out of curiosity. Part which confused me is that if > only major is supposed to be used then what is the '5' in guc_maj(dg2, > 70, 5) ? See the earlier patch that added support for version reduced filenames. The minor number is still specified because want to be able to warn the user if their firmware is out of date and causing them to miss features, security fixes, etc. The driver will still load any old firmware with the right name and work with it, but user's need to know that there are updates available. > > I also couldn't find guc_maj with grep so I guess it's some sort of a > magic concatenation macro or what? 'guc_maj' is a macro parameter as per the definition of the macro three lines above. According to where INTEL_GUC_FIRMWARE_DEFS is used, it becomes either a mechanism for creating just a 'MODULE_FIRMWARE' definition for the firmware file or a table entry giving all the version information as well as the filename. John. > > Regards, > > Tvrtko > >> + fw_def(ALDERLAKE_P, 0, guc_maj(adlp, 70, 5)) \ >> fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 70, 1, 1)) \ >> fw_def(ALDERLAKE_P, 0, guc_mmp(adlp, 69, 0, 3)) \ >> + fw_def(ALDERLAKE_S, 0, guc_maj(tgl, 70, 5)) \ >> fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(ALDERLAKE_S, 0, guc_mmp(tgl, 69, 0, 3)) \ >> - fw_def(DG1, 0, guc_mmp(dg1, 70, 1, 1)) \ >> + fw_def(DG1, 0, guc_maj(dg1, 70, 5)) \ >> fw_def(ROCKETLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(TIGERLAKE, 0, guc_mmp(tgl, 70, 1, 1)) \ >> fw_def(JASPERLAKE, 0, guc_mmp(ehl, 70, 1, 1)) \ >> @@ -92,9 +94,11 @@ void intel_uc_fw_change_status(struct intel_uc_fw >> *uc_fw, >> fw_def(SKYLAKE, 0, guc_mmp(skl, 70, 1, 1)) >> #define INTEL_HUC_FIRMWARE_DEFS(fw_def, huc_raw, huc_mmp) \ >> + fw_def(ALDERLAKE_P, 0, huc_raw(tgl)) \ >> fw_def(ALDERLAKE_P, 0, huc_mmp(tgl, 7, 9, 3)) \ >> + fw_def(ALDERLAKE_S, 0, huc_raw(tgl)) \ >> fw_def(ALDERLAKE_S, 0, huc_mmp(tgl, 7, 9, 3)) \ >> - fw_def(DG1, 0, huc_mmp(dg1, 7, 9, 3)) \ >> + fw_def(DG1, 0, huc_raw(dg1)) \ >> fw_def(ROCKETLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ >> fw_def(TIGERLAKE, 0, huc_mmp(tgl, 7, 9, 3)) \ >> fw_def(JASPERLAKE, 0, huc_mmp(ehl, 9, 0, 0)) \ ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-15 20:03 ` John Harrison @ 2022-09-16 9:10 ` Tvrtko Ursulin -1 siblings, 0 replies; 15+ messages in thread From: Tvrtko Ursulin @ 2022-09-16 9:10 UTC (permalink / raw) To: John Harrison, Intel-GFX; +Cc: Ceraolo Spurio, Daniele, DRI-Devel On 15/09/2022 21:03, John Harrison wrote: > On 9/15/2022 01:59, Tvrtko Ursulin wrote: >> >> Hi, >> >> On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >>> From: John Harrison <John.C.Harrison@Intel.com> >>> >>> Going forwards, the intention is for GuC firmware files to be named >>> for their major version only and HuC firmware files to have no version >>> number in the name at all. This patch adds those entries for all >>> platforms that are officially GuC/HuC enabled. >>> >>> Also, update the expected GuC version numbers to the latest firmware >>> release for those platforms. >>> >>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >>> --- >>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >>> 1 file changed, 7 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> index 1169e2a09da24..b91ad4aede1f7 100644 >>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw >>> *uc_fw, >>> * security fixes, etc. to be enabled. >>> */ >>> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >>> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >>> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ >> >> Just glancing over out of curiosity. Part which confused me is that if >> only major is supposed to be used then what is the '5' in guc_maj(dg2, >> 70, 5) ? > See the earlier patch that added support for version reduced filenames. > The minor number is still specified because want to be able to warn the > user if their firmware is out of date and causing them to miss features, > security fixes, etc. The driver will still load any old firmware with > the right name and work with it, but user's need to know that there are > updates available. Got it. Release is deemed not important enough to warn about? no actually, it's different, I guess we never expect to bump only the release with a source level change - so in practice kernel could not warn that there is a newer release version since it would never know. In other words those ones would only be hitting linux-firmware, while minor changes would be kernel patches as well. >> I also couldn't find guc_maj with grep so I guess it's some sort of a >> magic concatenation macro or what? > 'guc_maj' is a macro parameter as per the definition of the macro three > lines above. According to where INTEL_GUC_FIRMWARE_DEFS is used, it > becomes either a mechanism for creating just a 'MODULE_FIRMWARE' > definition for the firmware file or a table entry giving all the version > information as well as the filename. Doh thanks, macro magic was apparently impenetrable to me yesterday. Regards, Tvrtko ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names @ 2022-09-16 9:10 ` Tvrtko Ursulin 0 siblings, 0 replies; 15+ messages in thread From: Tvrtko Ursulin @ 2022-09-16 9:10 UTC (permalink / raw) To: John Harrison, Intel-GFX; +Cc: DRI-Devel On 15/09/2022 21:03, John Harrison wrote: > On 9/15/2022 01:59, Tvrtko Ursulin wrote: >> >> Hi, >> >> On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >>> From: John Harrison <John.C.Harrison@Intel.com> >>> >>> Going forwards, the intention is for GuC firmware files to be named >>> for their major version only and HuC firmware files to have no version >>> number in the name at all. This patch adds those entries for all >>> platforms that are officially GuC/HuC enabled. >>> >>> Also, update the expected GuC version numbers to the latest firmware >>> release for those platforms. >>> >>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >>> --- >>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >>> 1 file changed, 7 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> index 1169e2a09da24..b91ad4aede1f7 100644 >>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct intel_uc_fw >>> *uc_fw, >>> * security fixes, etc. to be enabled. >>> */ >>> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >>> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >>> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ >> >> Just glancing over out of curiosity. Part which confused me is that if >> only major is supposed to be used then what is the '5' in guc_maj(dg2, >> 70, 5) ? > See the earlier patch that added support for version reduced filenames. > The minor number is still specified because want to be able to warn the > user if their firmware is out of date and causing them to miss features, > security fixes, etc. The driver will still load any old firmware with > the right name and work with it, but user's need to know that there are > updates available. Got it. Release is deemed not important enough to warn about? no actually, it's different, I guess we never expect to bump only the release with a source level change - so in practice kernel could not warn that there is a newer release version since it would never know. In other words those ones would only be hitting linux-firmware, while minor changes would be kernel patches as well. >> I also couldn't find guc_maj with grep so I guess it's some sort of a >> magic concatenation macro or what? > 'guc_maj' is a macro parameter as per the definition of the macro three > lines above. According to where INTEL_GUC_FIRMWARE_DEFS is used, it > becomes either a mechanism for creating just a 'MODULE_FIRMWARE' > definition for the firmware file or a table entry giving all the version > information as well as the filename. Doh thanks, macro magic was apparently impenetrable to me yesterday. Regards, Tvrtko ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names 2022-09-16 9:10 ` Tvrtko Ursulin @ 2022-09-16 19:45 ` John Harrison -1 siblings, 0 replies; 15+ messages in thread From: John Harrison @ 2022-09-16 19:45 UTC (permalink / raw) To: Tvrtko Ursulin, Intel-GFX; +Cc: Ceraolo Spurio, Daniele, DRI-Devel On 9/16/2022 02:10, Tvrtko Ursulin wrote: > On 15/09/2022 21:03, John Harrison wrote: >> On 9/15/2022 01:59, Tvrtko Ursulin wrote: >>> >>> Hi, >>> >>> On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >>>> From: John Harrison <John.C.Harrison@Intel.com> >>>> >>>> Going forwards, the intention is for GuC firmware files to be named >>>> for their major version only and HuC firmware files to have no version >>>> number in the name at all. This patch adds those entries for all >>>> platforms that are officially GuC/HuC enabled. >>>> >>>> Also, update the expected GuC version numbers to the latest firmware >>>> release for those platforms. >>>> >>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >>>> --- >>>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >>>> 1 file changed, 7 insertions(+), 3 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> index 1169e2a09da24..b91ad4aede1f7 100644 >>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct >>>> intel_uc_fw *uc_fw, >>>> * security fixes, etc. to be enabled. >>>> */ >>>> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >>>> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >>>> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ >>> >>> Just glancing over out of curiosity. Part which confused me is that >>> if only major is supposed to be used then what is the '5' in >>> guc_maj(dg2, 70, 5) ? >> See the earlier patch that added support for version reduced >> filenames. The minor number is still specified because want to be >> able to warn the user if their firmware is out of date and causing >> them to miss features, security fixes, etc. The driver will still >> load any old firmware with the right name and work with it, but >> user's need to know that there are updates available. > > Got it. Release is deemed not important enough to warn about? no > actually, it's different, I guess we never expect to bump only the > release with a source level change - so in practice kernel could not > warn that there is a newer release version since it would never know. > In other words those ones would only be hitting linux-firmware, while > minor changes would be kernel patches as well. By "release" you mean patch level? As in <MAJOR.MINOR.PATCH>. Yeah, I'm in two minds about being explicit on the patch level. It is possible that a particular feature might be added in 70.6.0 but then we find a bug, so it's only usable in 70.6.1. In which case, we want the KMD to notify users that an update is required. But in that case, we would also want to patch the kernel to disable that feature unless 70.6.1 or later is actually found. Or, there is just a straight up bug that affects everything and is fixed in 70.5.2. Again, we would want to notify that an update is available. But we can't exactly patch the kernel to not load i915 if 70.5.2 is not available. Having said that, updating the 'requested' version is a KMD change regardless of whether it is a bump of the major, minor or patch level version number. In which case, we have the opportunity to add in patch level reporting at that point if required. But the counter argument is that, as you say, a firmware bug fix does not generally require an actual KMD code change. The i915 patch would purely be to bump the version number. So is it worth the churn? For major/minor changes there are corresponding i915 changes - either a re-write of existing code (major) or a new feature being added (minor). So bumping the number is 'free' given that a patch is required regardless. And is the code churn to provide a warning really useful? Would an end user ever notice the line in dmesg? Isn't it up to the distros to provide important bug fixes via package updates when necessary? So yeah, not sure. Unnecessary code churn versus warning about potentially important bug fixes. Pick your evil. > >>> I also couldn't find guc_maj with grep so I guess it's some sort of >>> a magic concatenation macro or what? >> 'guc_maj' is a macro parameter as per the definition of the macro >> three lines above. According to where INTEL_GUC_FIRMWARE_DEFS is >> used, it becomes either a mechanism for creating just a >> 'MODULE_FIRMWARE' definition for the firmware file or a table entry >> giving all the version information as well as the filename. > > Doh thanks, macro magic was apparently impenetrable to me yesterday. Yeah, this particular set of macro magic is impressively complex. It took me quite a while to properly understand exactly what is happening and how when I did the actual versionless filename updates in the first place! John. > > Regards, > > Tvrtko ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names @ 2022-09-16 19:45 ` John Harrison 0 siblings, 0 replies; 15+ messages in thread From: John Harrison @ 2022-09-16 19:45 UTC (permalink / raw) To: Tvrtko Ursulin, Intel-GFX; +Cc: DRI-Devel On 9/16/2022 02:10, Tvrtko Ursulin wrote: > On 15/09/2022 21:03, John Harrison wrote: >> On 9/15/2022 01:59, Tvrtko Ursulin wrote: >>> >>> Hi, >>> >>> On 15/09/2022 00:46, John.C.Harrison@Intel.com wrote: >>>> From: John Harrison <John.C.Harrison@Intel.com> >>>> >>>> Going forwards, the intention is for GuC firmware files to be named >>>> for their major version only and HuC firmware files to have no version >>>> number in the name at all. This patch adds those entries for all >>>> platforms that are officially GuC/HuC enabled. >>>> >>>> Also, update the expected GuC version numbers to the latest firmware >>>> release for those platforms. >>>> >>>> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> >>>> --- >>>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 10 +++++++--- >>>> 1 file changed, 7 insertions(+), 3 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> index 1169e2a09da24..b91ad4aede1f7 100644 >>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c >>>> @@ -72,12 +72,14 @@ void intel_uc_fw_change_status(struct >>>> intel_uc_fw *uc_fw, >>>> * security fixes, etc. to be enabled. >>>> */ >>>> #define INTEL_GUC_FIRMWARE_DEFS(fw_def, guc_maj, guc_mmp) \ >>>> - fw_def(DG2, 0, guc_mmp(dg2, 70, 4, 1)) \ >>>> + fw_def(DG2, 0, guc_maj(dg2, 70, 5)) \ >>> >>> Just glancing over out of curiosity. Part which confused me is that >>> if only major is supposed to be used then what is the '5' in >>> guc_maj(dg2, 70, 5) ? >> See the earlier patch that added support for version reduced >> filenames. The minor number is still specified because want to be >> able to warn the user if their firmware is out of date and causing >> them to miss features, security fixes, etc. The driver will still >> load any old firmware with the right name and work with it, but >> user's need to know that there are updates available. > > Got it. Release is deemed not important enough to warn about? no > actually, it's different, I guess we never expect to bump only the > release with a source level change - so in practice kernel could not > warn that there is a newer release version since it would never know. > In other words those ones would only be hitting linux-firmware, while > minor changes would be kernel patches as well. By "release" you mean patch level? As in <MAJOR.MINOR.PATCH>. Yeah, I'm in two minds about being explicit on the patch level. It is possible that a particular feature might be added in 70.6.0 but then we find a bug, so it's only usable in 70.6.1. In which case, we want the KMD to notify users that an update is required. But in that case, we would also want to patch the kernel to disable that feature unless 70.6.1 or later is actually found. Or, there is just a straight up bug that affects everything and is fixed in 70.5.2. Again, we would want to notify that an update is available. But we can't exactly patch the kernel to not load i915 if 70.5.2 is not available. Having said that, updating the 'requested' version is a KMD change regardless of whether it is a bump of the major, minor or patch level version number. In which case, we have the opportunity to add in patch level reporting at that point if required. But the counter argument is that, as you say, a firmware bug fix does not generally require an actual KMD code change. The i915 patch would purely be to bump the version number. So is it worth the churn? For major/minor changes there are corresponding i915 changes - either a re-write of existing code (major) or a new feature being added (minor). So bumping the number is 'free' given that a patch is required regardless. And is the code churn to provide a warning really useful? Would an end user ever notice the line in dmesg? Isn't it up to the distros to provide important bug fixes via package updates when necessary? So yeah, not sure. Unnecessary code churn versus warning about potentially important bug fixes. Pick your evil. > >>> I also couldn't find guc_maj with grep so I guess it's some sort of >>> a magic concatenation macro or what? >> 'guc_maj' is a macro parameter as per the definition of the macro >> three lines above. According to where INTEL_GUC_FIRMWARE_DEFS is >> used, it becomes either a mechanism for creating just a >> 'MODULE_FIRMWARE' definition for the firmware file or a table entry >> giving all the version information as well as the filename. > > Doh thanks, macro magic was apparently impenetrable to me yesterday. Yeah, this particular set of macro magic is impressively complex. It took me quite a while to properly understand exactly what is happening and how when I did the actual versionless filename updates in the first place! John. > > Regards, > > Tvrtko ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for New GuC and new GuC/HuC names 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison (?) (?) @ 2022-09-15 3:09 ` Patchwork -1 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2022-09-15 3:09 UTC (permalink / raw) To: john.c.harrison; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 6202 bytes --] == Series Details == Series: New GuC and new GuC/HuC names URL : https://patchwork.freedesktop.org/series/108582/ State : success == Summary == CI Bug Log - changes from CI_DRM_12139 -> Patchwork_108582v1 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/index.html Participating hosts (39 -> 40) ------------------------------ Additional (2): bat-rplp-1 bat-dg2-8 Missing (1): fi-ctg-p8600 Known issues ------------ Here are the changes found in Patchwork_108582v1 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live@gem: - fi-pnv-d510: [PASS][1] -> [DMESG-FAIL][2] ([i915#4528]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-pnv-d510/igt@i915_selftest@live@gem.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/fi-pnv-d510/igt@i915_selftest@live@gem.html * igt@i915_suspend@basic-s3-without-i915: - fi-rkl-11600: [PASS][3] -> [INCOMPLETE][4] ([i915#5982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html * igt@runner@aborted: - fi-pnv-d510: NOTRUN -> [FAIL][5] ([fdo#109271] / [i915#2403] / [i915#4312]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/fi-pnv-d510/igt@runner@aborted.html #### Possible fixes #### * igt@gem_ringfill@basic-all: - {bat-dg2-9}: [FAIL][6] ([i915#5886]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/bat-dg2-9/igt@gem_ringfill@basic-all.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/bat-dg2-9/igt@gem_ringfill@basic-all.html * igt@i915_selftest@live@hangcheck: - bat-dg1-5: [DMESG-FAIL][8] ([i915#4494] / [i915#4957]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/bat-dg1-5/igt@i915_selftest@live@hangcheck.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size: - fi-bsw-kefka: [FAIL][10] ([i915#6298]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4093]: https://gitlab.freedesktop.org/drm/intel/issues/4093 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213 [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494 [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528 [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873 [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957 [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190 [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274 [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354 [i915#5886]: https://gitlab.freedesktop.org/drm/intel/issues/5886 [i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982 [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621 [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645 [i915#6842]: https://gitlab.freedesktop.org/drm/intel/issues/6842 Build changes ------------- * Linux: CI_DRM_12139 -> Patchwork_108582v1 CI-20190529: 20190529 CI_DRM_12139: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_108582v1: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 955a718b3aae drm/i915/uc: Update to latest GuC and use new-format GuC/HuC names == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/index.html [-- Attachment #2: Type: text/html, Size: 4918 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for New GuC and new GuC/HuC names 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison ` (2 preceding siblings ...) (?) @ 2022-09-15 19:54 ` Patchwork -1 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2022-09-15 19:54 UTC (permalink / raw) To: john.c.harrison; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 28024 bytes --] == Series Details == Series: New GuC and new GuC/HuC names URL : https://patchwork.freedesktop.org/series/108582/ State : success == Summary == CI Bug Log - changes from CI_DRM_12139_full -> Patchwork_108582v1_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (11 -> 11) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_108582v1_full that come from known issues: ### CI changes ### #### Possible fixes #### * boot: - shard-glk: ([PASS][1], [PASS][2], [FAIL][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24]) ([i915#4392]) -> ([PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk1/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk5/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk6/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk7/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk7/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk9/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk9/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk9/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk9/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk8/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk8/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk7/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk7/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk7/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/boot.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/boot.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/boot.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/boot.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/boot.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/boot.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/boot.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/boot.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/boot.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/boot.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk2/boot.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk2/boot.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk2/boot.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk1/boot.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk1/boot.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk1/boot.html ### IGT changes ### #### Issues hit #### * igt@gem_create@create-massive: - shard-glk: NOTRUN -> [DMESG-WARN][50] ([i915#4991]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk9/igt@gem_create@create-massive.html * igt@gem_eio@in-flight-contexts-10ms: - shard-apl: [PASS][51] -> [TIMEOUT][52] ([i915#3063]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl7/igt@gem_eio@in-flight-contexts-10ms.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl3/igt@gem_eio@in-flight-contexts-10ms.html * igt@gem_eio@kms: - shard-tglb: [PASS][53] -> [FAIL][54] ([i915#5784]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb6/igt@gem_eio@kms.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb1/igt@gem_eio@kms.html * igt@gem_eio@unwedge-stress: - shard-iclb: [PASS][55] -> [TIMEOUT][56] ([i915#3070]) [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@gem_eio@unwedge-stress.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb2/igt@gem_eio@unwedge-stress.html * igt@gem_exec_balancer@parallel-bb-first: - shard-iclb: [PASS][57] -> [SKIP][58] ([i915#4525]) +1 similar issue [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html * igt@gem_exec_fair@basic-deadline: - shard-glk: [PASS][59] -> [FAIL][60] ([i915#2846]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk2/igt@gem_exec_fair@basic-deadline.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk2/igt@gem_exec_fair@basic-deadline.html * igt@gem_exec_fair@basic-flow@rcs0: - shard-tglb: [PASS][61] -> [FAIL][62] ([i915#2842]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-none-solo@rcs0: - shard-apl: [PASS][63] -> [FAIL][64] ([i915#2842]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html * igt@gem_exec_fair@basic-none@vcs1: - shard-iclb: NOTRUN -> [FAIL][65] ([i915#2842]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html * igt@gem_lmem_swapping@heavy-verify-multi: - shard-glk: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#4613]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@gem_lmem_swapping@heavy-verify-multi.html * igt@gem_pread@exhaustion: - shard-glk: NOTRUN -> [WARN][67] ([i915#2658]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@gem_pread@exhaustion.html * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs: - shard-glk: NOTRUN -> [SKIP][68] ([fdo#109271]) +51 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html * igt@gen9_exec_parse@allowed-single: - shard-glk: [PASS][69] -> [DMESG-WARN][70] ([i915#5566] / [i915#716]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk9/igt@gen9_exec_parse@allowed-single.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk7/igt@gen9_exec_parse@allowed-single.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][71] -> [FAIL][72] ([i915#454]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb4/igt@i915_pm_dc@dc6-psr.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb6/igt@i915_pm_dc@dc6-psr.html * igt@i915_suspend@sysfs-reader: - shard-apl: [PASS][73] -> [DMESG-WARN][74] ([i915#180]) +2 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl1/igt@i915_suspend@sysfs-reader.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl1/igt@i915_suspend@sysfs-reader.html * igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-glk: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#3886]) +1 similar issue [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs: - shard-apl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#3886]) [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl8/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_mc_ccs.html * igt@kms_chamelium@common-hpd-after-suspend: - shard-glk: NOTRUN -> [SKIP][77] ([fdo#109271] / [fdo#111827]) +1 similar issue [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-edid-read: - shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [fdo#111827]) +1 similar issue [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl8/igt@kms_chamelium@hdmi-edid-read.html * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size: - shard-tglb: [PASS][79] -> [FAIL][80] ([i915#2346]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html * igt@kms_flip@2x-nonexisting-fb: - shard-apl: NOTRUN -> [SKIP][81] ([fdo#109271]) +16 similar issues [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl8/igt@kms_flip@2x-nonexisting-fb.html * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][82] ([i915#6375]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode: - shard-iclb: NOTRUN -> [SKIP][83] ([i915#2587] / [i915#2672]) +1 similar issue [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode: - shard-iclb: NOTRUN -> [SKIP][84] ([i915#2672]) +3 similar issues [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: - shard-glk: NOTRUN -> [FAIL][85] ([fdo#108145] / [i915#265]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html * igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1: - shard-glk: [PASS][86] -> [FAIL][87] ([i915#1888]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf: - shard-glk: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658]) +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk5/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr@psr2_sprite_mmap_cpu: - shard-iclb: [PASS][89] -> [SKIP][90] ([fdo#109441]) +1 similar issue [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html #### Possible fixes #### * igt@gem_ctx_exec@basic-nohangcheck: - shard-tglb: [FAIL][91] ([i915#6268]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb1/igt@gem_ctx_exec@basic-nohangcheck.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html - {shard-tglu}: [FAIL][93] ([i915#6268]) -> [PASS][94] [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglu-4/igt@gem_ctx_exec@basic-nohangcheck.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglu-4/igt@gem_ctx_exec@basic-nohangcheck.html * igt@gem_exec_fair@basic-none-share@rcs0: - {shard-tglu}: [FAIL][95] ([i915#2842]) -> [PASS][96] [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglu-3/igt@gem_exec_fair@basic-none-share@rcs0.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglu-2/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [FAIL][97] ([i915#2842]) -> [PASS][98] [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_softpin@noreloc-s3: - shard-apl: [DMESG-WARN][99] ([i915#180]) -> [PASS][100] [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-apl3/igt@gem_softpin@noreloc-s3.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-apl8/igt@gem_softpin@noreloc-s3.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [FAIL][101] ([i915#454]) -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb1/igt@i915_pm_dc@dc6-dpms.html * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-1: - {shard-tglu}: [FAIL][103] ([i915#1888]) -> [PASS][104] [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglu-6/igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-1.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglu-3/igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-1.html * igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1: - shard-glk: [FAIL][105] ([i915#2122]) -> [PASS][106] +1 similar issue [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2: - shard-glk: [FAIL][107] ([i915#79]) -> [PASS][108] [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-glk: [FAIL][109] ([i915#1888] / [i915#2546]) -> [PASS][110] +1 similar issue [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html * igt@kms_plane_lowres@tiling-y@pipe-b-hdmi-a-1: - shard-glk: [FAIL][111] ([i915#1888]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-glk8/igt@kms_plane_lowres@tiling-y@pipe-b-hdmi-a-1.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-glk6/igt@kms_plane_lowres@tiling-y@pipe-b-hdmi-a-1.html * igt@kms_psr@psr2_dpms: - shard-iclb: [SKIP][113] ([fdo#109441]) -> [PASS][114] [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb5/igt@kms_psr@psr2_dpms.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb2/igt@kms_psr@psr2_dpms.html #### Warnings #### * igt@gem_eio@unwedge-stress: - shard-tglb: [TIMEOUT][115] ([i915#3063]) -> [FAIL][116] ([i915#5784]) [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb6/igt@gem_eio@unwedge-stress.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb1/igt@gem_eio@unwedge-stress.html * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: [FAIL][117] ([i915#6117]) -> [SKIP][118] ([i915#4525]) [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@gem_exec_balancer@parallel-ordering.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb7/igt@gem_exec_balancer@parallel-ordering.html * igt@i915_pm_rc6_residency@rc6-idle@bcs0: - shard-iclb: [WARN][119] ([i915#2684]) -> [FAIL][120] ([i915#2684]) [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle@bcs0.html * igt@i915_pm_rc6_residency@rc6-idle@rcs0: - shard-tglb: [FAIL][121] ([i915#2681] / [i915#3591]) -> [WARN][122] ([i915#2681]) [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-tglb8/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-tglb7/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html * igt@i915_pm_rc6_residency@rc6-idle@vcs0: - shard-iclb: [FAIL][123] ([i915#2684]) -> [WARN][124] ([i915#2684]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html * igt@kms_psr2_sf@overlay-plane-update-continuous-sf: - shard-iclb: [SKIP][125] ([fdo#111068] / [i915#658]) -> [SKIP][126] ([i915#2920]) +2 similar issues [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12139/shard-iclb5/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530 [i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002 [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012 [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063 [i915#3070]: https://gitlab.freedesktop.org/drm/intel/issues/3070 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804 [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4392]: https://gitlab.freedesktop.org/drm/intel/issues/4392 [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566 [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227 [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 [i915#6375]: https://gitlab.freedesktop.org/drm/intel/issues/6375 [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 Build changes ------------- * Linux: CI_DRM_12139 -> Patchwork_108582v1 CI-20190529: 20190529 CI_DRM_12139: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_108582v1: 139145da628d79344121b5e1b46648059388683b @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108582v1/index.html [-- Attachment #2: Type: text/html, Size: 28016 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2022-09-16 19:45 UTC | newest] Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-09-14 23:46 [PATCH 0/1] New GuC and new GuC/HuC names John.C.Harrison 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison 2022-09-14 23:46 ` [PATCH 1/1] drm/i915/uc: Update to latest GuC and use new-format " John.C.Harrison 2022-09-14 23:46 ` [Intel-gfx] " John.C.Harrison 2022-09-15 0:38 ` Ceraolo Spurio, Daniele 2022-09-15 8:59 ` Tvrtko Ursulin 2022-09-15 8:59 ` Tvrtko Ursulin 2022-09-15 20:03 ` John Harrison 2022-09-15 20:03 ` John Harrison 2022-09-16 9:10 ` Tvrtko Ursulin 2022-09-16 9:10 ` Tvrtko Ursulin 2022-09-16 19:45 ` John Harrison 2022-09-16 19:45 ` John Harrison 2022-09-15 3:09 ` [Intel-gfx] ✓ Fi.CI.BAT: success for New GuC and new " Patchwork 2022-09-15 19:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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