[PATCH v2 0/3] Add riscv semihosting support in u-boot

[PATCH v2 0/3] Add riscv semihosting support in u-boot

[Kautuk Consul]

Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.

CHANGES since v1:
-   Moved the identical smh_* and semihosting_enabled/disable_semihosting
	code of ARM and RISC-V to lib/semihosting.c
-	Extend the handle_trap() functionality to call disable_semihosting()
	if the cause is a breakpoint (i.e. ebreak instruction)
-	Change our implementation of semihosting_enabled to be exactly the
	same as the way ARM implemented it
-	Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
	configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
	gets automatically enabled instead of us #defining it in
	include/configs/qemu-riscv.h

Compilation and test commands for SPL and S-mode configurations
=================================================================

U-Boot S-mode on QEMU virt
----------------------------
// Compilation of S-mode u-boot
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_smode_defconfig
make
// Run riscv 64-bit u-boot with opensbi on qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
u-boot/u-boot.bin

U-Boot SPL on QEMU virt
------------------------
// Compilation of u-boot-spl
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x80200000

Kautuk Consul (3):
  lib: Add common semihosting library
  arch/riscv: add semihosting support for RISC-V
  board: qemu-riscv: enable semihosting

 arch/arm/Kconfig                     |   2 +
 arch/arm/lib/semihosting.c           | 179 +-------------------------
 arch/riscv/Kconfig                   |  47 +++++++
 arch/riscv/include/asm/semihosting.h |  11 ++
 arch/riscv/include/asm/spl.h         |   1 +
 arch/riscv/lib/Makefile              |   2 +
 arch/riscv/lib/interrupts.c          |  11 ++
 arch/riscv/lib/semihosting.c         |  24 ++++
 configs/qemu-riscv32_defconfig       |   4 +
 configs/qemu-riscv32_smode_defconfig |   4 +
 configs/qemu-riscv32_spl_defconfig   |   7 +
 configs/qemu-riscv64_defconfig       |   4 +
 configs/qemu-riscv64_smode_defconfig |   4 +
 configs/qemu-riscv64_spl_defconfig   |   7 +
 include/semihosting.h                |  11 ++
 lib/Kconfig                          |   3 +
 lib/Makefile                         |   2 +
 lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
 18 files changed, 331 insertions(+), 178 deletions(-)
 create mode 100644 arch/riscv/include/asm/semihosting.h
 create mode 100644 arch/riscv/lib/semihosting.c
 create mode 100644 lib/semihosting.c

-- 
2.34.1

[PATCH v2 1/3] lib: Add common semihosting library

[Kautuk Consul]

We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.

Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
---
 arch/arm/Kconfig           |   2 +
 arch/arm/lib/semihosting.c | 179 +----------------------------------
 include/semihosting.h      |  11 +++
 lib/Kconfig                |   3 +
 lib/Makefile               |   2 +
 lib/semihosting.c          | 186 +++++++++++++++++++++++++++++++++++++
 6 files changed, 205 insertions(+), 178 deletions(-)
 create mode 100644 lib/semihosting.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 82cd456f51..81440ff7ea 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -415,6 +415,7 @@ config ARM_SMCCC
 
 config SEMIHOSTING
 	bool "Support ARM semihosting"
+	select LIB_SEMIHOSTING
 	help
 	  Semihosting is a method for a target to communicate with a host
 	  debugger. It uses special instructions which the debugger will trap
@@ -437,6 +438,7 @@ config SEMIHOSTING_FALLBACK
 
 config SPL_SEMIHOSTING
 	bool "Support ARM semihosting in SPL"
+	select LIB_SEMIHOSTING
 	depends on SPL
 	help
 	  Semihosting is a method for a target to communicate with a host
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 01d652a6b8..41bc5cd62b 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -13,22 +13,10 @@
 #include <log.h>
 #include <semihosting.h>
 
-#define SYSOPEN		0x01
-#define SYSCLOSE	0x02
-#define SYSWRITEC	0x03
-#define SYSWRITE0	0x04
-#define SYSWRITE	0x05
-#define SYSREAD		0x06
-#define SYSREADC	0x07
-#define SYSISERROR	0x08
-#define SYSSEEK		0x0A
-#define SYSFLEN		0x0C
-#define SYSERRNO	0x13
-
 /*
  * Call the handler
  */
-static noinline long smh_trap(unsigned int sysnum, void *addr)
+long smh_trap(unsigned int sysnum, void *addr)
 {
 	register long result asm("r0");
 #if defined(CONFIG_ARM64)
@@ -41,168 +29,3 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
 #endif
 	return result;
 }
-
-#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
-static bool _semihosting_enabled = true;
-static bool try_semihosting = true;
-
-bool semihosting_enabled(void)
-{
-	if (try_semihosting) {
-		smh_trap(SYSERRNO, NULL);
-		try_semihosting = false;
-	}
-
-	return _semihosting_enabled;
-}
-
-void disable_semihosting(void)
-{
-	_semihosting_enabled = false;
-}
-#endif
-
-/**
- * smh_errno() - Read the host's errno
- *
- * This gets the value of the host's errno and negates it. The host's errno may
- * or may not be set, so only call this function if a previous semihosting call
- * has failed.
- *
- * Return: a negative error value
- */
-static int smh_errno(void)
-{
-	long ret = smh_trap(SYSERRNO, NULL);
-
-	if (ret > 0 && ret < INT_MAX)
-		return -ret;
-	return -EIO;
-}
-
-long smh_open(const char *fname, enum smh_open_mode mode)
-{
-	long fd;
-	struct smh_open_s {
-		const char *fname;
-		unsigned long mode;
-		size_t len;
-	} open;
-
-	debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
-
-	open.fname = fname;
-	open.len = strlen(fname);
-	open.mode = mode;
-
-	/* Open the file on the host */
-	fd = smh_trap(SYSOPEN, &open);
-	if (fd == -1)
-		return smh_errno();
-	return fd;
-}
-
-/**
- * struct smg_rdwr_s - Arguments for read and write
- * @fd: A file descriptor returned from smh_open()
- * @memp: Pointer to a buffer of memory of at least @len bytes
- * @len: The number of bytes to read or write
- */
-struct smh_rdwr_s {
-	long fd;
-	void *memp;
-	size_t len;
-};
-
-long smh_read(long fd, void *memp, size_t len)
-{
-	long ret;
-	struct smh_rdwr_s read;
-
-	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
-
-	read.fd = fd;
-	read.memp = memp;
-	read.len = len;
-
-	ret = smh_trap(SYSREAD, &read);
-	if (ret < 0)
-		return smh_errno();
-	return len - ret;
-}
-
-long smh_write(long fd, const void *memp, size_t len, ulong *written)
-{
-	long ret;
-	struct smh_rdwr_s write;
-
-	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
-
-	write.fd = fd;
-	write.memp = (void *)memp;
-	write.len = len;
-
-	ret = smh_trap(SYSWRITE, &write);
-	*written = len - ret;
-	if (ret)
-		return smh_errno();
-	return 0;
-}
-
-long smh_close(long fd)
-{
-	long ret;
-
-	debug("%s: fd %ld\n", __func__, fd);
-
-	ret = smh_trap(SYSCLOSE, &fd);
-	if (ret == -1)
-		return smh_errno();
-	return 0;
-}
-
-long smh_flen(long fd)
-{
-	long ret;
-
-	debug("%s: fd %ld\n", __func__, fd);
-
-	ret = smh_trap(SYSFLEN, &fd);
-	if (ret == -1)
-		return smh_errno();
-	return ret;
-}
-
-long smh_seek(long fd, long pos)
-{
-	long ret;
-	struct smh_seek_s {
-		long fd;
-		long pos;
-	} seek;
-
-	debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
-
-	seek.fd = fd;
-	seek.pos = pos;
-
-	ret = smh_trap(SYSSEEK, &seek);
-	if (ret)
-		return smh_errno();
-	return 0;
-}
-
-int smh_getc(void)
-{
-	return smh_trap(SYSREADC, NULL);
-}
-
-void smh_putc(char ch)
-{
-	smh_trap(SYSWRITEC, &ch);
-}
-
-void smh_puts(const char *s)
-{
-	smh_trap(SYSWRITE0, (char *)s);
-}
diff --git a/include/semihosting.h b/include/semihosting.h
index f1f73464e4..f883676b91 100644
--- a/include/semihosting.h
+++ b/include/semihosting.h
@@ -17,6 +17,17 @@
 #define SMH_T32_SVC 0xDFAB
 #define SMH_T32_HLT 0xBABC
 
+/**
+ * semh_trap() - ARCH-specific semihosting call.
+ *
+ * Semihosting library/driver can use this function to do the
+ * actual semihosting calls.
+ *
+ * Return: Error code defined by semihosting spec.
+ */
+
+long smh_trap(unsigned int sysnum, void *addr);
+
 #if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
 /**
  * semihosting_enabled() - Determine whether semihosting is supported
diff --git a/lib/Kconfig b/lib/Kconfig
index 6121c80dc8..286d316110 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -71,6 +71,9 @@ config HAVE_PRIVATE_LIBGCC
 config LIB_UUID
 	bool
 
+config LIB_SEMIHOSTING
+	bool
+
 config PRINTF
 	bool
 	default y
diff --git a/lib/Makefile b/lib/Makefile
index e3deb15287..96be8fe7e9 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -145,6 +145,8 @@ obj-y += date.o
 obj-y += rtc-lib.o
 obj-$(CONFIG_LIB_ELF) += elf.o
 
+obj-$(CONFIG_LIB_SEMIHOSTING) += semihosting.o
+
 #
 # Build a fast OID lookup registry from include/linux/oid_registry.h
 #
diff --git a/lib/semihosting.c b/lib/semihosting.c
new file mode 100644
index 0000000000..831774e356
--- /dev/null
+++ b/lib/semihosting.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ * Copyright 2014 Broadcom Corporation
+ */
+
+#include <common.h>
+#include <log.h>
+#include <semihosting.h>
+
+#define SYSOPEN		0x01
+#define SYSCLOSE	0x02
+#define SYSWRITEC	0x03
+#define SYSWRITE0	0x04
+#define SYSWRITE	0x05
+#define SYSREAD		0x06
+#define SYSREADC	0x07
+#define SYSISERROR	0x08
+#define SYSSEEK		0x0A
+#define SYSFLEN		0x0C
+#define SYSERRNO	0x13
+
+#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
+static bool _semihosting_enabled = true;
+static bool try_semihosting = true;
+
+bool semihosting_enabled(void)
+{
+	if (try_semihosting) {
+		smh_trap(SYSERRNO, NULL);
+		try_semihosting = false;
+	}
+
+	return _semihosting_enabled;
+}
+
+void disable_semihosting(void)
+{
+	_semihosting_enabled = false;
+}
+#endif
+
+/**
+ * smh_errno() - Read the host's errno
+ *
+ * This gets the value of the host's errno and negates it. The host's errno may
+ * or may not be set, so only call this function if a previous semihosting call
+ * has failed.
+ *
+ * Return: a negative error value
+ */
+static int smh_errno(void)
+{
+	long ret = smh_trap(SYSERRNO, NULL);
+
+	if (ret > 0 && ret < INT_MAX)
+		return -ret;
+	return -EIO;
+}
+
+long smh_open(const char *fname, enum smh_open_mode mode)
+{
+	long fd;
+	struct smh_open_s {
+		const char *fname;
+		unsigned long mode;
+		size_t len;
+	} open;
+
+	debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
+
+	open.fname = fname;
+	open.len = strlen(fname);
+	open.mode = mode;
+
+	/* Open the file on the host */
+	fd = smh_trap(SYSOPEN, &open);
+	if (fd == -1)
+		return smh_errno();
+	return fd;
+}
+
+/**
+ * struct smg_rdwr_s - Arguments for read and write
+ * @fd: A file descriptor returned from smh_open()
+ * @memp: Pointer to a buffer of memory of at least @len bytes
+ * @len: The number of bytes to read or write
+ */
+struct smh_rdwr_s {
+	long fd;
+	void *memp;
+	size_t len;
+};
+
+long smh_read(long fd, void *memp, size_t len)
+{
+	long ret;
+	struct smh_rdwr_s read;
+
+	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
+
+	read.fd = fd;
+	read.memp = memp;
+	read.len = len;
+
+	ret = smh_trap(SYSREAD, &read);
+	if (ret < 0)
+		return smh_errno();
+	return len - ret;
+}
+
+long smh_write(long fd, const void *memp, size_t len, ulong *written)
+{
+	long ret;
+	struct smh_rdwr_s write;
+
+	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
+
+	write.fd = fd;
+	write.memp = (void *)memp;
+	write.len = len;
+
+	ret = smh_trap(SYSWRITE, &write);
+	*written = len - ret;
+	if (ret)
+		return smh_errno();
+	return 0;
+}
+
+long smh_close(long fd)
+{
+	long ret;
+
+	debug("%s: fd %ld\n", __func__, fd);
+
+	ret = smh_trap(SYSCLOSE, &fd);
+	if (ret == -1)
+		return smh_errno();
+	return 0;
+}
+
+long smh_flen(long fd)
+{
+	long ret;
+
+	debug("%s: fd %ld\n", __func__, fd);
+
+	ret = smh_trap(SYSFLEN, &fd);
+	if (ret == -1)
+		return smh_errno();
+	return ret;
+}
+
+long smh_seek(long fd, long pos)
+{
+	long ret;
+	struct smh_seek_s {
+		long fd;
+		long pos;
+	} seek;
+
+	debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
+
+	seek.fd = fd;
+	seek.pos = pos;
+
+	ret = smh_trap(SYSSEEK, &seek);
+	if (ret)
+		return smh_errno();
+	return 0;
+}
+
+int smh_getc(void)
+{
+	return smh_trap(SYSREADC, NULL);
+}
+
+void smh_putc(char ch)
+{
+	smh_trap(SYSWRITEC, &ch);
+}
+
+void smh_puts(const char *s)
+{
+	smh_trap(SYSWRITE0, (char *)s);
+}
-- 
2.34.1

[PATCH v2 2/3] arch/riscv: add semihosting support for RISC-V

[Kautuk Consul]

We add RISC-V semihosting based serial console for JTAG based early
debugging.

The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
---
 arch/riscv/Kconfig                   | 47 ++++++++++++++++++++++++++++
 arch/riscv/include/asm/semihosting.h | 11 +++++++
 arch/riscv/include/asm/spl.h         |  1 +
 arch/riscv/lib/Makefile              |  2 ++
 arch/riscv/lib/interrupts.c          | 11 +++++++
 arch/riscv/lib/semihosting.c         | 24 ++++++++++++++
 6 files changed, 96 insertions(+)
 create mode 100644 arch/riscv/include/asm/semihosting.h
 create mode 100644 arch/riscv/lib/semihosting.c

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 78e964db12..b15d9028bd 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -371,4 +371,51 @@ config TPL_USE_ARCH_MEMSET
 
 endmenu
 
+config SEMIHOSTING
+	bool "Support RISCV semihosting"
+	select LIB_SEMIHOSTING
+	help
+	  Semihosting is a method for a target to communicate with a host
+	  debugger. It uses special instructions which the debugger will trap
+	  on and interpret. This allows U-Boot to read/write files, print to
+	  the console, and execute arbitrary commands on the host system.
+
+	  Enabling this option will add support for reading and writing files
+	  on the host system. If you don't have a debugger attached then trying
+	  to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
+
+config SEMIHOSTING_FALLBACK
+	bool "Recover gracefully when semihosting fails"
+	depends on SEMIHOSTING && RISCV
+	default y
+	help
+	  Normally, if U-Boot makes a semihosting call and no debugger is
+	  attached, then it will panic due to a synchronous abort
+	  exception. This config adds an exception handler which will allow
+	  U-Boot to recover. Say 'y' if unsure.
+
+config SPL_SEMIHOSTING
+	bool "Support RISCV semihosting in SPL"
+	depends on SPL
+	select LIB_SEMIHOSTING
+	help
+	  Semihosting is a method for a target to communicate with a host
+	  debugger. It uses special instructions which the debugger will trap
+	  on and interpret. This allows U-Boot to read/write files, print to
+	  the console, and execute arbitrary commands on the host system.
+
+	  Enabling this option will add support for reading and writing files
+	  on the host system. If you don't have a debugger attached then trying
+	  to do this will likely cause U-Boot to hang. Say 'n' if you are unsure.
+
+config SPL_SEMIHOSTING_FALLBACK
+	bool "Recover gracefully when semihosting fails in SPL"
+	depends on SPL_SEMIHOSTING && RISCV
+	default y
+	help
+	  Normally, if U-Boot makes a semihosting call and no debugger is
+	  attached, then it will panic due to a synchronous abort
+	  exception. This config adds an exception handler which will allow
+	  U-Boot to recover. Say 'y' if unsure.
+
 endmenu
diff --git a/arch/riscv/include/asm/semihosting.h b/arch/riscv/include/asm/semihosting.h
new file mode 100644
index 0000000000..7042821e00
--- /dev/null
+++ b/arch/riscv/include/asm/semihosting.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#ifndef __ASM_RISCV_SEMIHOSTING_H
+#define __ASM_RISCV_SEMIHOSTING_H
+
+long smh_trap(int sysnum, void *addr);
+
+#endif /* __ASM_RISCV_SEMIHOSTING_H */
diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h
index e8a94fcb1f..2898a770ee 100644
--- a/arch/riscv/include/asm/spl.h
+++ b/arch/riscv/include/asm/spl.h
@@ -25,6 +25,7 @@ enum {
 	BOOT_DEVICE_DFU,
 	BOOT_DEVICE_XIP,
 	BOOT_DEVICE_BOOTROM,
+	BOOT_DEVICE_SMH,
 	BOOT_DEVICE_NONE
 };
 
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 06020fcc2a..64e29804c1 100644
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -42,3 +42,5 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC)
 obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
 obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o
 obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
+
+obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index 100be2e966..bd7cd772b8 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -17,6 +17,7 @@
 #include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/encoding.h>
+#include <semihosting.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -149,6 +150,16 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs)
 	/* An UEFI application may have changed gd. Restore U-Boot's gd. */
 	efi_restore_gd();
 
+	if (cause == CAUSE_BREAKPOINT &&
+	    CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) {
+		/* For semihosting fallback we simply skip the ebreak
+		 * instruction.
+		 */
+		disable_semihosting();
+		epc += 4;
+		return epc;
+	}
+
 	is_irq = (cause & MCAUSE_INT);
 	irq = (cause & ~MCAUSE_INT);
 
diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c
new file mode 100644
index 0000000000..72ea9521dc
--- /dev/null
+++ b/arch/riscv/lib/semihosting.c
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include <common.h>
+
+long smh_trap(int sysnum, void *addr)
+{
+	register int ret asm ("a0") = sysnum;
+	register void *param0 asm ("a1") = addr;
+
+	asm volatile ("\t.option push\n"
+		"\t.option norvc\n"
+		"\tj 1f\n"
+		"\t.align 4\n"
+		"\t1: slli zero, zero, 0x1f\n"
+		"\tebreak\n"
+		"\tsrai zero, zero, 7\n"
+		"\t.option pop\n"
+		: "+r" (ret) : "r" (param0) : "memory");
+
+	return ret;
+}
-- 
2.34.1

[PATCH v2 3/3] board: qemu-riscv: enable semihosting

[Kautuk Consul]

To enable semihosting we also need to enable the following
configs in defconfigs:
CONFIG_SEMIHOSTING
CONFIG_SPL_SEMIHOSTING
CONFIG_SEMIHOSTING_SERIAL
CONFIG_SERIAL_PROBE_ALL
CONFIG_SPL_FS_EXT4
CONFIG_SPL_FS_FAT

Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
---
 configs/qemu-riscv32_defconfig       | 4 ++++
 configs/qemu-riscv32_smode_defconfig | 4 ++++
 configs/qemu-riscv32_spl_defconfig   | 7 +++++++
 configs/qemu-riscv64_defconfig       | 4 ++++
 configs/qemu-riscv64_smode_defconfig | 4 ++++
 configs/qemu-riscv64_spl_defconfig   | 7 +++++++
 6 files changed, 30 insertions(+)

diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 9634d7f77f..4961652548 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -1,4 +1,5 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
@@ -20,3 +21,6 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 1c5a0617aa..91e4ffebc2 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -1,4 +1,5 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
@@ -21,4 +22,7 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
 CONFIG_SYSRESET_SBI=y
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index 2421c9a371..5fd28fc58c 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -1,9 +1,12 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
+CONFIG_SPL_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32"
 CONFIG_SPL=y
+CONFIG_SPL_FS_FAT=y
 CONFIG_SYS_LOAD_ADDR=0x80200000
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_RISCV_SMODE=y
@@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x84000000
 CONFIG_SYS_SPL_MALLOC=y
+CONFIG_SPL_FS_EXT4=y
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
@@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
 CONFIG_SYSRESET_SBI=y
 # CONFIG_BINMAN_FDT is not set
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index d5eae95c80..87478f4481 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -1,4 +1,5 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
@@ -21,3 +22,6 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index 2861d07f97..5e9d6af3be 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -1,4 +1,5 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
@@ -24,4 +25,7 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
 CONFIG_SYSRESET_SBI=y
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index 1ecfa27ce2..e5d817b783 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -1,9 +1,12 @@
 CONFIG_RISCV=y
+CONFIG_SEMIHOSTING=y
+CONFIG_SPL_SEMIHOSTING=y
 CONFIG_SYS_MALLOC_LEN=0x800000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64"
 CONFIG_SPL=y
+CONFIG_SPL_FS_FAT=y
 CONFIG_SYS_LOAD_ADDR=0x80200000
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_ARCH_RV64I=y
@@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SPL_MAX_SIZE=0x100000
 CONFIG_SPL_BSS_START_ADDR=0x84000000
 CONFIG_SYS_SPL_MALLOC=y
+CONFIG_SPL_FS_EXT4=y
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_SYS_BOOTM_LEN=0x4000000
@@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_SERIAL_PUTS is not set
+CONFIG_SERIAL_PROBE_ALL=y
+CONFIG_SEMIHOSTING_SERIAL=y
 CONFIG_SYSRESET_SBI=y
 # CONFIG_BINMAN_FDT is not set
-- 
2.34.1

Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Pali Rohár]

Hello! I'm not riscv maintainer and therefore I'm not going to review
this patch series. Please do not spam me with unrelated emails and
patches as I would loose track of patches and emails which are import
and which I should review. Thanks.

On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> Semihosting is a mechanism that enables code running on
> a target to communicate and use the Input/Output
> facilities on a host computer that is running a debugger.
> This patchset adds support for semihosting in u-boot
> for RISCV64 targets.
> 
> CHANGES since v1:
> -   Moved the identical smh_* and semihosting_enabled/disable_semihosting
> 	code of ARM and RISC-V to lib/semihosting.c
> -	Extend the handle_trap() functionality to call disable_semihosting()
> 	if the cause is a breakpoint (i.e. ebreak instruction)
> -	Change our implementation of semihosting_enabled to be exactly the
> 	same as the way ARM implemented it
> -	Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> 	configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> 	gets automatically enabled instead of us #defining it in
> 	include/configs/qemu-riscv.h
> 
> Compilation and test commands for SPL and S-mode configurations
> =================================================================
> 
> U-Boot S-mode on QEMU virt
> ----------------------------
> // Compilation of S-mode u-boot
> ARCH=riscv
> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> make qemu-riscv64_smode_defconfig
> make
> // Run riscv 64-bit u-boot with opensbi on qemu
> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> u-boot/u-boot.bin
> 
> U-Boot SPL on QEMU virt
> ------------------------
> // Compilation of u-boot-spl
> ARCH=riscv
> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> make qemu-riscv64_spl_defconfig
> make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> // Run 64-bit u-boot-spl in qemu
> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> u-boot/spl/u-boot-spl.bin -device\
> loader,file=u-boot/u-boot.itb,addr=0x80200000
> 
> Kautuk Consul (3):
>   lib: Add common semihosting library
>   arch/riscv: add semihosting support for RISC-V
>   board: qemu-riscv: enable semihosting
> 
>  arch/arm/Kconfig                     |   2 +
>  arch/arm/lib/semihosting.c           | 179 +-------------------------
>  arch/riscv/Kconfig                   |  47 +++++++
>  arch/riscv/include/asm/semihosting.h |  11 ++
>  arch/riscv/include/asm/spl.h         |   1 +
>  arch/riscv/lib/Makefile              |   2 +
>  arch/riscv/lib/interrupts.c          |  11 ++
>  arch/riscv/lib/semihosting.c         |  24 ++++
>  configs/qemu-riscv32_defconfig       |   4 +
>  configs/qemu-riscv32_smode_defconfig |   4 +
>  configs/qemu-riscv32_spl_defconfig   |   7 +
>  configs/qemu-riscv64_defconfig       |   4 +
>  configs/qemu-riscv64_smode_defconfig |   4 +
>  configs/qemu-riscv64_spl_defconfig   |   7 +
>  include/semihosting.h                |  11 ++
>  lib/Kconfig                          |   3 +
>  lib/Makefile                         |   2 +
>  lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
>  18 files changed, 331 insertions(+), 178 deletions(-)
>  create mode 100644 arch/riscv/include/asm/semihosting.h
>  create mode 100644 arch/riscv/lib/semihosting.c
>  create mode 100644 lib/semihosting.c
> 
> -- 
> 2.34.1
> 

Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Kautuk Consul]

Sorry about that!
I ran get_maintainer.pl on my patchset and got your name
along with several others so I also sent to you.

On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
>
> Hello! I'm not riscv maintainer and therefore I'm not going to review
> this patch series. Please do not spam me with unrelated emails and
> patches as I would loose track of patches and emails which are import
> and which I should review. Thanks.
>
> On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> > Semihosting is a mechanism that enables code running on
> > a target to communicate and use the Input/Output
> > facilities on a host computer that is running a debugger.
> > This patchset adds support for semihosting in u-boot
> > for RISCV64 targets.
> >
> > CHANGES since v1:
> > -   Moved the identical smh_* and semihosting_enabled/disable_semihosting
> >       code of ARM and RISC-V to lib/semihosting.c
> > -     Extend the handle_trap() functionality to call disable_semihosting()
> >       if the cause is a breakpoint (i.e. ebreak instruction)
> > -     Change our implementation of semihosting_enabled to be exactly the
> >       same as the way ARM implemented it
> > -     Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> >       configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> >       gets automatically enabled instead of us #defining it in
> >       include/configs/qemu-riscv.h
> >
> > Compilation and test commands for SPL and S-mode configurations
> > =================================================================
> >
> > U-Boot S-mode on QEMU virt
> > ----------------------------
> > // Compilation of S-mode u-boot
> > ARCH=riscv
> > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > make qemu-riscv64_smode_defconfig
> > make
> > // Run riscv 64-bit u-boot with opensbi on qemu
> > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> > u-boot/u-boot.bin
> >
> > U-Boot SPL on QEMU virt
> > ------------------------
> > // Compilation of u-boot-spl
> > ARCH=riscv
> > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > make qemu-riscv64_spl_defconfig
> > make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> > // Run 64-bit u-boot-spl in qemu
> > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > u-boot/spl/u-boot-spl.bin -device\
> > loader,file=u-boot/u-boot.itb,addr=0x80200000
> >
> > Kautuk Consul (3):
> >   lib: Add common semihosting library
> >   arch/riscv: add semihosting support for RISC-V
> >   board: qemu-riscv: enable semihosting
> >
> >  arch/arm/Kconfig                     |   2 +
> >  arch/arm/lib/semihosting.c           | 179 +-------------------------
> >  arch/riscv/Kconfig                   |  47 +++++++
> >  arch/riscv/include/asm/semihosting.h |  11 ++
> >  arch/riscv/include/asm/spl.h         |   1 +
> >  arch/riscv/lib/Makefile              |   2 +
> >  arch/riscv/lib/interrupts.c          |  11 ++
> >  arch/riscv/lib/semihosting.c         |  24 ++++
> >  configs/qemu-riscv32_defconfig       |   4 +
> >  configs/qemu-riscv32_smode_defconfig |   4 +
> >  configs/qemu-riscv32_spl_defconfig   |   7 +
> >  configs/qemu-riscv64_defconfig       |   4 +
> >  configs/qemu-riscv64_smode_defconfig |   4 +
> >  configs/qemu-riscv64_spl_defconfig   |   7 +
> >  include/semihosting.h                |  11 ++
> >  lib/Kconfig                          |   3 +
> >  lib/Makefile                         |   2 +
> >  lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
> >  18 files changed, 331 insertions(+), 178 deletions(-)
> >  create mode 100644 arch/riscv/include/asm/semihosting.h
> >  create mode 100644 arch/riscv/lib/semihosting.c
> >  create mode 100644 lib/semihosting.c
> >
> > --
> > 2.34.1
> >

Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Pali Rohár]

That is strange because I'm not aware of the fact that I'm riscv maintainer.

On Friday 16 September 2022 14:40:46 Kautuk Consul wrote:
> Sorry about that!
> I ran get_maintainer.pl on my patchset and got your name
> along with several others so I also sent to you.
> 
> On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
> >
> > Hello! I'm not riscv maintainer and therefore I'm not going to review
> > this patch series. Please do not spam me with unrelated emails and
> > patches as I would loose track of patches and emails which are import
> > and which I should review. Thanks.
> >
> > On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
> > > Semihosting is a mechanism that enables code running on
> > > a target to communicate and use the Input/Output
> > > facilities on a host computer that is running a debugger.
> > > This patchset adds support for semihosting in u-boot
> > > for RISCV64 targets.
> > >
> > > CHANGES since v1:
> > > -   Moved the identical smh_* and semihosting_enabled/disable_semihosting
> > >       code of ARM and RISC-V to lib/semihosting.c
> > > -     Extend the handle_trap() functionality to call disable_semihosting()
> > >       if the cause is a breakpoint (i.e. ebreak instruction)
> > > -     Change our implementation of semihosting_enabled to be exactly the
> > >       same as the way ARM implemented it
> > > -     Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
> > >       configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> > >       gets automatically enabled instead of us #defining it in
> > >       include/configs/qemu-riscv.h
> > >
> > > Compilation and test commands for SPL and S-mode configurations
> > > =================================================================
> > >
> > > U-Boot S-mode on QEMU virt
> > > ----------------------------
> > > // Compilation of S-mode u-boot
> > > ARCH=riscv
> > > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > > make qemu-riscv64_smode_defconfig
> > > make
> > > // Run riscv 64-bit u-boot with opensbi on qemu
> > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> > > u-boot/u-boot.bin
> > >
> > > U-Boot SPL on QEMU virt
> > > ------------------------
> > > // Compilation of u-boot-spl
> > > ARCH=riscv
> > > CROSS_COMPILE=riscv64-unknown-linux-gnu-
> > > make qemu-riscv64_spl_defconfig
> > > make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> > > // Run 64-bit u-boot-spl in qemu
> > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> > > u-boot/spl/u-boot-spl.bin -device\
> > > loader,file=u-boot/u-boot.itb,addr=0x80200000
> > >
> > > Kautuk Consul (3):
> > >   lib: Add common semihosting library
> > >   arch/riscv: add semihosting support for RISC-V
> > >   board: qemu-riscv: enable semihosting
> > >
> > >  arch/arm/Kconfig                     |   2 +
> > >  arch/arm/lib/semihosting.c           | 179 +-------------------------
> > >  arch/riscv/Kconfig                   |  47 +++++++
> > >  arch/riscv/include/asm/semihosting.h |  11 ++
> > >  arch/riscv/include/asm/spl.h         |   1 +
> > >  arch/riscv/lib/Makefile              |   2 +
> > >  arch/riscv/lib/interrupts.c          |  11 ++
> > >  arch/riscv/lib/semihosting.c         |  24 ++++
> > >  configs/qemu-riscv32_defconfig       |   4 +
> > >  configs/qemu-riscv32_smode_defconfig |   4 +
> > >  configs/qemu-riscv32_spl_defconfig   |   7 +
> > >  configs/qemu-riscv64_defconfig       |   4 +
> > >  configs/qemu-riscv64_smode_defconfig |   4 +
> > >  configs/qemu-riscv64_spl_defconfig   |   7 +
> > >  include/semihosting.h                |  11 ++
> > >  lib/Kconfig                          |   3 +
> > >  lib/Makefile                         |   2 +
> > >  lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
> > >  18 files changed, 331 insertions(+), 178 deletions(-)
> > >  create mode 100644 arch/riscv/include/asm/semihosting.h
> > >  create mode 100644 arch/riscv/lib/semihosting.c
> > >  create mode 100644 lib/semihosting.c
> > >
> > > --
> > > 2.34.1
> > >

Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Sean Anderson]

Hi Pali,

On 9/16/22 05:12, Pali Rohár wrote:
> That is strange because I'm not aware of the fact that I'm riscv maintainer.

get_maintainer will pick up anyone who has touched a file recently, even in
unrelated areas. A quick git log shows that the following commits have
overlapping files with this series:

948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option

I'm not a fan of this behavior, so I edit the output of get_maintainers
before using it.

--Sean

> On Friday 16 September 2022 14:40:46 Kautuk Consul wrote:
>> Sorry about that!
>> I ran get_maintainer.pl on my patchset and got your name
>> along with several others so I also sent to you.
>>
>> On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <pali@kernel.org> wrote:
>>>
>>> Hello! I'm not riscv maintainer and therefore I'm not going to review
>>> this patch series. Please do not spam me with unrelated emails and
>>> patches as I would loose track of patches and emails which are import
>>> and which I should review. Thanks.
>>>
>>> On Friday 16 September 2022 13:42:30 Kautuk Consul wrote:
>>>> Semihosting is a mechanism that enables code running on
>>>> a target to communicate and use the Input/Output
>>>> facilities on a host computer that is running a debugger.
>>>> This patchset adds support for semihosting in u-boot
>>>> for RISCV64 targets.
>>>>
>>>> CHANGES since v1:
>>>> -   Moved the identical smh_* and semihosting_enabled/disable_semihosting
>>>>        code of ARM and RISC-V to lib/semihosting.c
>>>> -     Extend the handle_trap() functionality to call disable_semihosting()
>>>>        if the cause is a breakpoint (i.e. ebreak instruction)
>>>> -     Change our implementation of semihosting_enabled to be exactly the
>>>>        same as the way ARM implemented it
>>>> -     Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
>>>>        configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
>>>>        gets automatically enabled instead of us #defining it in
>>>>        include/configs/qemu-riscv.h
>>>>
>>>> Compilation and test commands for SPL and S-mode configurations
>>>> =================================================================
>>>>
>>>> U-Boot S-mode on QEMU virt
>>>> ----------------------------
>>>> // Compilation of S-mode u-boot
>>>> ARCH=riscv
>>>> CROSS_COMPILE=riscv64-unknown-linux-gnu-
>>>> make qemu-riscv64_smode_defconfig
>>>> make
>>>> // Run riscv 64-bit u-boot with opensbi on qemu
>>>> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
>>>> opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
>>>> u-boot/u-boot.bin
>>>>
>>>> U-Boot SPL on QEMU virt
>>>> ------------------------
>>>> // Compilation of u-boot-spl
>>>> ARCH=riscv
>>>> CROSS_COMPILE=riscv64-unknown-linux-gnu-
>>>> make qemu-riscv64_spl_defconfig
>>>> make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
>>>> // Run 64-bit u-boot-spl in qemu
>>>> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
>>>> u-boot/spl/u-boot-spl.bin -device\
>>>> loader,file=u-boot/u-boot.itb,addr=0x80200000
>>>>
>>>> Kautuk Consul (3):
>>>>    lib: Add common semihosting library
>>>>    arch/riscv: add semihosting support for RISC-V
>>>>    board: qemu-riscv: enable semihosting
>>>>
>>>>   arch/arm/Kconfig                     |   2 +
>>>>   arch/arm/lib/semihosting.c           | 179 +-------------------------
>>>>   arch/riscv/Kconfig                   |  47 +++++++
>>>>   arch/riscv/include/asm/semihosting.h |  11 ++
>>>>   arch/riscv/include/asm/spl.h         |   1 +
>>>>   arch/riscv/lib/Makefile              |   2 +
>>>>   arch/riscv/lib/interrupts.c          |  11 ++
>>>>   arch/riscv/lib/semihosting.c         |  24 ++++
>>>>   configs/qemu-riscv32_defconfig       |   4 +
>>>>   configs/qemu-riscv32_smode_defconfig |   4 +
>>>>   configs/qemu-riscv32_spl_defconfig   |   7 +
>>>>   configs/qemu-riscv64_defconfig       |   4 +
>>>>   configs/qemu-riscv64_smode_defconfig |   4 +
>>>>   configs/qemu-riscv64_spl_defconfig   |   7 +
>>>>   include/semihosting.h                |  11 ++
>>>>   lib/Kconfig                          |   3 +
>>>>   lib/Makefile                         |   2 +
>>>>   lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
>>>>   18 files changed, 331 insertions(+), 178 deletions(-)
>>>>   create mode 100644 arch/riscv/include/asm/semihosting.h
>>>>   create mode 100644 arch/riscv/lib/semihosting.c
>>>>   create mode 100644 lib/semihosting.c
>>>>
>>>> --
>>>> 2.34.1
>>>>

Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Tom Rini]

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On Fri, Sep 16, 2022 at 09:11:11AM -0400, Sean Anderson wrote:
> Hi Pali,
> 
> On 9/16/22 05:12, Pali Rohár wrote:
> > That is strange because I'm not aware of the fact that I'm riscv maintainer.
> 
> get_maintainer will pick up anyone who has touched a file recently, even in
> unrelated areas. A quick git log shows that the following commits have
> overlapping files with this series:
> 
> 948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
> 1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
> bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
> 372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
> 
> I'm not a fan of this behavior, so I edit the output of get_maintainers
> before using it.

Does --no-git provide the behavior you're both looking for? We should
likely tweak the .get_maintainers.conf file.

-- 
Tom

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Re: [PATCH v2 0/3] Add riscv semihosting support in u-boot

[Sean Anderson]

On 9/16/22 10:32, Tom Rini wrote:
> On Fri, Sep 16, 2022 at 09:11:11AM -0400, Sean Anderson wrote:
>> Hi Pali,
>>
>> On 9/16/22 05:12, Pali Rohár wrote:
>>> That is strange because I'm not aware of the fact that I'm riscv maintainer.
>>
>> get_maintainer will pick up anyone who has touched a file recently, even in
>> unrelated areas. A quick git log shows that the following commits have
>> overlapping files with this series:
>>
>> 948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
>> 1a47e6d47c crc16: Move standard CRC-16 implementation from ubifs to lib
>> bb3d71b7ef crc16-ccitt: Rename file with CRC-16-CCITT implementation to crc16-ccitt.c
>> 372779abc3 arm: Introduce new CONFIG_SPL_SYS_NO_VECTOR_TABLE option
>>
>> I'm not a fan of this behavior, so I edit the output of get_maintainers
>> before using it.
> 
> Does --no-git provide the behavior you're both looking for? We should
> likely tweak the .get_maintainers.conf file.
> 

Yes, but sometimes this information is nice to see. Maybe we should
tweak --git-min-signatures to 2? That would help exclude a lot of
one-off commits, but it wouldn't help with people modifying unrelated
areas (especially in things like Kconfigs/Makefiles). TBH when including
people by activity, I usually inspect the git log and include only
people who are making semantic changes to the file. Of course, this
doesn't work for files which have had few contributors in the past
year...

--Sean

Re: [PATCH v2 1/3] lib: Add common semihosting library

[Sean Anderson]

On 9/16/22 04:12, Kautuk Consul wrote:
> We factor out the arch-independent parts of the ARM semihosting
> implementation as a common library so that it can be shared
> with RISC-V.
> 
> Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
> ---
>   arch/arm/Kconfig           |   2 +
>   arch/arm/lib/semihosting.c | 179 +----------------------------------
>   include/semihosting.h      |  11 +++
>   lib/Kconfig                |   3 +
>   lib/Makefile               |   2 +
>   lib/semihosting.c          | 186 +++++++++++++++++++++++++++++++++++++
>   6 files changed, 205 insertions(+), 178 deletions(-)
>   create mode 100644 lib/semihosting.c
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 82cd456f51..81440ff7ea 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -415,6 +415,7 @@ config ARM_SMCCC
>   
>   config SEMIHOSTING
>   	bool "Support ARM semihosting"
> +	select LIB_SEMIHOSTING
>   	help
>   	  Semihosting is a method for a target to communicate with a host
>   	  debugger. It uses special instructions which the debugger will trap
> @@ -437,6 +438,7 @@ config SEMIHOSTING_FALLBACK
>   
>   config SPL_SEMIHOSTING
>   	bool "Support ARM semihosting in SPL"
> +	select LIB_SEMIHOSTING
>   	depends on SPL
>   	help
>   	  Semihosting is a method for a target to communicate with a host

Sorry if I wasn't clear enough last time. Both the code and these Kconfigs should be moved to a common location.

> diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
> index 01d652a6b8..41bc5cd62b 100644
> --- a/arch/arm/lib/semihosting.c
> +++ b/arch/arm/lib/semihosting.c
> @@ -13,22 +13,10 @@
>   #include <log.h>
>   #include <semihosting.h>
>   
> -#define SYSOPEN		0x01
> -#define SYSCLOSE	0x02
> -#define SYSWRITEC	0x03
> -#define SYSWRITE0	0x04
> -#define SYSWRITE	0x05
> -#define SYSREAD		0x06
> -#define SYSREADC	0x07
> -#define SYSISERROR	0x08
> -#define SYSSEEK		0x0A
> -#define SYSFLEN		0x0C
> -#define SYSERRNO	0x13
> -
>   /*
>    * Call the handler
>    */
> -static noinline long smh_trap(unsigned int sysnum, void *addr)
> +long smh_trap(unsigned int sysnum, void *addr)
>   {
>   	register long result asm("r0");
>   #if defined(CONFIG_ARM64)
> @@ -41,168 +29,3 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
>   #endif
>   	return result;
>   }
> -
> -#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
> -static bool _semihosting_enabled = true;
> -static bool try_semihosting = true;
> -
> -bool semihosting_enabled(void)
> -{
> -	if (try_semihosting) {
> -		smh_trap(SYSERRNO, NULL);
> -		try_semihosting = false;
> -	}
> -
> -	return _semihosting_enabled;
> -}
> -
> -void disable_semihosting(void)
> -{
> -	_semihosting_enabled = false;
> -}
> -#endif
> -
> -/**
> - * smh_errno() - Read the host's errno
> - *
> - * This gets the value of the host's errno and negates it. The host's errno may
> - * or may not be set, so only call this function if a previous semihosting call
> - * has failed.
> - *
> - * Return: a negative error value
> - */
> -static int smh_errno(void)
> -{
> -	long ret = smh_trap(SYSERRNO, NULL);
> -
> -	if (ret > 0 && ret < INT_MAX)
> -		return -ret;
> -	return -EIO;
> -}
> -
> -long smh_open(const char *fname, enum smh_open_mode mode)
> -{
> -	long fd;
> -	struct smh_open_s {
> -		const char *fname;
> -		unsigned long mode;
> -		size_t len;
> -	} open;
> -
> -	debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
> -
> -	open.fname = fname;
> -	open.len = strlen(fname);
> -	open.mode = mode;
> -
> -	/* Open the file on the host */
> -	fd = smh_trap(SYSOPEN, &open);
> -	if (fd == -1)
> -		return smh_errno();
> -	return fd;
> -}
> -
> -/**
> - * struct smg_rdwr_s - Arguments for read and write
> - * @fd: A file descriptor returned from smh_open()
> - * @memp: Pointer to a buffer of memory of at least @len bytes
> - * @len: The number of bytes to read or write
> - */
> -struct smh_rdwr_s {
> -	long fd;
> -	void *memp;
> -	size_t len;
> -};
> -
> -long smh_read(long fd, void *memp, size_t len)
> -{
> -	long ret;
> -	struct smh_rdwr_s read;
> -
> -	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> -
> -	read.fd = fd;
> -	read.memp = memp;
> -	read.len = len;
> -
> -	ret = smh_trap(SYSREAD, &read);
> -	if (ret < 0)
> -		return smh_errno();
> -	return len - ret;
> -}
> -
> -long smh_write(long fd, const void *memp, size_t len, ulong *written)
> -{
> -	long ret;
> -	struct smh_rdwr_s write;
> -
> -	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> -
> -	write.fd = fd;
> -	write.memp = (void *)memp;
> -	write.len = len;
> -
> -	ret = smh_trap(SYSWRITE, &write);
> -	*written = len - ret;
> -	if (ret)
> -		return smh_errno();
> -	return 0;
> -}
> -
> -long smh_close(long fd)
> -{
> -	long ret;
> -
> -	debug("%s: fd %ld\n", __func__, fd);
> -
> -	ret = smh_trap(SYSCLOSE, &fd);
> -	if (ret == -1)
> -		return smh_errno();
> -	return 0;
> -}
> -
> -long smh_flen(long fd)
> -{
> -	long ret;
> -
> -	debug("%s: fd %ld\n", __func__, fd);
> -
> -	ret = smh_trap(SYSFLEN, &fd);
> -	if (ret == -1)
> -		return smh_errno();
> -	return ret;
> -}
> -
> -long smh_seek(long fd, long pos)
> -{
> -	long ret;
> -	struct smh_seek_s {
> -		long fd;
> -		long pos;
> -	} seek;
> -
> -	debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
> -
> -	seek.fd = fd;
> -	seek.pos = pos;
> -
> -	ret = smh_trap(SYSSEEK, &seek);
> -	if (ret)
> -		return smh_errno();
> -	return 0;
> -}
> -
> -int smh_getc(void)
> -{
> -	return smh_trap(SYSREADC, NULL);
> -}
> -
> -void smh_putc(char ch)
> -{
> -	smh_trap(SYSWRITEC, &ch);
> -}
> -
> -void smh_puts(const char *s)
> -{
> -	smh_trap(SYSWRITE0, (char *)s);
> -}
> diff --git a/include/semihosting.h b/include/semihosting.h
> index f1f73464e4..f883676b91 100644
> --- a/include/semihosting.h
> +++ b/include/semihosting.h
> @@ -17,6 +17,17 @@
>   #define SMH_T32_SVC 0xDFAB
>   #define SMH_T32_HLT 0xBABC
>   
> +/**
> + * semh_trap() - ARCH-specific semihosting call.
> + *
> + * Semihosting library/driver can use this function to do the
> + * actual semihosting calls.
> + *
> + * Return: Error code defined by semihosting spec.
> + */
> +
> +long smh_trap(unsigned int sysnum, void *addr);
> +
>   #if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
>   /**
>    * semihosting_enabled() - Determine whether semihosting is supported
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 6121c80dc8..286d316110 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -71,6 +71,9 @@ config HAVE_PRIVATE_LIBGCC
>   config LIB_UUID
>   	bool
>   
> +config LIB_SEMIHOSTING
> +	bool
> +
>   config PRINTF
>   	bool
>   	default y
> diff --git a/lib/Makefile b/lib/Makefile
> index e3deb15287..96be8fe7e9 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -145,6 +145,8 @@ obj-y += date.o
>   obj-y += rtc-lib.o
>   obj-$(CONFIG_LIB_ELF) += elf.o
>   
> +obj-$(CONFIG_LIB_SEMIHOSTING) += semihosting.o
> +
>   #
>   # Build a fast OID lookup registry from include/linux/oid_registry.h
>   #
> diff --git a/lib/semihosting.c b/lib/semihosting.c
> new file mode 100644
> index 0000000000..831774e356
> --- /dev/null
> +++ b/lib/semihosting.c
> @@ -0,0 +1,186 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
> + * Copyright 2014 Broadcom Corporation
> + */
> +
> +#include <common.h>
> +#include <log.h>
> +#include <semihosting.h>
> +
> +#define SYSOPEN		0x01
> +#define SYSCLOSE	0x02
> +#define SYSWRITEC	0x03
> +#define SYSWRITE0	0x04
> +#define SYSWRITE	0x05
> +#define SYSREAD		0x06
> +#define SYSREADC	0x07
> +#define SYSISERROR	0x08
> +#define SYSSEEK		0x0A
> +#define SYSFLEN		0x0C
> +#define SYSERRNO	0x13
> +
> +#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
> +static bool _semihosting_enabled = true;
> +static bool try_semihosting = true;
> +
> +bool semihosting_enabled(void)
> +{
> +	if (try_semihosting) {
> +		smh_trap(SYSERRNO, NULL);
> +		try_semihosting = false;
> +	}
> +
> +	return _semihosting_enabled;
> +}
> +
> +void disable_semihosting(void)
> +{
> +	_semihosting_enabled = false;
> +}
> +#endif
> +
> +/**
> + * smh_errno() - Read the host's errno
> + *
> + * This gets the value of the host's errno and negates it. The host's errno may
> + * or may not be set, so only call this function if a previous semihosting call
> + * has failed.
> + *
> + * Return: a negative error value
> + */
> +static int smh_errno(void)
> +{
> +	long ret = smh_trap(SYSERRNO, NULL);
> +
> +	if (ret > 0 && ret < INT_MAX)
> +		return -ret;
> +	return -EIO;
> +}
> +
> +long smh_open(const char *fname, enum smh_open_mode mode)
> +{
> +	long fd;
> +	struct smh_open_s {
> +		const char *fname;
> +		unsigned long mode;
> +		size_t len;
> +	} open;
> +
> +	debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
> +
> +	open.fname = fname;
> +	open.len = strlen(fname);
> +	open.mode = mode;
> +
> +	/* Open the file on the host */
> +	fd = smh_trap(SYSOPEN, &open);
> +	if (fd == -1)
> +		return smh_errno();
> +	return fd;
> +}
> +
> +/**
> + * struct smg_rdwr_s - Arguments for read and write
> + * @fd: A file descriptor returned from smh_open()
> + * @memp: Pointer to a buffer of memory of at least @len bytes
> + * @len: The number of bytes to read or write
> + */
> +struct smh_rdwr_s {
> +	long fd;
> +	void *memp;
> +	size_t len;
> +};
> +
> +long smh_read(long fd, void *memp, size_t len)
> +{
> +	long ret;
> +	struct smh_rdwr_s read;
> +
> +	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> +
> +	read.fd = fd;
> +	read.memp = memp;
> +	read.len = len;
> +
> +	ret = smh_trap(SYSREAD, &read);
> +	if (ret < 0)
> +		return smh_errno();
> +	return len - ret;
> +}
> +
> +long smh_write(long fd, const void *memp, size_t len, ulong *written)
> +{
> +	long ret;
> +	struct smh_rdwr_s write;
> +
> +	debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> +
> +	write.fd = fd;
> +	write.memp = (void *)memp;
> +	write.len = len;
> +
> +	ret = smh_trap(SYSWRITE, &write);
> +	*written = len - ret;
> +	if (ret)
> +		return smh_errno();
> +	return 0;
> +}
> +
> +long smh_close(long fd)
> +{
> +	long ret;
> +
> +	debug("%s: fd %ld\n", __func__, fd);
> +
> +	ret = smh_trap(SYSCLOSE, &fd);
> +	if (ret == -1)
> +		return smh_errno();
> +	return 0;
> +}
> +
> +long smh_flen(long fd)
> +{
> +	long ret;
> +
> +	debug("%s: fd %ld\n", __func__, fd);
> +
> +	ret = smh_trap(SYSFLEN, &fd);
> +	if (ret == -1)
> +		return smh_errno();
> +	return ret;
> +}
> +
> +long smh_seek(long fd, long pos)
> +{
> +	long ret;
> +	struct smh_seek_s {
> +		long fd;
> +		long pos;
> +	} seek;
> +
> +	debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
> +
> +	seek.fd = fd;
> +	seek.pos = pos;
> +
> +	ret = smh_trap(SYSSEEK, &seek);
> +	if (ret)
> +		return smh_errno();
> +	return 0;
> +}
> +
> +int smh_getc(void)
> +{
> +	return smh_trap(SYSREADC, NULL);
> +}
> +
> +void smh_putc(char ch)
> +{
> +	smh_trap(SYSWRITEC, &ch);
> +}
> +
> +void smh_puts(const char *s)
> +{
> +	smh_trap(SYSWRITE0, (char *)s);
> +}

The rest looks fine.

--Sean

Re: [PATCH v2 1/3] lib: Add common semihosting library

[Kautuk Consul]

Thanks for spotting that.

There was a config option selection that I was trying to avoid.

Will send out a v3 patch with your suggestions.

On Sat, Sep 17, 2022 at 11:10 PM Sean Anderson <seanga2@gmail.com> wrote:
>
> On 9/16/22 04:12, Kautuk Consul wrote:
> > We factor out the arch-independent parts of the ARM semihosting
> > implementation as a common library so that it can be shared
> > with RISC-V.
> >
> > Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
> > ---
> >   arch/arm/Kconfig           |   2 +
> >   arch/arm/lib/semihosting.c | 179 +----------------------------------
> >   include/semihosting.h      |  11 +++
> >   lib/Kconfig                |   3 +
> >   lib/Makefile               |   2 +
> >   lib/semihosting.c          | 186 +++++++++++++++++++++++++++++++++++++
> >   6 files changed, 205 insertions(+), 178 deletions(-)
> >   create mode 100644 lib/semihosting.c
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index 82cd456f51..81440ff7ea 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -415,6 +415,7 @@ config ARM_SMCCC
> >
> >   config SEMIHOSTING
> >       bool "Support ARM semihosting"
> > +     select LIB_SEMIHOSTING
> >       help
> >         Semihosting is a method for a target to communicate with a host
> >         debugger. It uses special instructions which the debugger will trap
> > @@ -437,6 +438,7 @@ config SEMIHOSTING_FALLBACK
> >
> >   config SPL_SEMIHOSTING
> >       bool "Support ARM semihosting in SPL"
> > +     select LIB_SEMIHOSTING
> >       depends on SPL
> >       help
> >         Semihosting is a method for a target to communicate with a host
>
> Sorry if I wasn't clear enough last time. Both the code and these Kconfigs should be moved to a common location.
>
> > diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
> > index 01d652a6b8..41bc5cd62b 100644
> > --- a/arch/arm/lib/semihosting.c
> > +++ b/arch/arm/lib/semihosting.c
> > @@ -13,22 +13,10 @@
> >   #include <log.h>
> >   #include <semihosting.h>
> >
> > -#define SYSOPEN              0x01
> > -#define SYSCLOSE     0x02
> > -#define SYSWRITEC    0x03
> > -#define SYSWRITE0    0x04
> > -#define SYSWRITE     0x05
> > -#define SYSREAD              0x06
> > -#define SYSREADC     0x07
> > -#define SYSISERROR   0x08
> > -#define SYSSEEK              0x0A
> > -#define SYSFLEN              0x0C
> > -#define SYSERRNO     0x13
> > -
> >   /*
> >    * Call the handler
> >    */
> > -static noinline long smh_trap(unsigned int sysnum, void *addr)
> > +long smh_trap(unsigned int sysnum, void *addr)
> >   {
> >       register long result asm("r0");
> >   #if defined(CONFIG_ARM64)
> > @@ -41,168 +29,3 @@ static noinline long smh_trap(unsigned int sysnum, void *addr)
> >   #endif
> >       return result;
> >   }
> > -
> > -#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
> > -static bool _semihosting_enabled = true;
> > -static bool try_semihosting = true;
> > -
> > -bool semihosting_enabled(void)
> > -{
> > -     if (try_semihosting) {
> > -             smh_trap(SYSERRNO, NULL);
> > -             try_semihosting = false;
> > -     }
> > -
> > -     return _semihosting_enabled;
> > -}
> > -
> > -void disable_semihosting(void)
> > -{
> > -     _semihosting_enabled = false;
> > -}
> > -#endif
> > -
> > -/**
> > - * smh_errno() - Read the host's errno
> > - *
> > - * This gets the value of the host's errno and negates it. The host's errno may
> > - * or may not be set, so only call this function if a previous semihosting call
> > - * has failed.
> > - *
> > - * Return: a negative error value
> > - */
> > -static int smh_errno(void)
> > -{
> > -     long ret = smh_trap(SYSERRNO, NULL);
> > -
> > -     if (ret > 0 && ret < INT_MAX)
> > -             return -ret;
> > -     return -EIO;
> > -}
> > -
> > -long smh_open(const char *fname, enum smh_open_mode mode)
> > -{
> > -     long fd;
> > -     struct smh_open_s {
> > -             const char *fname;
> > -             unsigned long mode;
> > -             size_t len;
> > -     } open;
> > -
> > -     debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
> > -
> > -     open.fname = fname;
> > -     open.len = strlen(fname);
> > -     open.mode = mode;
> > -
> > -     /* Open the file on the host */
> > -     fd = smh_trap(SYSOPEN, &open);
> > -     if (fd == -1)
> > -             return smh_errno();
> > -     return fd;
> > -}
> > -
> > -/**
> > - * struct smg_rdwr_s - Arguments for read and write
> > - * @fd: A file descriptor returned from smh_open()
> > - * @memp: Pointer to a buffer of memory of at least @len bytes
> > - * @len: The number of bytes to read or write
> > - */
> > -struct smh_rdwr_s {
> > -     long fd;
> > -     void *memp;
> > -     size_t len;
> > -};
> > -
> > -long smh_read(long fd, void *memp, size_t len)
> > -{
> > -     long ret;
> > -     struct smh_rdwr_s read;
> > -
> > -     debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> > -
> > -     read.fd = fd;
> > -     read.memp = memp;
> > -     read.len = len;
> > -
> > -     ret = smh_trap(SYSREAD, &read);
> > -     if (ret < 0)
> > -             return smh_errno();
> > -     return len - ret;
> > -}
> > -
> > -long smh_write(long fd, const void *memp, size_t len, ulong *written)
> > -{
> > -     long ret;
> > -     struct smh_rdwr_s write;
> > -
> > -     debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> > -
> > -     write.fd = fd;
> > -     write.memp = (void *)memp;
> > -     write.len = len;
> > -
> > -     ret = smh_trap(SYSWRITE, &write);
> > -     *written = len - ret;
> > -     if (ret)
> > -             return smh_errno();
> > -     return 0;
> > -}
> > -
> > -long smh_close(long fd)
> > -{
> > -     long ret;
> > -
> > -     debug("%s: fd %ld\n", __func__, fd);
> > -
> > -     ret = smh_trap(SYSCLOSE, &fd);
> > -     if (ret == -1)
> > -             return smh_errno();
> > -     return 0;
> > -}
> > -
> > -long smh_flen(long fd)
> > -{
> > -     long ret;
> > -
> > -     debug("%s: fd %ld\n", __func__, fd);
> > -
> > -     ret = smh_trap(SYSFLEN, &fd);
> > -     if (ret == -1)
> > -             return smh_errno();
> > -     return ret;
> > -}
> > -
> > -long smh_seek(long fd, long pos)
> > -{
> > -     long ret;
> > -     struct smh_seek_s {
> > -             long fd;
> > -             long pos;
> > -     } seek;
> > -
> > -     debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
> > -
> > -     seek.fd = fd;
> > -     seek.pos = pos;
> > -
> > -     ret = smh_trap(SYSSEEK, &seek);
> > -     if (ret)
> > -             return smh_errno();
> > -     return 0;
> > -}
> > -
> > -int smh_getc(void)
> > -{
> > -     return smh_trap(SYSREADC, NULL);
> > -}
> > -
> > -void smh_putc(char ch)
> > -{
> > -     smh_trap(SYSWRITEC, &ch);
> > -}
> > -
> > -void smh_puts(const char *s)
> > -{
> > -     smh_trap(SYSWRITE0, (char *)s);
> > -}
> > diff --git a/include/semihosting.h b/include/semihosting.h
> > index f1f73464e4..f883676b91 100644
> > --- a/include/semihosting.h
> > +++ b/include/semihosting.h
> > @@ -17,6 +17,17 @@
> >   #define SMH_T32_SVC 0xDFAB
> >   #define SMH_T32_HLT 0xBABC
> >
> > +/**
> > + * semh_trap() - ARCH-specific semihosting call.
> > + *
> > + * Semihosting library/driver can use this function to do the
> > + * actual semihosting calls.
> > + *
> > + * Return: Error code defined by semihosting spec.
> > + */
> > +
> > +long smh_trap(unsigned int sysnum, void *addr);
> > +
> >   #if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
> >   /**
> >    * semihosting_enabled() - Determine whether semihosting is supported
> > diff --git a/lib/Kconfig b/lib/Kconfig
> > index 6121c80dc8..286d316110 100644
> > --- a/lib/Kconfig
> > +++ b/lib/Kconfig
> > @@ -71,6 +71,9 @@ config HAVE_PRIVATE_LIBGCC
> >   config LIB_UUID
> >       bool
> >
> > +config LIB_SEMIHOSTING
> > +     bool
> > +
> >   config PRINTF
> >       bool
> >       default y
> > diff --git a/lib/Makefile b/lib/Makefile
> > index e3deb15287..96be8fe7e9 100644
> > --- a/lib/Makefile
> > +++ b/lib/Makefile
> > @@ -145,6 +145,8 @@ obj-y += date.o
> >   obj-y += rtc-lib.o
> >   obj-$(CONFIG_LIB_ELF) += elf.o
> >
> > +obj-$(CONFIG_LIB_SEMIHOSTING) += semihosting.o
> > +
> >   #
> >   # Build a fast OID lookup registry from include/linux/oid_registry.h
> >   #
> > diff --git a/lib/semihosting.c b/lib/semihosting.c
> > new file mode 100644
> > index 0000000000..831774e356
> > --- /dev/null
> > +++ b/lib/semihosting.c
> > @@ -0,0 +1,186 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
> > + * Copyright 2014 Broadcom Corporation
> > + */
> > +
> > +#include <common.h>
> > +#include <log.h>
> > +#include <semihosting.h>
> > +
> > +#define SYSOPEN              0x01
> > +#define SYSCLOSE     0x02
> > +#define SYSWRITEC    0x03
> > +#define SYSWRITE0    0x04
> > +#define SYSWRITE     0x05
> > +#define SYSREAD              0x06
> > +#define SYSREADC     0x07
> > +#define SYSISERROR   0x08
> > +#define SYSSEEK              0x0A
> > +#define SYSFLEN              0x0C
> > +#define SYSERRNO     0x13
> > +
> > +#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)
> > +static bool _semihosting_enabled = true;
> > +static bool try_semihosting = true;
> > +
> > +bool semihosting_enabled(void)
> > +{
> > +     if (try_semihosting) {
> > +             smh_trap(SYSERRNO, NULL);
> > +             try_semihosting = false;
> > +     }
> > +
> > +     return _semihosting_enabled;
> > +}
> > +
> > +void disable_semihosting(void)
> > +{
> > +     _semihosting_enabled = false;
> > +}
> > +#endif
> > +
> > +/**
> > + * smh_errno() - Read the host's errno
> > + *
> > + * This gets the value of the host's errno and negates it. The host's errno may
> > + * or may not be set, so only call this function if a previous semihosting call
> > + * has failed.
> > + *
> > + * Return: a negative error value
> > + */
> > +static int smh_errno(void)
> > +{
> > +     long ret = smh_trap(SYSERRNO, NULL);
> > +
> > +     if (ret > 0 && ret < INT_MAX)
> > +             return -ret;
> > +     return -EIO;
> > +}
> > +
> > +long smh_open(const char *fname, enum smh_open_mode mode)
> > +{
> > +     long fd;
> > +     struct smh_open_s {
> > +             const char *fname;
> > +             unsigned long mode;
> > +             size_t len;
> > +     } open;
> > +
> > +     debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode);
> > +
> > +     open.fname = fname;
> > +     open.len = strlen(fname);
> > +     open.mode = mode;
> > +
> > +     /* Open the file on the host */
> > +     fd = smh_trap(SYSOPEN, &open);
> > +     if (fd == -1)
> > +             return smh_errno();
> > +     return fd;
> > +}
> > +
> > +/**
> > + * struct smg_rdwr_s - Arguments for read and write
> > + * @fd: A file descriptor returned from smh_open()
> > + * @memp: Pointer to a buffer of memory of at least @len bytes
> > + * @len: The number of bytes to read or write
> > + */
> > +struct smh_rdwr_s {
> > +     long fd;
> > +     void *memp;
> > +     size_t len;
> > +};
> > +
> > +long smh_read(long fd, void *memp, size_t len)
> > +{
> > +     long ret;
> > +     struct smh_rdwr_s read;
> > +
> > +     debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> > +
> > +     read.fd = fd;
> > +     read.memp = memp;
> > +     read.len = len;
> > +
> > +     ret = smh_trap(SYSREAD, &read);
> > +     if (ret < 0)
> > +             return smh_errno();
> > +     return len - ret;
> > +}
> > +
> > +long smh_write(long fd, const void *memp, size_t len, ulong *written)
> > +{
> > +     long ret;
> > +     struct smh_rdwr_s write;
> > +
> > +     debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len);
> > +
> > +     write.fd = fd;
> > +     write.memp = (void *)memp;
> > +     write.len = len;
> > +
> > +     ret = smh_trap(SYSWRITE, &write);
> > +     *written = len - ret;
> > +     if (ret)
> > +             return smh_errno();
> > +     return 0;
> > +}
> > +
> > +long smh_close(long fd)
> > +{
> > +     long ret;
> > +
> > +     debug("%s: fd %ld\n", __func__, fd);
> > +
> > +     ret = smh_trap(SYSCLOSE, &fd);
> > +     if (ret == -1)
> > +             return smh_errno();
> > +     return 0;
> > +}
> > +
> > +long smh_flen(long fd)
> > +{
> > +     long ret;
> > +
> > +     debug("%s: fd %ld\n", __func__, fd);
> > +
> > +     ret = smh_trap(SYSFLEN, &fd);
> > +     if (ret == -1)
> > +             return smh_errno();
> > +     return ret;
> > +}
> > +
> > +long smh_seek(long fd, long pos)
> > +{
> > +     long ret;
> > +     struct smh_seek_s {
> > +             long fd;
> > +             long pos;
> > +     } seek;
> > +
> > +     debug("%s: fd %ld pos %ld\n", __func__, fd, pos);
> > +
> > +     seek.fd = fd;
> > +     seek.pos = pos;
> > +
> > +     ret = smh_trap(SYSSEEK, &seek);
> > +     if (ret)
> > +             return smh_errno();
> > +     return 0;
> > +}
> > +
> > +int smh_getc(void)
> > +{
> > +     return smh_trap(SYSREADC, NULL);
> > +}
> > +
> > +void smh_putc(char ch)
> > +{
> > +     smh_trap(SYSWRITEC, &ch);
> > +}
> > +
> > +void smh_puts(const char *s)
> > +{
> > +     smh_trap(SYSWRITE0, (char *)s);
> > +}
>
> The rest looks fine.
>
> --Sean

[PATCH v2 0/3] Add riscv semihosting support in u-boot

[Kautuk Consul]

Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.

CHANGES since v1:
-   Moved the identical smh_* and semihosting_enabled/disable_semihosting
	code of ARM and RISC-V to lib/semihosting.c
-	Extend the handle_trap() functionality to call disable_semihosting()
	if the cause is a breakpoint (i.e. ebreak instruction)
-	Change our implementation of semihosting_enabled to be exactly the
	same as the way ARM implemented it
-	Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT
	configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
	gets automatically enabled instead of us #defining it in
	include/configs/qemu-riscv.h

Compilation and test commands for SPL and S-mode configurations
=================================================================

U-Boot S-mode on QEMU virt
----------------------------
// Compilation of S-mode u-boot
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_smode_defconfig
make
// Run riscv 64-bit u-boot with opensbi on qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
u-boot/u-boot.bin

U-Boot SPL on QEMU virt
------------------------
// Compilation of u-boot-spl
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x80200000

Kautuk Consul (3):
  lib: Add common semihosting library
  arch/riscv: add semihosting support for RISC-V
  board: qemu-riscv: enable semihosting

 arch/arm/Kconfig                     |   2 +
 arch/arm/lib/semihosting.c           | 179 +-------------------------
 arch/riscv/Kconfig                   |  47 +++++++
 arch/riscv/include/asm/semihosting.h |  11 ++
 arch/riscv/include/asm/spl.h         |   1 +
 arch/riscv/lib/Makefile              |   2 +
 arch/riscv/lib/interrupts.c          |  11 ++
 arch/riscv/lib/semihosting.c         |  24 ++++
 configs/qemu-riscv32_defconfig       |   4 +
 configs/qemu-riscv32_smode_defconfig |   4 +
 configs/qemu-riscv32_spl_defconfig   |   7 +
 configs/qemu-riscv64_defconfig       |   4 +
 configs/qemu-riscv64_smode_defconfig |   4 +
 configs/qemu-riscv64_spl_defconfig   |   7 +
 include/semihosting.h                |  11 ++
 lib/Kconfig                          |   3 +
 lib/Makefile                         |   2 +
 lib/semihosting.c                    | 186 +++++++++++++++++++++++++++
 18 files changed, 331 insertions(+), 178 deletions(-)
 create mode 100644 arch/riscv/include/asm/semihosting.h
 create mode 100644 arch/riscv/lib/semihosting.c
 create mode 100644 lib/semihosting.c

-- 
2.34.1