All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2] serial: sifive: enable clocks for UART when probed
@ 2022-09-20 16:00 ` Olof Johansson
  0 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2022-09-20 16:00 UTC (permalink / raw)
  To: Greg Kroah-Hartman
  Cc: Jiri Slaby, linux-serial, linux-riscv, linux-kernel,
	Olof Johansson, Uwe Kleine-König, Emil Renner Berthing,
	Palmer Dabbelt, Paul Walmsley

When the PWM driver was changed to disable clocks if no PWMs are enabled,
it ended up also disabling the shared parent with the UART, since the
UART doesn't do any clock enablement on its own.

To avoid these surprises, switch to clk_get_enabled().

Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

---

v2: Switch to devm_clk_enabled() per Uwe's suggestion.

---
 drivers/tty/serial/sifive.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
index 5c3a07546a58..4b1d4fe8458e 100644
--- a/drivers/tty/serial/sifive.c
+++ b/drivers/tty/serial/sifive.c
@@ -945,7 +945,7 @@ static int sifive_serial_probe(struct platform_device *pdev)
 		return PTR_ERR(base);
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	clk = devm_clk_get_enabled(&pdev->dev, NULL);
 	if (IS_ERR(clk)) {
 		dev_err(&pdev->dev, "unable to find controller clock\n");
 		return PTR_ERR(clk);
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v2] serial: sifive: enable clocks for UART when probed
@ 2022-09-20 16:00 ` Olof Johansson
  0 siblings, 0 replies; 6+ messages in thread
From: Olof Johansson @ 2022-09-20 16:00 UTC (permalink / raw)
  To: Greg Kroah-Hartman
  Cc: Jiri Slaby, linux-serial, linux-riscv, linux-kernel,
	Olof Johansson, Uwe Kleine-König, Emil Renner Berthing,
	Palmer Dabbelt, Paul Walmsley

When the PWM driver was changed to disable clocks if no PWMs are enabled,
it ended up also disabling the shared parent with the UART, since the
UART doesn't do any clock enablement on its own.

To avoid these surprises, switch to clk_get_enabled().

Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

---

v2: Switch to devm_clk_enabled() per Uwe's suggestion.

---
 drivers/tty/serial/sifive.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
index 5c3a07546a58..4b1d4fe8458e 100644
--- a/drivers/tty/serial/sifive.c
+++ b/drivers/tty/serial/sifive.c
@@ -945,7 +945,7 @@ static int sifive_serial_probe(struct platform_device *pdev)
 		return PTR_ERR(base);
 	}
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	clk = devm_clk_get_enabled(&pdev->dev, NULL);
 	if (IS_ERR(clk)) {
 		dev_err(&pdev->dev, "unable to find controller clock\n");
 		return PTR_ERR(clk);
-- 
2.30.2


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] serial: sifive: enable clocks for UART when probed
  2022-09-20 16:00 ` Olof Johansson
@ 2022-09-20 16:41   ` Uwe Kleine-König
  -1 siblings, 0 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2022-09-20 16:41 UTC (permalink / raw)
  To: Olof Johansson
  Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, linux-riscv,
	linux-kernel, Emil Renner Berthing, Palmer Dabbelt,
	Paul Walmsley

[-- Attachment #1: Type: text/plain, Size: 743 bytes --]

Hello,

On Tue, Sep 20, 2022 at 09:00:18AM -0700, Olof Johansson wrote:
> When the PWM driver was changed to disable clocks if no PWMs are enabled,
> it ended up also disabling the shared parent with the UART, since the
> UART doesn't do any clock enablement on its own.
> 
> To avoid these surprises, switch to clk_get_enabled().
> 
> Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] serial: sifive: enable clocks for UART when probed
@ 2022-09-20 16:41   ` Uwe Kleine-König
  0 siblings, 0 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2022-09-20 16:41 UTC (permalink / raw)
  To: Olof Johansson
  Cc: Greg Kroah-Hartman, Jiri Slaby, linux-serial, linux-riscv,
	linux-kernel, Emil Renner Berthing, Palmer Dabbelt,
	Paul Walmsley


[-- Attachment #1.1: Type: text/plain, Size: 743 bytes --]

Hello,

On Tue, Sep 20, 2022 at 09:00:18AM -0700, Olof Johansson wrote:
> When the PWM driver was changed to disable clocks if no PWMs are enabled,
> it ended up also disabling the shared parent with the UART, since the
> UART doesn't do any clock enablement on its own.
> 
> To avoid these surprises, switch to clk_get_enabled().
> 
> Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[-- Attachment #2: Type: text/plain, Size: 161 bytes --]

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] serial: sifive: enable clocks for UART when probed
  2022-09-20 16:00 ` Olof Johansson
@ 2022-09-20 20:37   ` Palmer Dabbelt
  -1 siblings, 0 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2022-09-20 20:37 UTC (permalink / raw)
  To: Olof Johansson
  Cc: Greg KH, jirislaby, linux-serial, linux-riscv, linux-kernel,
	Olof Johansson, u.kleine-koenig, emil.renner.berthing,
	Paul Walmsley

On Tue, 20 Sep 2022 09:00:18 PDT (-0700), Olof Johansson wrote:
> When the PWM driver was changed to disable clocks if no PWMs are enabled,
> it ended up also disabling the shared parent with the UART, since the
> UART doesn't do any clock enablement on its own.
>
> To avoid these surprises, switch to clk_get_enabled().
>
> Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Signed-off-by: Olof Johansson <olof@lixom.net>
>
> ---
>
> v2: Switch to devm_clk_enabled() per Uwe's suggestion.
>
> ---
>  drivers/tty/serial/sifive.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
> index 5c3a07546a58..4b1d4fe8458e 100644
> --- a/drivers/tty/serial/sifive.c
> +++ b/drivers/tty/serial/sifive.c
> @@ -945,7 +945,7 @@ static int sifive_serial_probe(struct platform_device *pdev)
>  		return PTR_ERR(base);
>  	}
>
> -	clk = devm_clk_get(&pdev->dev, NULL);
> +	clk = devm_clk_get_enabled(&pdev->dev, NULL);
>  	if (IS_ERR(clk)) {
>  		dev_err(&pdev->dev, "unable to find controller clock\n");
>  		return PTR_ERR(clk);

I have one of these lying around somewhere if you need someone to test 
it, but sounds like you had from the v1 email.  Either way

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

as this seems better than what was there.

Thanks!

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v2] serial: sifive: enable clocks for UART when probed
@ 2022-09-20 20:37   ` Palmer Dabbelt
  0 siblings, 0 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2022-09-20 20:37 UTC (permalink / raw)
  To: Olof Johansson
  Cc: Greg KH, jirislaby, linux-serial, linux-riscv, linux-kernel,
	Olof Johansson, u.kleine-koenig, emil.renner.berthing,
	Paul Walmsley

On Tue, 20 Sep 2022 09:00:18 PDT (-0700), Olof Johansson wrote:
> When the PWM driver was changed to disable clocks if no PWMs are enabled,
> it ended up also disabling the shared parent with the UART, since the
> UART doesn't do any clock enablement on its own.
>
> To avoid these surprises, switch to clk_get_enabled().
>
> Fixes: ace41d7564e655 ("pwm: sifive: Ensure the clk is enabled exactly once per running PWM")
> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Paul Walmsley <paul.walmsley@sifive.com>
> Signed-off-by: Olof Johansson <olof@lixom.net>
>
> ---
>
> v2: Switch to devm_clk_enabled() per Uwe's suggestion.
>
> ---
>  drivers/tty/serial/sifive.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
> index 5c3a07546a58..4b1d4fe8458e 100644
> --- a/drivers/tty/serial/sifive.c
> +++ b/drivers/tty/serial/sifive.c
> @@ -945,7 +945,7 @@ static int sifive_serial_probe(struct platform_device *pdev)
>  		return PTR_ERR(base);
>  	}
>
> -	clk = devm_clk_get(&pdev->dev, NULL);
> +	clk = devm_clk_get_enabled(&pdev->dev, NULL);
>  	if (IS_ERR(clk)) {
>  		dev_err(&pdev->dev, "unable to find controller clock\n");
>  		return PTR_ERR(clk);

I have one of these lying around somewhere if you need someone to test 
it, but sounds like you had from the v1 email.  Either way

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>

as this seems better than what was there.

Thanks!

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-09-20 20:37 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-20 16:00 [PATCH v2] serial: sifive: enable clocks for UART when probed Olof Johansson
2022-09-20 16:00 ` Olof Johansson
2022-09-20 16:41 ` Uwe Kleine-König
2022-09-20 16:41   ` Uwe Kleine-König
2022-09-20 20:37 ` Palmer Dabbelt
2022-09-20 20:37   ` Palmer Dabbelt

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.