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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/4] drm/i915: Don't bail early from intel_dp_initial_fastset_check()
Date: Thu, 22 Sep 2022 00:15:23 +0300	[thread overview]
Message-ID: <20220921211525.10675-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20220921211525.10675-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Do all the checks in intel_dp_initial_fastset_check() instead
of bailing out on the first condition that triggers.

This makes for better debug logs since we see all the reasons
why the full modeset computation is forced.

Also avoid the risk of someone accidentally adding a check
later in the function that would require connectors_changed=true
(ie. no fastset at all), but an earlier check may have already
bailed out with just mode_changed=true (ie. fastset is still
possible).

Pimp the debugs with the encoder id+name while at it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c9be61d2348e..73c4db4db20b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2306,6 +2306,7 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	bool ret = true;
 
 	/*
 	 * If BIOS has set an unsupported or non-standard link rate for some
@@ -2313,9 +2314,10 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 	 */
 	if (intel_dp_rate_index(intel_dp->source_rates, intel_dp->num_source_rates,
 				crtc_state->port_clock) < 0) {
-		drm_dbg_kms(&i915->drm, "Forcing full modeset due to unsupported link rate\n");
+		drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset due to unsupported link rate\n",
+			    encoder->base.base.id, encoder->base.name);
 		crtc_state->uapi.connectors_changed = true;
-		return false;
+		ret = false;
 	}
 
 	/*
@@ -2326,18 +2328,20 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 	 * Remove once we have readout for DSC.
 	 */
 	if (crtc_state->dsc.compression_enable) {
-		drm_dbg_kms(&i915->drm, "Forcing full modeset due to DSC being enabled\n");
+		drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset due to DSC being enabled\n",
+			    encoder->base.base.id, encoder->base.name);
 		crtc_state->uapi.mode_changed = true;
-		return false;
+		ret = false;
 	}
 
 	if (CAN_PSR(intel_dp)) {
-		drm_dbg_kms(&i915->drm, "Forcing full modeset to compute PSR state\n");
+		drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] Forcing full modeset to compute PSR state\n",
+			    encoder->base.base.id, encoder->base.name);
 		crtc_state->uapi.mode_changed = true;
-		return false;
+		ret = false;
 	}
 
-	return true;
+	return ret;
 }
 
 static void intel_dp_get_pcon_dsc_cap(struct intel_dp *intel_dp)
-- 
2.35.1


  parent reply	other threads:[~2022-09-21 21:15 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-21 21:15 [Intel-gfx] [PATCH 0/4] drm/i915: Fix TC port PLLs after readout Ville Syrjala
2022-09-21 21:15 ` [Intel-gfx] [PATCH 1/4] drm/i915: Force DPLL calculation for TC ports " Ville Syrjala
2022-09-22 11:56   ` Jani Nikula
2022-09-22 15:40     ` Ville Syrjälä
2022-09-22 19:12   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-09-26 17:00     ` Jani Nikula
2022-09-21 21:15 ` Ville Syrjala [this message]
2022-09-22 19:13   ` [Intel-gfx] [PATCH v2 2/4] drm/i915: Don't bail early from intel_dp_initial_fastset_check() Ville Syrjala
2022-09-21 21:15 ` [Intel-gfx] [PATCH 3/4] drm/i915: Pimp DPLL ref/unref debugs Ville Syrjala
2022-09-22 11:57   ` Jani Nikula
2022-09-22 15:42     ` Ville Syrjälä
2022-09-22 19:13   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-09-21 21:15 ` [Intel-gfx] [PATCH 4/4] drm/i915: WARN if PLL ref/unref got messed up Ville Syrjala
2022-09-21 21:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix TC port PLLs after readout Patchwork
2022-09-21 22:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-22  0:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-22 23:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix TC port PLLs after readout (rev4) Patchwork
2022-09-22 23:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-23  6:09 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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