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From: Jason-JH.Lin <jason-jh.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: devicetree@vger.kernel.org,
	"Jason-JH.Lin" <jason-jh.lin@mediatek.com>,
	Singo Chang <singo.chang@mediatek.com>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	Rex-BC Chen <rex-bc.chen@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/6] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195
Date: Sat, 24 Sep 2022 16:00:53 +0800	[thread overview]
Message-ID: <20220924080058.20566-2-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20220924080058.20566-1-jason-jh.lin@mediatek.com>

For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.

For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.

Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR,
CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality)
and they makes VDOSYS0 supports PQ function while they are not
including in VDOSYS1.

Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related
component). It makes VDOSYS1 supports the HDR function while it's not
including in VDOSYS0.

To summarize0:
Only VDOSYS0 can support PQ adjustment.
Only VDOSYS1 can support HDR adjustment.

Therefore, we need to separate these two different mmsys hardwares to
2 different compatibles for MT8195.

Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 6ad023eec193..4f90ea03c596 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -31,13 +31,16 @@ properties:
               - mediatek,mt8183-mmsys
               - mediatek,mt8186-mmsys
               - mediatek,mt8192-mmsys
-              - mediatek,mt8195-mmsys
               - mediatek,mt8365-mmsys
           - const: syscon
       - items:
           - const: mediatek,mt7623-mmsys
           - const: mediatek,mt2701-mmsys
           - const: syscon
+      - items:
+          - const: mediatek,mt8195-vdosys0
+          - const: mediatek,mt8195-mmsys
+          - const: syscon
 
   reg:
     maxItems: 1
-- 
2.18.0


WARNING: multiple messages have this Message-ID (diff)
From: Jason-JH.Lin <jason-jh.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: CK Hu <ck.hu@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>,
	Singo Chang <singo.chang@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Jason-JH.Lin <jason-jh.lin@mediatek.com>
Subject: [PATCH v4 1/6] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195
Date: Sat, 24 Sep 2022 16:00:53 +0800	[thread overview]
Message-ID: <20220924080058.20566-2-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20220924080058.20566-1-jason-jh.lin@mediatek.com>

For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.

For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.

Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR,
CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality)
and they makes VDOSYS0 supports PQ function while they are not
including in VDOSYS1.

Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related
component). It makes VDOSYS1 supports the HDR function while it's not
including in VDOSYS0.

To summarize0:
Only VDOSYS0 can support PQ adjustment.
Only VDOSYS1 can support HDR adjustment.

Therefore, we need to separate these two different mmsys hardwares to
2 different compatibles for MT8195.

Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 6ad023eec193..4f90ea03c596 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -31,13 +31,16 @@ properties:
               - mediatek,mt8183-mmsys
               - mediatek,mt8186-mmsys
               - mediatek,mt8192-mmsys
-              - mediatek,mt8195-mmsys
               - mediatek,mt8365-mmsys
           - const: syscon
       - items:
           - const: mediatek,mt7623-mmsys
           - const: mediatek,mt2701-mmsys
           - const: syscon
+      - items:
+          - const: mediatek,mt8195-vdosys0
+          - const: mediatek,mt8195-mmsys
+          - const: syscon
 
   reg:
     maxItems: 1
-- 
2.18.0



WARNING: multiple messages have this Message-ID (diff)
From: Jason-JH.Lin <jason-jh.lin@mediatek.com>
To: Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>
Cc: CK Hu <ck.hu@mediatek.com>,
	Rex-BC Chen <rex-bc.chen@mediatek.com>,
	Singo Chang <singo.chang@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Jason-JH.Lin <jason-jh.lin@mediatek.com>
Subject: [PATCH v4 1/6] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195
Date: Sat, 24 Sep 2022 16:00:53 +0800	[thread overview]
Message-ID: <20220924080058.20566-2-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20220924080058.20566-1-jason-jh.lin@mediatek.com>

For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.

For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.

Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR,
CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality)
and they makes VDOSYS0 supports PQ function while they are not
including in VDOSYS1.

Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related
component). It makes VDOSYS1 supports the HDR function while it's not
including in VDOSYS0.

To summarize0:
Only VDOSYS0 can support PQ adjustment.
Only VDOSYS1 can support HDR adjustment.

Therefore, we need to separate these two different mmsys hardwares to
2 different compatibles for MT8195.

Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml     | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 6ad023eec193..4f90ea03c596 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -31,13 +31,16 @@ properties:
               - mediatek,mt8183-mmsys
               - mediatek,mt8186-mmsys
               - mediatek,mt8192-mmsys
-              - mediatek,mt8195-mmsys
               - mediatek,mt8365-mmsys
           - const: syscon
       - items:
           - const: mediatek,mt7623-mmsys
           - const: mediatek,mt2701-mmsys
           - const: syscon
+      - items:
+          - const: mediatek,mt8195-vdosys0
+          - const: mediatek,mt8195-mmsys
+          - const: syscon
 
   reg:
     maxItems: 1
-- 
2.18.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-09-24  8:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-24  8:00 [PATCH v4 0/6] Change mmsys compatible for mt8195 mediatek-drm Jason-JH.Lin
2022-09-24  8:00 ` Jason-JH.Lin
2022-09-24  8:00 ` Jason-JH.Lin
2022-09-24  8:00 ` Jason-JH.Lin [this message]
2022-09-24  8:00   ` [PATCH v4 1/6] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195 Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-25  7:52   ` Krzysztof Kozlowski
2022-09-25  7:52     ` Krzysztof Kozlowski
2022-09-25  7:52     ` Krzysztof Kozlowski
2022-09-26  1:19     ` Jason-JH Lin (林睿祥)
2022-09-26  1:19       ` Jason-JH Lin (林睿祥)
2022-09-26  1:19       ` Jason-JH Lin (林睿祥)
2022-09-26  2:49       ` Jason-JH Lin (林睿祥)
2022-09-26  2:49         ` Jason-JH Lin (林睿祥)
2022-09-26  2:49         ` Jason-JH Lin (林睿祥)
2022-09-26  6:40       ` Krzysztof Kozlowski
2022-09-26  6:40         ` Krzysztof Kozlowski
2022-09-26  6:40         ` Krzysztof Kozlowski
2022-09-24  8:00 ` [PATCH v4 2/6] Revert "soc: mediatek: add mtk-mmsys support for mt8195 vdosys0" Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00 ` [PATCH v4 3/6] soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00 ` [PATCH v4 4/6] Revert "drm/mediatek: Add mediatek-drm of vdosys0 support for mt8195" Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00 ` [PATCH v4 5/6] drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00 ` [PATCH v4 6/6] soc: mediatek: remove DDP_DOMPONENT_DITHER from enum Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin
2022-09-24  8:00   ` Jason-JH.Lin

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