* [PATCH] configs: socfpga: Add CONFIG_NET_RANDOM_ETHADDR=y to SOCFPGA defconfig
@ 2022-09-25 14:37 teik.heng.chong
2022-09-26 14:35 ` Dinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: teik.heng.chong @ 2022-09-25 14:37 UTC (permalink / raw)
To: u-boot
Cc: Dinh Nguyen, Chin-Liang See, Marek, Simon, Tien Fong, Kok Kiang,
Siew Chin, Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Teik Heng,
Hazim, Jit Loon Lim, Sieu Mun Tang
From: Tien Fong Chee <tien.fong.chee@intel.com>
Ethernet initialization is only work with properly set MAC addresses.
Hence, this config is required to create the random MAC addresses
for Ethernet initialization.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
---
configs/socfpga_arria10_defconfig | 1 +
configs/socfpga_arria5_defconfig | 1 +
configs/socfpga_cyclone5_defconfig | 1 +
3 files changed, 3 insertions(+)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 3eac3dfa5d..53c01ff659 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -60,6 +60,7 @@ CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index dbadb3d49a..da25aa9154 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -63,6 +63,7 @@ CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_RESET=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 4fd14d2e2c..508bfe31fc 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -64,6 +64,7 @@ CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_MII=y
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_RESET=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] configs: socfpga: Add CONFIG_NET_RANDOM_ETHADDR=y to SOCFPGA defconfig
2022-09-25 14:37 [PATCH] configs: socfpga: Add CONFIG_NET_RANDOM_ETHADDR=y to SOCFPGA defconfig teik.heng.chong
@ 2022-09-26 14:35 ` Dinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Dinh Nguyen @ 2022-09-26 14:35 UTC (permalink / raw)
To: teik.heng.chong, u-boot
Cc: Chin-Liang See, Marek, Simon, Tien Fong, Kok Kiang, Siew Chin,
Sin Hui, Raaj, Dinesh, Boon Khai, Alif, Hazim, Jit Loon Lim,
Sieu Mun Tang
On 9/25/22 09:37, teik.heng.chong@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
>
> Ethernet initialization is only work with properly set MAC addresses.
> Hence, this config is required to create the random MAC addresses
> for Ethernet initialization.
>
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
> ---
> configs/socfpga_arria10_defconfig | 1 +
> configs/socfpga_arria5_defconfig | 1 +
> configs/socfpga_cyclone5_defconfig | 1 +
> 3 files changed, 3 insertions(+)
>
> diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
> index 3eac3dfa5d..53c01ff659 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -60,6 +60,7 @@ CONFIG_PHY_MICREL=y
> CONFIG_PHY_MICREL_KSZ90X1=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_MII=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_SPI=y
> CONFIG_TIMER=y
> CONFIG_SPL_TIMER=y
> diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
> index dbadb3d49a..da25aa9154 100644
> --- a/configs/socfpga_arria5_defconfig
> +++ b/configs/socfpga_arria5_defconfig
> @@ -63,6 +63,7 @@ CONFIG_PHY_MICREL=y
> CONFIG_PHY_MICREL_KSZ90X1=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_MII=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_DM_RESET=y
> CONFIG_SPI=y
> CONFIG_CADENCE_QSPI=y
> diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
> index 4fd14d2e2c..508bfe31fc 100644
> --- a/configs/socfpga_cyclone5_defconfig
> +++ b/configs/socfpga_cyclone5_defconfig
> @@ -64,6 +64,7 @@ CONFIG_PHY_MICREL=y
> CONFIG_PHY_MICREL_KSZ90X1=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_MII=y
> +CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_DM_RESET=y
> CONFIG_SPI=y
> CONFIG_CADENCE_QSPI=y
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-09-27 11:33 UTC | newest]
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2022-09-25 14:37 [PATCH] configs: socfpga: Add CONFIG_NET_RANDOM_ETHADDR=y to SOCFPGA defconfig teik.heng.chong
2022-09-26 14:35 ` Dinh Nguyen
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