From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: paulo.r.zanoni@intel.com, jani.nikula@intel.com, thomas.hellstrom@intel.com, matthew.auld@intel.com, daniel.vetter@intel.com, christian.koenig@amd.com Subject: [Intel-gfx] [PATCH 08/16] drm/i915/vm_bind: Support persistent vma activeness tracking Date: Tue, 27 Sep 2022 23:19:10 -0700 [thread overview] Message-ID: <20220928061918.6340-9-niranjana.vishwanathapura@intel.com> (raw) In-Reply-To: <20220928061918.6340-1-niranjana.vishwanathapura@intel.com> Do not use i915_vma activeness tracking for persistent vmas. As persistent vmas are part of working set for each execbuf submission on that address space (VM), a persistent vma is active if the VM active. As vm->root_obj->base.resv will be updated for each submission on that VM, it correctly represent whether the VM is active or not. Add i915_vm_is_active() and i915_vm_sync() functions based on vm->root_obj->base.resv with DMA_RESV_USAGE_BOOKKEEP usage. dma-resv fence list will be updated with this usage during each submission with this VM in the new execbuf3 ioctl path. Update i915_vma_is_active(), i915_vma_sync() and the __i915_vma_unbind_async() functions to properly handle persistent vmas. Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 39 +++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +++ drivers/gpu/drm/i915/i915_vma.c | 28 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_vma.h | 25 +++++++++--------- 4 files changed, 83 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 329ff75b80b9..b7d0844de561 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -25,6 +25,45 @@ #include "i915_trace.h" #include "i915_vgpu.h" +/** + * i915_vm_sync() - Wait until address space is not in use + * @vm: address space + * + * Waits until all requests using the address space are complete. + * + * Returns: 0 if success, -ve err code upon failure + */ +int i915_vm_sync(struct i915_address_space *vm) +{ + int ret; + + /* Wait for all requests under this vm to finish */ + ret = dma_resv_wait_timeout(vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP, false, + MAX_SCHEDULE_TIMEOUT); + if (ret < 0) + return ret; + else if (ret > 0) + return 0; + else + return -ETIMEDOUT; +} + +/** + * i915_vm_is_active() - Check if address space is being used + * @vm: address space + * + * Check if any request using the specified address space is + * active. + * + * Returns: true if address space is active, false otherwise. + */ +bool i915_vm_is_active(const struct i915_address_space *vm) +{ + return !dma_resv_test_signaled(vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP); +} + int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj, struct sg_table *pages) { diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 8c2f57eb5dda..a5bbdc59d9df 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -51,4 +51,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm, #define PIN_OFFSET_MASK I915_GTT_PAGE_MASK +int i915_vm_sync(struct i915_address_space *vm); +bool i915_vm_is_active(const struct i915_address_space *vm); + #endif diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 84ed3d1a17a6..175135ce0d31 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -420,6 +420,24 @@ int i915_vma_wait_for_bind(struct i915_vma *vma) return err; } +/** + * i915_vma_sync() - Wait for the vma to be idle + * @vma: vma to be tested + * + * Returns 0 on success and error code on failure + */ +int i915_vma_sync(struct i915_vma *vma) +{ + int ret; + + /* Wait for the asynchronous bindings and pending GPU reads */ + ret = i915_active_wait(&vma->active); + if (ret || !i915_vma_is_persistent(vma) || i915_vma_is_purged(vma)) + return ret; + + return i915_vm_sync(vma->vm); +} + #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) static int i915_vma_verify_bind_complete(struct i915_vma *vma) { @@ -1888,6 +1906,8 @@ int _i915_vma_move_to_active(struct i915_vma *vma, int err; assert_object_held(obj); + if (i915_vma_is_persistent(vma)) + return -EINVAL; GEM_BUG_ON(!vma->pages); @@ -2098,6 +2118,14 @@ static struct dma_fence *__i915_vma_unbind_async(struct i915_vma *vma) return ERR_PTR(-EBUSY); } + if (i915_vma_is_persistent(vma) && + __i915_sw_fence_await_reservation(&vma->resource->chain, + vma->vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP, + i915_fence_timeout(vma->vm->i915), + GFP_NOWAIT | __GFP_NOWARN) < 0) + return ERR_PTR(-EBUSY); + fence = __i915_vma_evict(vma, true); drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h index 48731855b5b0..02eaf36a2a4c 100644 --- a/drivers/gpu/drm/i915/i915_vma.h +++ b/drivers/gpu/drm/i915/i915_vma.h @@ -51,12 +51,6 @@ i915_vma_create_persistent(struct drm_i915_gem_object *obj, void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags); #define I915_VMA_RELEASE_MAP BIT(0) - -static inline bool i915_vma_is_active(const struct i915_vma *vma) -{ - return !i915_active_is_idle(&vma->active); -} - /* do not reserve memory to prevent deadlocks */ #define __EXEC_OBJECT_NO_RESERVE BIT(31) @@ -162,6 +156,18 @@ static inline void i915_vma_set_purged(struct i915_vma *vma) set_bit(I915_VMA_PURGED_BIT, __i915_vma_flags(vma)); } +static inline bool i915_vma_is_active(const struct i915_vma *vma) +{ + if (i915_vma_is_persistent(vma)) { + if (i915_vma_is_purged(vma)) + return false; + + return i915_vm_is_active(vma->vm); + } + + return !i915_active_is_idle(&vma->active); +} + static inline struct i915_vma *i915_vma_get(struct i915_vma *vma) { i915_gem_object_get(vma->obj); @@ -430,12 +436,7 @@ void i915_vma_make_shrinkable(struct i915_vma *vma); void i915_vma_make_purgeable(struct i915_vma *vma); int i915_vma_wait_for_bind(struct i915_vma *vma); - -static inline int i915_vma_sync(struct i915_vma *vma) -{ - /* Wait for the asynchronous bindings and pending GPU reads */ - return i915_active_wait(&vma->active); -} +int i915_vma_sync(struct i915_vma *vma); /** * i915_vma_get_current_resource - Get the current resource of the vma -- 2.21.0.rc0.32.g243a4c7e27
WARNING: multiple messages have this Message-ID (diff)
From: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: matthew.brost@intel.com, paulo.r.zanoni@intel.com, tvrtko.ursulin@intel.com, jani.nikula@intel.com, lionel.g.landwerlin@intel.com, thomas.hellstrom@intel.com, matthew.auld@intel.com, jason@jlekstrand.net, andi.shyti@linux.intel.com, daniel.vetter@intel.com, christian.koenig@amd.com Subject: [PATCH 08/16] drm/i915/vm_bind: Support persistent vma activeness tracking Date: Tue, 27 Sep 2022 23:19:10 -0700 [thread overview] Message-ID: <20220928061918.6340-9-niranjana.vishwanathapura@intel.com> (raw) In-Reply-To: <20220928061918.6340-1-niranjana.vishwanathapura@intel.com> Do not use i915_vma activeness tracking for persistent vmas. As persistent vmas are part of working set for each execbuf submission on that address space (VM), a persistent vma is active if the VM active. As vm->root_obj->base.resv will be updated for each submission on that VM, it correctly represent whether the VM is active or not. Add i915_vm_is_active() and i915_vm_sync() functions based on vm->root_obj->base.resv with DMA_RESV_USAGE_BOOKKEEP usage. dma-resv fence list will be updated with this usage during each submission with this VM in the new execbuf3 ioctl path. Update i915_vma_is_active(), i915_vma_sync() and the __i915_vma_unbind_async() functions to properly handle persistent vmas. Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 39 +++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gem_gtt.h | 3 +++ drivers/gpu/drm/i915/i915_vma.c | 28 +++++++++++++++++++++ drivers/gpu/drm/i915/i915_vma.h | 25 +++++++++--------- 4 files changed, 83 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 329ff75b80b9..b7d0844de561 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -25,6 +25,45 @@ #include "i915_trace.h" #include "i915_vgpu.h" +/** + * i915_vm_sync() - Wait until address space is not in use + * @vm: address space + * + * Waits until all requests using the address space are complete. + * + * Returns: 0 if success, -ve err code upon failure + */ +int i915_vm_sync(struct i915_address_space *vm) +{ + int ret; + + /* Wait for all requests under this vm to finish */ + ret = dma_resv_wait_timeout(vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP, false, + MAX_SCHEDULE_TIMEOUT); + if (ret < 0) + return ret; + else if (ret > 0) + return 0; + else + return -ETIMEDOUT; +} + +/** + * i915_vm_is_active() - Check if address space is being used + * @vm: address space + * + * Check if any request using the specified address space is + * active. + * + * Returns: true if address space is active, false otherwise. + */ +bool i915_vm_is_active(const struct i915_address_space *vm) +{ + return !dma_resv_test_signaled(vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP); +} + int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj, struct sg_table *pages) { diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index 8c2f57eb5dda..a5bbdc59d9df 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -51,4 +51,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm, #define PIN_OFFSET_MASK I915_GTT_PAGE_MASK +int i915_vm_sync(struct i915_address_space *vm); +bool i915_vm_is_active(const struct i915_address_space *vm); + #endif diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 84ed3d1a17a6..175135ce0d31 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -420,6 +420,24 @@ int i915_vma_wait_for_bind(struct i915_vma *vma) return err; } +/** + * i915_vma_sync() - Wait for the vma to be idle + * @vma: vma to be tested + * + * Returns 0 on success and error code on failure + */ +int i915_vma_sync(struct i915_vma *vma) +{ + int ret; + + /* Wait for the asynchronous bindings and pending GPU reads */ + ret = i915_active_wait(&vma->active); + if (ret || !i915_vma_is_persistent(vma) || i915_vma_is_purged(vma)) + return ret; + + return i915_vm_sync(vma->vm); +} + #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) static int i915_vma_verify_bind_complete(struct i915_vma *vma) { @@ -1888,6 +1906,8 @@ int _i915_vma_move_to_active(struct i915_vma *vma, int err; assert_object_held(obj); + if (i915_vma_is_persistent(vma)) + return -EINVAL; GEM_BUG_ON(!vma->pages); @@ -2098,6 +2118,14 @@ static struct dma_fence *__i915_vma_unbind_async(struct i915_vma *vma) return ERR_PTR(-EBUSY); } + if (i915_vma_is_persistent(vma) && + __i915_sw_fence_await_reservation(&vma->resource->chain, + vma->vm->root_obj->base.resv, + DMA_RESV_USAGE_BOOKKEEP, + i915_fence_timeout(vma->vm->i915), + GFP_NOWAIT | __GFP_NOWARN) < 0) + return ERR_PTR(-EBUSY); + fence = __i915_vma_evict(vma, true); drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */ diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h index 48731855b5b0..02eaf36a2a4c 100644 --- a/drivers/gpu/drm/i915/i915_vma.h +++ b/drivers/gpu/drm/i915/i915_vma.h @@ -51,12 +51,6 @@ i915_vma_create_persistent(struct drm_i915_gem_object *obj, void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags); #define I915_VMA_RELEASE_MAP BIT(0) - -static inline bool i915_vma_is_active(const struct i915_vma *vma) -{ - return !i915_active_is_idle(&vma->active); -} - /* do not reserve memory to prevent deadlocks */ #define __EXEC_OBJECT_NO_RESERVE BIT(31) @@ -162,6 +156,18 @@ static inline void i915_vma_set_purged(struct i915_vma *vma) set_bit(I915_VMA_PURGED_BIT, __i915_vma_flags(vma)); } +static inline bool i915_vma_is_active(const struct i915_vma *vma) +{ + if (i915_vma_is_persistent(vma)) { + if (i915_vma_is_purged(vma)) + return false; + + return i915_vm_is_active(vma->vm); + } + + return !i915_active_is_idle(&vma->active); +} + static inline struct i915_vma *i915_vma_get(struct i915_vma *vma) { i915_gem_object_get(vma->obj); @@ -430,12 +436,7 @@ void i915_vma_make_shrinkable(struct i915_vma *vma); void i915_vma_make_purgeable(struct i915_vma *vma); int i915_vma_wait_for_bind(struct i915_vma *vma); - -static inline int i915_vma_sync(struct i915_vma *vma) -{ - /* Wait for the asynchronous bindings and pending GPU reads */ - return i915_active_wait(&vma->active); -} +int i915_vma_sync(struct i915_vma *vma); /** * i915_vma_get_current_resource - Get the current resource of the vma -- 2.21.0.rc0.32.g243a4c7e27
next prev parent reply other threads:[~2022-09-28 6:20 UTC|newest] Thread overview: 108+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-28 6:19 [PATCH 00/16] drm/i915/vm_bind: Add VM_BIND functionality Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 01/16] drm/i915/vm_bind: Expose vm lookup function Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 17:28 ` Matthew Auld 2022-09-28 17:28 ` [Intel-gfx] " Matthew Auld 2022-09-28 6:19 ` [PATCH 02/16] drm/i915/vm_bind: Add __i915_sw_fence_await_reservation() Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 17:39 ` Matthew Auld 2022-09-28 17:39 ` [Intel-gfx] " Matthew Auld 2022-09-29 5:20 ` Niranjana Vishwanathapura 2022-09-29 5:20 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 03/16] drm/i915/vm_bind: Expose i915_gem_object_max_page_size() Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 17:40 ` Matthew Auld 2022-09-28 17:40 ` [Intel-gfx] " Matthew Auld 2022-09-29 5:20 ` Niranjana Vishwanathapura 2022-09-29 5:20 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 04/16] drm/i915/vm_bind: Add support to create persistent vma Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 7:38 ` Tvrtko Ursulin 2022-09-28 17:05 ` Niranjana Vishwanathapura 2022-09-28 14:44 ` Andi Shyti 2022-09-28 14:44 ` [Intel-gfx] " Andi Shyti 2022-09-28 17:07 ` Niranjana Vishwanathapura 2022-09-28 17:07 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-29 17:04 ` Matthew Auld 2022-09-29 17:04 ` [Intel-gfx] " Matthew Auld 2022-09-28 6:19 ` [PATCH 05/16] drm/i915/vm_bind: Implement bind and unbind of object Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 9:43 ` kernel test robot 2022-09-28 9:43 ` kernel test robot 2022-09-28 17:52 ` Matthew Auld 2022-09-28 17:52 ` Matthew Auld 2022-09-29 5:24 ` Niranjana Vishwanathapura 2022-09-29 5:24 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-29 9:03 ` Matthew Auld 2022-09-29 9:03 ` [Intel-gfx] " Matthew Auld 2022-09-29 10:51 ` Matthew Auld 2022-09-29 10:51 ` [Intel-gfx] " Matthew Auld 2022-09-29 14:24 ` Niranjana Vishwanathapura 2022-09-29 14:24 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 20:06 ` Welty, Brian 2022-09-29 5:25 ` Niranjana Vishwanathapura 2022-09-29 10:49 ` Matthew Auld 2022-09-29 10:49 ` [Intel-gfx] " Matthew Auld 2022-09-29 16:38 ` Niranjana Vishwanathapura 2022-09-29 16:38 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-29 17:28 ` Matthew Auld 2022-09-29 17:28 ` Matthew Auld 2022-09-29 17:49 ` Niranjana Vishwanathapura 2022-09-29 17:49 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 06/16] drm/i915/vm_bind: Support for VM private BOs Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 17:54 ` Matthew Auld 2022-09-28 17:54 ` [Intel-gfx] " Matthew Auld 2022-09-29 14:28 ` Niranjana Vishwanathapura 2022-09-29 14:28 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] [PATCH 07/16] drm/i915/vm_bind: Add support to handle object evictions Niranjana Vishwanathapura 2022-09-28 6:19 ` Niranjana Vishwanathapura 2022-09-29 17:13 ` Matthew Auld 2022-09-29 17:13 ` [Intel-gfx] " Matthew Auld 2022-09-28 6:19 ` Niranjana Vishwanathapura [this message] 2022-09-28 6:19 ` [PATCH 08/16] drm/i915/vm_bind: Support persistent vma activeness tracking Niranjana Vishwanathapura 2022-09-30 12:00 ` Andi Shyti 2022-09-30 12:00 ` [Intel-gfx] " Andi Shyti 2022-09-28 6:19 ` [Intel-gfx] [PATCH 09/16] drm/i915/vm_bind: Add out fence support Niranjana Vishwanathapura 2022-09-28 6:19 ` Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 10/16] drm/i915/vm_bind: Abstract out common execbuf functions Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-30 10:45 ` Matthew Auld 2022-09-30 10:45 ` [Intel-gfx] " Matthew Auld 2022-09-30 16:26 ` Niranjana Vishwanathapura 2022-09-30 16:26 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 11/16] drm/i915/vm_bind: Use common execbuf functions in execbuf path Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-30 10:47 ` Matthew Auld 2022-09-30 10:47 ` [Intel-gfx] " Matthew Auld 2022-09-28 6:19 ` [PATCH 12/16] drm/i915/vm_bind: Implement I915_GEM_EXECBUFFER3 ioctl Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-29 15:00 ` Matthew Auld 2022-09-29 15:00 ` [Intel-gfx] " Matthew Auld 2022-09-29 16:02 ` Niranjana Vishwanathapura 2022-09-29 16:02 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-10-03 21:12 ` Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] [PATCH 13/16] drm/i915/vm_bind: Update i915_vma_verify_bind_complete() Niranjana Vishwanathapura 2022-09-28 6:19 ` Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 14/16] drm/i915/vm_bind: Handle persistent vmas in execbuf3 Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-30 9:47 ` Matthew Auld 2022-09-30 9:47 ` [Intel-gfx] " Matthew Auld 2022-10-02 6:28 ` Niranjana Vishwanathapura 2022-10-02 6:28 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-10-03 8:36 ` Matthew Auld 2022-10-03 8:36 ` [Intel-gfx] " Matthew Auld 2022-10-05 5:38 ` Niranjana Vishwanathapura 2022-10-05 5:38 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] [PATCH 15/16] drm/i915/vm_bind: userptr dma-resv changes Niranjana Vishwanathapura 2022-09-28 6:19 ` Niranjana Vishwanathapura 2022-09-28 6:19 ` [PATCH 16/16] drm/i915/vm_bind: Add uapi for user to enable vm_bind_mode Niranjana Vishwanathapura 2022-09-28 6:19 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-30 10:01 ` Matthew Auld 2022-09-30 10:01 ` [Intel-gfx] " Matthew Auld 2022-09-30 16:13 ` Niranjana Vishwanathapura 2022-09-30 16:13 ` [Intel-gfx] " Niranjana Vishwanathapura 2022-09-28 13:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vm_bind: Add VM_BIND functionality (rev4) Patchwork 2022-09-28 13:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-09-28 13:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220928061918.6340-9-niranjana.vishwanathapura@intel.com \ --to=niranjana.vishwanathapura@intel.com \ --cc=christian.koenig@amd.com \ --cc=daniel.vetter@intel.com \ --cc=dri-devel@lists.freedesktop.org \ --cc=intel-gfx@lists.freedesktop.org \ --cc=jani.nikula@intel.com \ --cc=matthew.auld@intel.com \ --cc=paulo.r.zanoni@intel.com \ --cc=thomas.hellstrom@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.