From: Serge Semin <Sergey.Semin@baikalelectronics.ru> To: Michal Simek <michal.simek@xilinx.com>, Borislav Petkov <bp@alien8.de>, Mauro Carvalho Chehab <mchehab@kernel.org>, Tony Luck <tony.luck@intel.com>, James Morse <james.morse@arm.com>, Robert Richter <rric@kernel.org> Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>, Serge Semin <fancer.lancer@gmail.com>, Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>, Michail Ivanov <Michail.Ivanov@baikalelectronics.ru>, Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>, Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>, Manish Narani <manish.narani@xilinx.com>, Dinh Nguyen <dinguyen@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH RESEND v3 10/18] EDAC/synopsys: Get corrected bit position Date: Fri, 30 Sep 2022 02:35:22 +0300 [thread overview] Message-ID: <20220929233530.13016-11-Sergey.Semin@baikalelectronics.ru> (raw) In-Reply-To: <20220929233530.13016-1-Sergey.Semin@baikalelectronics.ru> Since the DQ-bus width is now available in the driver we can use it to calculate the bit-position corrected by the ECC engine. It can be done based on the offsets provided in the table [1]. Using info from that table let's introduce a new inline method snps_get_bitpos() which would provide the actual CE bit-position based on the value read from the ECCSTAT.corrected_bit_num field and the DQ-bus width. The method will be called if a corrected error is detected. [1] DesignWare® Cores Enhanced Universal DDR Memory Controller (uMCTL2) Databook, Version 3.91a, October 2020, p.426-427 Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- drivers/edac/synopsys_edac.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index c0e5476d5c85..1cfbc5a2a564 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -10,6 +10,7 @@ #include <linux/bits.h> #include <linux/edac.h> #include <linux/fs.h> +#include <linux/log2.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/seq_file.h> @@ -357,6 +358,27 @@ struct snps_edac_priv { #endif }; +/** + * snps_get_bitpos - Get DQ-bus corrected bit position. + * @bitnum: Bit number retrieved from the ECCSTAT.corrected_bit_num field. + * @dq_width: Controller DQ-bus width. + * + * Return: actual corrected DQ-bus bit position starting from 0. + */ +static inline u32 snps_get_bitpos(u32 bitnum, enum snps_dq_width dq_width) +{ + /* ecc[0] bit */ + if (bitnum == 0) + return BITS_PER_BYTE << dq_width; + + /* ecc[1:x] bit */ + if (is_power_of_2(bitnum)) + return (BITS_PER_BYTE << dq_width) + ilog2(bitnum) + 1; + + /* data[0:y] bit */ + return bitnum - ilog2(bitnum) - 2; +} + /** * snps_get_error_info - Get the current ECC error info. * @priv: DDR memory controller private instance data. @@ -385,6 +407,8 @@ static int snps_get_error_info(struct snps_edac_priv *priv) if (!p->ce_cnt) goto ue_err; + p->ceinfo.bitpos = snps_get_bitpos(p->ceinfo.bitpos, priv->info.dq_width); + regval = readl(base + ECC_CEADDR0_OFST); p->ceinfo.row = FIELD_GET(ECC_CEADDR0_ROW_MASK, regval); -- 2.37.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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From: Serge Semin <Sergey.Semin@baikalelectronics.ru> To: Michal Simek <michal.simek@xilinx.com>, Borislav Petkov <bp@alien8.de>, Mauro Carvalho Chehab <mchehab@kernel.org>, Tony Luck <tony.luck@intel.com>, James Morse <james.morse@arm.com>, Robert Richter <rric@kernel.org> Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>, Serge Semin <fancer.lancer@gmail.com>, Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>, Michail Ivanov <Michail.Ivanov@baikalelectronics.ru>, Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>, Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>, Manish Narani <manish.narani@xilinx.com>, Dinh Nguyen <dinguyen@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH RESEND v3 10/18] EDAC/synopsys: Get corrected bit position Date: Fri, 30 Sep 2022 02:35:22 +0300 [thread overview] Message-ID: <20220929233530.13016-11-Sergey.Semin@baikalelectronics.ru> (raw) In-Reply-To: <20220929233530.13016-1-Sergey.Semin@baikalelectronics.ru> Since the DQ-bus width is now available in the driver we can use it to calculate the bit-position corrected by the ECC engine. It can be done based on the offsets provided in the table [1]. Using info from that table let's introduce a new inline method snps_get_bitpos() which would provide the actual CE bit-position based on the value read from the ECCSTAT.corrected_bit_num field and the DQ-bus width. The method will be called if a corrected error is detected. [1] DesignWare® Cores Enhanced Universal DDR Memory Controller (uMCTL2) Databook, Version 3.91a, October 2020, p.426-427 Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- drivers/edac/synopsys_edac.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index c0e5476d5c85..1cfbc5a2a564 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -10,6 +10,7 @@ #include <linux/bits.h> #include <linux/edac.h> #include <linux/fs.h> +#include <linux/log2.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/seq_file.h> @@ -357,6 +358,27 @@ struct snps_edac_priv { #endif }; +/** + * snps_get_bitpos - Get DQ-bus corrected bit position. + * @bitnum: Bit number retrieved from the ECCSTAT.corrected_bit_num field. + * @dq_width: Controller DQ-bus width. + * + * Return: actual corrected DQ-bus bit position starting from 0. + */ +static inline u32 snps_get_bitpos(u32 bitnum, enum snps_dq_width dq_width) +{ + /* ecc[0] bit */ + if (bitnum == 0) + return BITS_PER_BYTE << dq_width; + + /* ecc[1:x] bit */ + if (is_power_of_2(bitnum)) + return (BITS_PER_BYTE << dq_width) + ilog2(bitnum) + 1; + + /* data[0:y] bit */ + return bitnum - ilog2(bitnum) - 2; +} + /** * snps_get_error_info - Get the current ECC error info. * @priv: DDR memory controller private instance data. @@ -385,6 +407,8 @@ static int snps_get_error_info(struct snps_edac_priv *priv) if (!p->ce_cnt) goto ue_err; + p->ceinfo.bitpos = snps_get_bitpos(p->ceinfo.bitpos, priv->info.dq_width); + regval = readl(base + ECC_CEADDR0_OFST); p->ceinfo.row = FIELD_GET(ECC_CEADDR0_ROW_MASK, regval); -- 2.37.3
next prev parent reply other threads:[~2022-09-29 23:50 UTC|newest] Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-29 23:35 [PATCH RESEND v3 00/18] EDAC/synopsys: Add generic DDRC info and address mapping Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 01/18] EDAC/synopsys: Convert sysfs nodes to debugfs ones Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 02/18] EDAC/mc: Extend memtypes with LPDDR(mDDR) and LPDDR2 Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 03/18] EDAC/synopsys: Extend memtypes supported by controller Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 04/18] EDAC/synopsys: Detach private data from mci instance Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 05/18] EDAC/synopsys: Add DDRC basic parameters infrastructure Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 06/18] EDAC/synopsys: Convert plat-data to plat-init function Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 07/18] EDAC/synopsys: Parse ADDRMAP[7-8] CSRs for (LP)DDR4 only Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 08/18] EDAC/synopsys: Parse ADDRMAP[0] CSR for multi-ranks case only Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 09/18] EDAC/synopsys: Set actual DIMM ECC errors grain Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` Serge Semin [this message] 2022-09-29 23:35 ` [PATCH RESEND v3 10/18] EDAC/synopsys: Get corrected bit position Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 11/18] EDAC/synopsys: Read full data pattern on errors Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 12/18] EDAC/synopsys: Read data syndrome " Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 13/18] EDAC/synopsys: Introduce System/SDRAM address translation interface Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 14/18] EDAC/synopsys: Simplify HIF/SDRAM column mapping get procedure Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 15/18] EDAC/synopsys: Add HIF/SDRAM mapping debugfs node Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 16/18] EDAC/synopsys: Add erroneous page-frame/offset reporting Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 17/18] EDAC/synopsys: Add system address regions support Serge Semin 2022-09-29 23:35 ` Serge Semin 2022-09-29 23:35 ` [PATCH RESEND v3 18/18] EDAC/synopsys: Add mapping-based memory size calculation Serge Semin 2022-09-29 23:35 ` Serge Semin
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