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From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v9, 1/4] mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
Date: Thu, 6 Oct 2022 12:34:53 +0800	[thread overview]
Message-ID: <20221006043456.8754-2-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <20221006043456.8754-1-yongqiang.niu@mediatek.com>

Use GCE_CTRL_BY_SW definition instead of number

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 9465f9081515..c3cb24f51699 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -38,6 +38,7 @@
 #define CMDQ_THR_PRIORITY		0x40
 
 #define GCE_GCTL_VALUE			0x48
+#define GCE_CTRL_BY_SW				GENMASK(2, 0)
 
 #define CMDQ_THR_ACTIVE_SLOT_CYCLES	0x3200
 #define CMDQ_THR_ENABLED		0x1
@@ -129,7 +130,8 @@ static void cmdq_init(struct cmdq *cmdq)
 
 	WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks));
 	if (cmdq->control_by_sw)
-		writel(0x7, cmdq->base + GCE_GCTL_VALUE);
+		writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+
 	writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
 	for (i = 0; i <= CMDQ_MAX_EVENT; i++)
 		writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v9, 1/4] mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
Date: Thu, 6 Oct 2022 12:34:53 +0800	[thread overview]
Message-ID: <20221006043456.8754-2-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <20221006043456.8754-1-yongqiang.niu@mediatek.com>

Use GCE_CTRL_BY_SW definition instead of number

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
 drivers/mailbox/mtk-cmdq-mailbox.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 9465f9081515..c3cb24f51699 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -38,6 +38,7 @@
 #define CMDQ_THR_PRIORITY		0x40
 
 #define GCE_GCTL_VALUE			0x48
+#define GCE_CTRL_BY_SW				GENMASK(2, 0)
 
 #define CMDQ_THR_ACTIVE_SLOT_CYCLES	0x3200
 #define CMDQ_THR_ENABLED		0x1
@@ -129,7 +130,8 @@ static void cmdq_init(struct cmdq *cmdq)
 
 	WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks));
 	if (cmdq->control_by_sw)
-		writel(0x7, cmdq->base + GCE_GCTL_VALUE);
+		writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE);
+
 	writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
 	for (i = 0; i <= CMDQ_MAX_EVENT; i++)
 		writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
-- 
2.25.1


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  reply	other threads:[~2022-10-06  4:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-06  4:34 [PATCH v9, 0/4] mailbox: mtk-cmdq: add MT8186 support Yongqiang Niu
2022-10-06  4:34 ` Yongqiang Niu
2022-10-06  4:34 ` Yongqiang Niu [this message]
2022-10-06  4:34   ` [PATCH v9, 1/4] mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number Yongqiang Niu
2022-10-06  9:25   ` AngeloGioacchino Del Regno
2022-10-06  9:25     ` AngeloGioacchino Del Regno
2022-10-06  4:34 ` [PATCH v9, 2/4] mailbox: mtk-cmdq: add gce software ddr enable private data Yongqiang Niu
2022-10-06  4:34   ` Yongqiang Niu
2022-10-06  9:29   ` AngeloGioacchino Del Regno
2022-10-06  9:29     ` AngeloGioacchino Del Regno
2022-10-07  1:51     ` yongqiang.niu
2022-10-07  1:51       ` yongqiang.niu
2022-10-07  8:57       ` AngeloGioacchino Del Regno
2022-10-07  8:57         ` AngeloGioacchino Del Regno
2022-10-06  4:34 ` [PATCH v9, 3/4] mailbox: mtk-cmdq: add gce ddr enable support flow Yongqiang Niu
2022-10-06  4:34   ` Yongqiang Niu
2022-10-06  9:30   ` AngeloGioacchino Del Regno
2022-10-06  9:30     ` AngeloGioacchino Del Regno
2022-10-06  4:34 ` [PATCH v9, 4/4] mailbox: mtk-cmdq: add MT8186 support Yongqiang Niu
2022-10-06  4:34   ` Yongqiang Niu
2022-10-06  9:31   ` AngeloGioacchino Del Regno
2022-10-06  9:31     ` AngeloGioacchino Del Regno

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