[PATCH] ARM: Orion5x: ts78xx: Fix FPGA virt base address

[PATCH] ARM: Orion5x: ts78xx: Fix FPGA virt base address

[Firas Ashkar]

decrease FPGA registers' virtual base address, such that it does not exceed
arm architecture's VMALLOC_END, hence preventing related boot time BUG
warning message.

before fix
----------
Booting Linux on physical CPU 0x0
Linux version 6.1.0-rc1 (fashkar@barbarian) \
 (arm-buildroot-linux-gnueabi-gcc.br_real \
 (Buildroot 2022.02-253-ga6cc06e908-dirty) 10.3.0, \
 GNU ld (GNU Binutils) 2.36.1) #5 PREEMPT Mon Oct 17 13:53:11 EDT 2022
CPU: Feroceon [41069260] revision 0 (ARMv5TEJ), cr=b005317f
CPU: VIVT data cache, VIVT instruction cache
Machine: Technologic Systems TS-78xx SBC
Memory policy: Data cache writeback
BUG: mapping for 0xe8000000 at 0xff900000 out of vmalloc space
Zone ranges:
  Normal   [mem 0x0000000000000000-0x0000000007ffffff]
Movable zone start for each node
Early memory node ranges
...

after fix
---------
Booting Linux on physical CPU 0x0
Linux version 6.1.0-rc1 (fashkar@barbarian) \
 (arm-buildroot-linux-gnueabi-gcc.br_real \
 (Buildroot 2022.02-253-ga6cc06e908-dirty) 10.3.0, \
 GNU ld (GNU Binutils) 2.36.1) #6 PREEMPT Mon Oct 17 13:57:44 EDT 2022
CPU: Feroceon [41069260] revision 0 (ARMv5TEJ), cr=b005317f
CPU: VIVT data cache, VIVT instruction cache
Machine: Technologic Systems TS-78xx SBC
Memory policy: Data cache writeback
Zone ranges:
  Normal   [mem 0x0000000000000000-0x0000000007ffffff]
Movable zone start for each node
...

Signed-off-by: Firas Ashkar <firas.ashkar@savoirfairelinux.com>
---
:100644 100644 af810e7ccd79 f2243113b230 M	arch/arm/mach-orion5x/ts78xx-setup.c
 arch/arm/mach-orion5x/ts78xx-setup.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c
index af810e7ccd79..f2243113b230 100644
--- a/arch/arm/mach-orion5x/ts78xx-setup.c
+++ b/arch/arm/mach-orion5x/ts78xx-setup.c
@@ -31,7 +31,7 @@
  * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
  */
 #define TS78XX_FPGA_REGS_PHYS_BASE	0xe8000000
-#define TS78XX_FPGA_REGS_VIRT_BASE	IOMEM(0xff900000)
+#define TS78XX_FPGA_REGS_VIRT_BASE	IOMEM(0xff700000)
 #define TS78XX_FPGA_REGS_SIZE		SZ_1M
 
 static struct ts78xx_fpga_data ts78xx_fpga = {
-- 
2.34.1


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