* [PATCH v1 0/3] Improve FDT and support TPM for LoongArch
@ 2022-10-21 3:54 Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB Xiaojuan Yang
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Xiaojuan Yang @ 2022-10-21 3:54 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, gaosong, maobibo, f4bug, philmd
This series change FDT base addr and add uart,rtc info into
FDT, Add TPM device for LoongArch virt machine.
Changes for v1:
1. Change FDT base addr to 2 MiB.
2. Add uart and rtc info into FDT.
3. Add TPM device support.
Xiaojuan Yang (3):
hw/loongarch: Change FDT base addr to 2 MiB
hw/loongarch: Improve fdt for LoongArch virt machine
hw/loongarch: Add TPM device for LoongArch virt machine
hw/loongarch/acpi-build.c | 50 ++++++++++++++++++++++++++++++++--
hw/loongarch/virt.c | 53 ++++++++++++++++++++++++++++++++-----
include/hw/loongarch/virt.h | 3 ---
include/hw/pci-host/ls7a.h | 1 +
4 files changed, 95 insertions(+), 12 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB
2022-10-21 3:54 [PATCH v1 0/3] Improve FDT and support TPM for LoongArch Xiaojuan Yang
@ 2022-10-21 3:54 ` Xiaojuan Yang
2022-10-27 2:53 ` maobibo
2022-10-21 3:54 ` [PATCH v1 2/3] hw/loongarch: Improve fdt for LoongArch virt machine Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 3/3] hw/loongarch: Add TPM device " Xiaojuan Yang
2 siblings, 1 reply; 5+ messages in thread
From: Xiaojuan Yang @ 2022-10-21 3:54 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, gaosong, maobibo, f4bug, philmd
Change FDT base addr to 2 MiB in lowmem region. Since lowmem
region starts from 0, FDT base address is located at 2 MiB to
avoid NULL pointer access.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
hw/loongarch/virt.c | 18 +++++++++++-------
include/hw/loongarch/virt.h | 3 ---
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 29df99727d..fe33e7e3e4 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -159,7 +159,6 @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
2, base_mmio, 2, size_mmio);
g_free(nodename);
- qemu_fdt_dumpdtb(ms->fdt, lams->fdt_size);
}
static void fdt_add_irqchip_node(LoongArchMachineState *lams)
@@ -689,6 +688,7 @@ static void loongarch_init(MachineState *machine)
MemoryRegion *address_space_mem = get_system_memory();
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
int i;
+ hwaddr fdt_base;
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -793,12 +793,16 @@ static void loongarch_init(MachineState *machine)
lams->machine_done.notify = virt_machine_done;
qemu_add_machine_init_done_notifier(&lams->machine_done);
fdt_add_pcie_node(lams);
-
- /* load fdt */
- MemoryRegion *fdt_rom = g_new(MemoryRegion, 1);
- memory_region_init_rom(fdt_rom, NULL, "fdt", VIRT_FDT_SIZE, &error_fatal);
- memory_region_add_subregion(get_system_memory(), VIRT_FDT_BASE, fdt_rom);
- rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, VIRT_FDT_BASE);
+ /*
+ * Since lowmem region starts from 0, FDT base address is located
+ * at 2 MiB to avoid NULL pointer access.
+ *
+ * Put the FDT into the memory map as a ROM image: this will ensure
+ * the FDT is copied again upon reset, even if addr points into RAM.
+ */
+ fdt_base = 2 * MiB;
+ qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
+ rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
}
bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 09f1c88ee5..45c383f5a7 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -28,9 +28,6 @@
#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
-#define VIRT_FDT_BASE 0x1c400000
-#define VIRT_FDT_SIZE 0x100000
-
struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 2/3] hw/loongarch: Improve fdt for LoongArch virt machine
2022-10-21 3:54 [PATCH v1 0/3] Improve FDT and support TPM for LoongArch Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB Xiaojuan Yang
@ 2022-10-21 3:54 ` Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 3/3] hw/loongarch: Add TPM device " Xiaojuan Yang
2 siblings, 0 replies; 5+ messages in thread
From: Xiaojuan Yang @ 2022-10-21 3:54 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, gaosong, maobibo, f4bug, philmd
Add new items into LoongArch FDT, including rtc and uart info.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
hw/loongarch/virt.c | 31 +++++++++++++++++++++++++++++++
include/hw/pci-host/ls7a.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index fe33e7e3e4..eed9d591e7 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -42,6 +42,35 @@
#include "hw/display/ramfb.h"
#include "hw/mem/pc-dimm.h"
+static void fdt_add_rtc_node(LoongArchMachineState *lams)
+{
+ char *nodename;
+ hwaddr base = VIRT_RTC_REG_BASE;
+ hwaddr size = VIRT_RTC_LEN;
+ MachineState *ms = MACHINE(lams);
+
+ nodename = g_strdup_printf("/rtc@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "loongson,ls7a-rtc");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", 0x0, base, size);
+ g_free(nodename);
+}
+
+static void fdt_add_uart_node(LoongArchMachineState *lams)
+{
+ char *nodename;
+ hwaddr base = VIRT_UART_BASE;
+ hwaddr size = VIRT_UART_SIZE;
+ MachineState *ms = MACHINE(lams);
+
+ nodename = g_strdup_printf("/serial@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", "ns16550a");
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "reg", 0x0, base, 0x0, size);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "clock-frequency", 100000000);
+ g_free(nodename);
+}
+
static void create_fdt(LoongArchMachineState *lams)
{
MachineState *ms = MACHINE(lams);
@@ -422,6 +451,7 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
qdev_get_gpio_in(pch_pic,
VIRT_UART_IRQ - PCH_PIC_IRQ_OFFSET),
115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
+ fdt_add_uart_node(lams);
/* Network init */
for (i = 0; i < nb_nics; i++) {
@@ -442,6 +472,7 @@ static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *
sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
qdev_get_gpio_in(pch_pic,
VIRT_RTC_IRQ - PCH_PIC_IRQ_OFFSET));
+ fdt_add_rtc_node(lams);
pm_mem = g_new(MemoryRegion, 1);
memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index 9bd875ca8b..df7fa55a30 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -37,6 +37,7 @@
#define VIRT_PCI_IRQS 48
#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
#define VIRT_UART_BASE 0x1fe001e0
+#define VIRT_UART_SIZE 0X100
#define VIRT_RTC_IRQ (PCH_PIC_IRQ_OFFSET + 3)
#define VIRT_MISC_REG_BASE (VIRT_PCH_REG_BASE + 0x00080000)
#define VIRT_RTC_REG_BASE (VIRT_MISC_REG_BASE + 0x00050100)
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v1 3/3] hw/loongarch: Add TPM device for LoongArch virt machine
2022-10-21 3:54 [PATCH v1 0/3] Improve FDT and support TPM for LoongArch Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 2/3] hw/loongarch: Improve fdt for LoongArch virt machine Xiaojuan Yang
@ 2022-10-21 3:54 ` Xiaojuan Yang
2 siblings, 0 replies; 5+ messages in thread
From: Xiaojuan Yang @ 2022-10-21 3:54 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, gaosong, maobibo, f4bug, philmd
Add TPM device for LoongArch virt machine, including
establish TPM acpi info and add TYPE_TPM_TIS_SYSBUS
to dynamic_sysbus_devices list.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
hw/loongarch/acpi-build.c | 50 +++++++++++++++++++++++++++++++++++++--
hw/loongarch/virt.c | 4 ++++
2 files changed, 52 insertions(+), 2 deletions(-)
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
index 378a6d9d38..1d0e562435 100644
--- a/hw/loongarch/acpi-build.c
+++ b/hw/loongarch/acpi-build.c
@@ -31,6 +31,9 @@
#include "hw/acpi/generic_event_device.h"
#include "hw/pci-host/gpex.h"
+#include "sysemu/tpm.h"
+#include "hw/platform-bus.h"
+#include "hw/acpi/aml-build.h"
#define ACPI_BUILD_ALIGN_SIZE 0x1000
#define ACPI_BUILD_TABLE_SIZE 0x20000
@@ -275,6 +278,41 @@ static void build_pci_device_aml(Aml *scope, LoongArchMachineState *lams)
acpi_dsdt_add_gpex(scope, &cfg);
}
+#ifdef CONFIG_TPM
+static void acpi_dsdt_add_tpm(Aml *scope, LoongArchMachineState *vms)
+{
+ PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev);
+ hwaddr pbus_base = VIRT_PLATFORM_BUS_BASEADDRESS;
+ SysBusDevice *sbdev = SYS_BUS_DEVICE(tpm_find());
+ MemoryRegion *sbdev_mr;
+ hwaddr tpm_base;
+
+ if (!sbdev) {
+ return;
+ }
+
+ tpm_base = platform_bus_get_mmio_addr(pbus, sbdev, 0);
+ assert(tpm_base != -1);
+
+ tpm_base += pbus_base;
+
+ sbdev_mr = sysbus_mmio_get_region(sbdev, 0);
+
+ Aml *dev = aml_device("TPM0");
+ aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+ aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs,
+ aml_memory32_fixed(tpm_base,
+ (uint32_t)memory_region_size(sbdev_mr),
+ AML_READ_WRITE));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+}
+#endif
+
/* build DSDT */
static void
build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
@@ -289,7 +327,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_uart_device_aml(dsdt);
build_pci_device_aml(dsdt, lams);
build_la_ged_aml(dsdt, machine);
-
+#ifdef CONFIG_TPM
+ acpi_dsdt_add_tpm(dsdt, lams);
+#endif
/* System State Package */
scope = aml_scope("\\");
pkg = aml_package(4);
@@ -358,7 +398,13 @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
build_mcfg(tables_blob, tables->linker, &mcfg, lams->oem_id,
lams->oem_table_id);
}
-
+ /* TPM info */
+ if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) {
+ acpi_add_table(table_offsets, tables_blob);
+ build_tpm2(tables_blob, tables->linker,
+ tables->tcpalog, lams->oem_id,
+ lams->oem_table_id);
+ }
/* Add tables supplied by user (if any) */
for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
unsigned len = acpi_table_len(u);
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index eed9d591e7..c1612d5e05 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -41,6 +41,7 @@
#include "hw/platform-bus.h"
#include "hw/display/ramfb.h"
#include "hw/mem/pc-dimm.h"
+#include "sysemu/tpm.h"
static void fdt_add_rtc_node(LoongArchMachineState *lams)
{
@@ -993,6 +994,9 @@ static void loongarch_class_init(ObjectClass *oc, void *data)
object_class_property_set_description(oc, "acpi",
"Enable ACPI");
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
+#ifdef CONFIG_TPM
+ machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
+#endif
}
static const TypeInfo loongarch_machine_types[] = {
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB
2022-10-21 3:54 ` [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB Xiaojuan Yang
@ 2022-10-27 2:53 ` maobibo
0 siblings, 0 replies; 5+ messages in thread
From: maobibo @ 2022-10-27 2:53 UTC (permalink / raw)
To: Xiaojuan Yang, qemu-devel; +Cc: richard.henderson, gaosong, f4bug, philmd
Xiaojuan,
can you modify the tile like "Load FDT table into dram memory space"
rather than "change base addr to 2MiB" ?
regards
bibo,mao
在 2022/10/21 11:54, Xiaojuan Yang 写道:
> Change FDT base addr to 2 MiB in lowmem region. Since lowmem
> region starts from 0, FDT base address is located at 2 MiB to
> avoid NULL pointer access.
>
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
> hw/loongarch/virt.c | 18 +++++++++++-------
> include/hw/loongarch/virt.h | 3 ---
> 2 files changed, 11 insertions(+), 10 deletions(-)
>
> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
> index 29df99727d..fe33e7e3e4 100644
> --- a/hw/loongarch/virt.c
> +++ b/hw/loongarch/virt.c
> @@ -159,7 +159,6 @@ static void fdt_add_pcie_node(const LoongArchMachineState *lams)
> 1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
> 2, base_mmio, 2, size_mmio);
> g_free(nodename);
> - qemu_fdt_dumpdtb(ms->fdt, lams->fdt_size);
> }
>
> static void fdt_add_irqchip_node(LoongArchMachineState *lams)
> @@ -689,6 +688,7 @@ static void loongarch_init(MachineState *machine)
> MemoryRegion *address_space_mem = get_system_memory();
> LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
> int i;
> + hwaddr fdt_base;
>
> if (!cpu_model) {
> cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
> @@ -793,12 +793,16 @@ static void loongarch_init(MachineState *machine)
> lams->machine_done.notify = virt_machine_done;
> qemu_add_machine_init_done_notifier(&lams->machine_done);
> fdt_add_pcie_node(lams);
> -
> - /* load fdt */
> - MemoryRegion *fdt_rom = g_new(MemoryRegion, 1);
> - memory_region_init_rom(fdt_rom, NULL, "fdt", VIRT_FDT_SIZE, &error_fatal);
> - memory_region_add_subregion(get_system_memory(), VIRT_FDT_BASE, fdt_rom);
> - rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, VIRT_FDT_BASE);
> + /*
> + * Since lowmem region starts from 0, FDT base address is located
> + * at 2 MiB to avoid NULL pointer access.
> + *
> + * Put the FDT into the memory map as a ROM image: this will ensure
> + * the FDT is copied again upon reset, even if addr points into RAM.
> + */
> + fdt_base = 2 * MiB;
> + qemu_fdt_dumpdtb(machine->fdt, lams->fdt_size);
> + rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, fdt_base);
> }
>
> bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
> diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
> index 09f1c88ee5..45c383f5a7 100644
> --- a/include/hw/loongarch/virt.h
> +++ b/include/hw/loongarch/virt.h
> @@ -28,9 +28,6 @@
> #define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
> #define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
>
> -#define VIRT_FDT_BASE 0x1c400000
> -#define VIRT_FDT_SIZE 0x100000
> -
> struct LoongArchMachineState {
> /*< private >*/
> MachineState parent_obj;
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-10-27 2:57 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-21 3:54 [PATCH v1 0/3] Improve FDT and support TPM for LoongArch Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 1/3] hw/loongarch: Change FDT base addr to 2 MiB Xiaojuan Yang
2022-10-27 2:53 ` maobibo
2022-10-21 3:54 ` [PATCH v1 2/3] hw/loongarch: Improve fdt for LoongArch virt machine Xiaojuan Yang
2022-10-21 3:54 ` [PATCH v1 3/3] hw/loongarch: Add TPM device " Xiaojuan Yang
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