All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 19/36] tcg: Use TCG_CALL_ARG_EVEN for TCI special case
Date: Fri, 21 Oct 2022 17:15:32 +1000	[thread overview]
Message-ID: <20221021071549.2398137-20-richard.henderson@linaro.org> (raw)
In-Reply-To: <20221021071549.2398137-1-richard.henderson@linaro.org>

Change 32-bit tci TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EVEN, to
force 32-bit values to be aligned to 64-bit.  With a small reorg
to the argument processing loop, this neatly replaces an ifdef for
CONFIG_TCG_INTERPRETER.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tci/tcg-target.h |  3 ++-
 tcg/tcg.c            | 62 ++++++++++++++++++++++++++------------------
 2 files changed, 39 insertions(+), 26 deletions(-)

diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index d6e0450ed8..94ec541b4e 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -158,10 +158,11 @@ typedef enum {
 /* Used for function call generation. */
 #define TCG_TARGET_CALL_STACK_OFFSET    0
 #define TCG_TARGET_STACK_ALIGN          8
-#define TCG_TARGET_CALL_ARG_I32         TCG_CALL_ARG_NORMAL
 #if TCG_TARGET_REG_BITS == 32
+# define TCG_TARGET_CALL_ARG_I32        TCG_CALL_ARG_EVEN
 # define TCG_TARGET_CALL_ARG_I64        TCG_CALL_ARG_EVEN
 #else
+# define TCG_TARGET_CALL_ARG_I32        TCG_CALL_ARG_NORMAL
 # define TCG_TARGET_CALL_ARG_I64        TCG_CALL_ARG_NORMAL
 #endif
 
diff --git a/tcg/tcg.c b/tcg/tcg.c
index d4960c62b5..e0f5c6ea7b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1532,36 +1532,48 @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args)
     real_args = 0;
     for (i = 0; i < nargs; i++) {
         int argtype = extract32(typemask, (i + 1) * 3, 3);
-        bool is_64bit = (argtype & ~1) == dh_typecode_i64;
-        bool want_align = false;
+        TCGCallArgumentKind kind;
+        TCGType type;
 
-#if defined(CONFIG_TCG_INTERPRETER)
-        /*
-         * Align all arguments, so that they land in predictable places
-         * for passing off to ffi_call.
-         */
-        want_align = true;
-#else
-        /* Some targets want aligned 64 bit args */
-        if (is_64bit) {
-            want_align = TCG_TARGET_CALL_ARG_I64 == TCG_CALL_ARG_EVEN;
-        }
-#endif
-
-        if (TCG_TARGET_REG_BITS < 64 && want_align && (real_args & 1)) {
-            op->args[pi++] = TCG_CALL_DUMMY_ARG;
-            real_args++;
+        switch (argtype) {
+        case dh_typecode_i32:
+        case dh_typecode_s32:
+            type = TCG_TYPE_I32;
+            kind = TCG_TARGET_CALL_ARG_I32;
+            break;
+        case dh_typecode_i64:
+        case dh_typecode_s64:
+            type = TCG_TYPE_I64;
+            kind = TCG_TARGET_CALL_ARG_I64;
+            break;
+        case dh_typecode_ptr:
+            type = TCG_TYPE_PTR;
+            kind = TCG_CALL_ARG_NORMAL;
+            break;
+        default:
+            g_assert_not_reached();
         }
 
-        if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
+        switch (kind) {
+        case TCG_CALL_ARG_EVEN:
+            if (real_args & 1) {
+                op->args[pi++] = TCG_CALL_DUMMY_ARG;
+                real_args++;
+            }
+            /* fall through */
+        case TCG_CALL_ARG_NORMAL:
+            if (TCG_TARGET_REG_BITS == 32 && type == TCG_TYPE_I64) {
+                op->args[pi++] = temp_arg(args[i]);
+                op->args[pi++] = temp_arg(args[i] + 1);
+                real_args += 2;
+                break;
+            }
             op->args[pi++] = temp_arg(args[i]);
-            op->args[pi++] = temp_arg(args[i] + 1);
-            real_args += 2;
-            continue;
+            real_args++;
+            break;
+        default:
+            g_assert_not_reached();
         }
-
-        op->args[pi++] = temp_arg(args[i]);
-        real_args++;
     }
     op->args[pi++] = (uintptr_t)func;
     op->args[pi++] = (uintptr_t)info;
-- 
2.34.1



  parent reply	other threads:[~2022-10-21  9:17 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-21  7:15 [PATCH v2 00/36] tcg: Support for Int128 with helpers Richard Henderson
2022-10-21  7:15 ` [PATCH v2 01/36] include/qemu/atomic128: Support 16-byte atomic read/write for Intel AVX Richard Henderson
2022-10-21  7:15 ` [PATCH v2 02/36] tcg: Tidy tcg_reg_alloc_op Richard Henderson
2022-10-25 15:26   ` Philippe Mathieu-Daudé
2022-10-21  7:15 ` [PATCH v2 03/36] tcg: Introduce paired register allocation Richard Henderson
2022-10-21  7:15 ` [PATCH v2 04/36] tcg/s390x: Use register pair allocation for div and mulu2 Richard Henderson
2022-10-21  7:15 ` [PATCH v2 05/36] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64 Richard Henderson
2022-10-21  7:15 ` [PATCH v2 06/36] meson: Move CONFIG_TCG_INTERPRETER to config_host Richard Henderson
2022-10-21  7:15 ` [PATCH v2 07/36] tcg: Remove TCG_TARGET_STACK_GROWSUP Richard Henderson
2022-10-21  7:15 ` [PATCH v2 08/36] accel/tcg: Set cflags_next_tb in cpu_common_initfn Richard Henderson
2022-10-21  7:15 ` [PATCH v2 09/36] target/sparc: Avoid TCGV_{LOW,HIGH} Richard Henderson
2022-10-21  7:15 ` [PATCH v2 10/36] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h Richard Henderson
2022-10-21  7:15 ` [PATCH v2 11/36] tcg: Add temp_subindex to TCGTemp Richard Henderson
2022-10-21  7:15 ` [PATCH v2 12/36] tcg: Simplify calls to temp_sync vs mem_coherent Richard Henderson
2022-10-21  7:15 ` [PATCH v2 13/36] tcg: Allocate TCGTemp pairs in host memory order Richard Henderson
2022-10-21  7:15 ` [PATCH v2 14/36] tcg: Move TCG_TYPE_COUNT outside enum Richard Henderson
2022-10-21  7:15 ` [PATCH v2 15/36] tcg: Introduce tcg_type_size Richard Henderson
2022-10-21  7:15 ` [PATCH v2 16/36] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Richard Henderson
2022-10-21  7:15 ` [PATCH v2 17/36] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Richard Henderson
2022-10-21 10:28   ` Philippe Mathieu-Daudé
2022-10-21  7:15 ` [PATCH v2 18/36] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Richard Henderson
2022-10-21 10:33   ` Philippe Mathieu-Daudé
2022-10-21  7:15 ` Richard Henderson [this message]
2022-10-25 20:14   ` [PATCH v2 19/36] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Ilya Leoshkevich
2022-10-21  7:15 ` [PATCH v2 20/36] tcg: Reorg function calls Richard Henderson
2022-10-21  7:15 ` [PATCH v2 21/36] tcg: Move ffi_cif pointer into TCGHelperInfo Richard Henderson
2022-10-21  7:15 ` [PATCH v2 22/36] tcg: Add TCGHelperInfo argument to tcg_out_call Richard Henderson
2022-10-21  7:15 ` [PATCH v2 23/36] tcg: Define TCG_TYPE_I128 and related helper macros Richard Henderson
2022-10-21  7:15 ` [PATCH v2 24/36] tcg: Add TCG_CALL_{RET,ARG}_NORMAL_4 Richard Henderson
2022-10-21  7:15 ` [PATCH v2 25/36] tcg: Allocate objects contiguously in temp_allocate_frame Richard Henderson
2022-10-21  7:15 ` [PATCH v2 26/36] tcg: Introduce tcg_out_addi_ptr Richard Henderson
2022-10-21  7:15 ` [PATCH v2 27/36] tcg: Add TCG_CALL_{RET,ARG}_BY_REF Richard Henderson
2022-10-21  7:15 ` [PATCH v2 28/36] tcg: Introduce tcg_target_call_oarg_reg Richard Henderson
2022-10-21  7:15 ` [PATCH v2 29/36] tcg: Add TCG_CALL_RET_BY_VEC Richard Henderson
2022-10-21  7:15 ` [PATCH v2 30/36] include/qemu/int128: Use Int128 structure for TCI Richard Henderson
2022-10-21  7:15 ` [PATCH v2 31/36] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-10-21  7:15 ` [PATCH v2 32/36] tcg/tci: Fix big-endian return register ordering Richard Henderson
2022-10-21  7:15 ` [PATCH v2 33/36] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-10-21 10:47   ` Philippe Mathieu-Daudé
2022-10-22  3:48     ` Richard Henderson
2022-10-21  7:15 ` [PATCH v2 34/36] tcg: " Richard Henderson
2022-10-21  7:15 ` [PATCH v2 35/36] tcg: Add temp allocation for TCGv_i128 Richard Henderson
2022-10-21  7:15 ` [PATCH v2 36/36] tcg: Add tcg_gen_extr_i128_i64, tcg_gen_concat_i64_i128 Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221021071549.2398137-20-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.