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From: Davidlohr Bueso <dave@stgolabs.net>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ira Weiny <ira.weiny@intel.com>,
	dan.j.williams@intel.com, dave.jiang@intel.com,
	alison.schofield@intel.com, bwidawsk@kernel.org,
	vishal.l.verma@intel.com, a.manzanares@samsung.com,
	linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] cxl/pci: Add generic MSI-X/MSI irq support
Date: Fri, 21 Oct 2022 08:58:18 -0700	[thread overview]
Message-ID: <20221021155818.rxp6e3x4lid7eume@offworld> (raw)
In-Reply-To: <20221021095818.00006ed1@huawei.com>

On Fri, 21 Oct 2022, Jonathan Cameron wrote:

>> FWIW I did this for the event stuff and did not find it so distasteful...  :-/
>>
>> However the information I am stashing in the cxlds is all interrupt
>> information.  So I think it is different from what I see in the CPMU stuff.
>
>Right now I'm just stashing the max interrupt number to squirt into a callback
>a few lines later. That feels like a hack to get around parsing the structures
>4 times.  If it's an acceptable hack then fair enough.
>
>>
>> > 2. The callback below to find those numbers
>> > 3. Registration of the cpmu devices.
>> >
>> > Reality is that it is cleaner to more or less ignore the infrastructure
>> > proposed in this patch.
>> >
>> > 1. Query how many CPMU devices there are. Whilst there stash the maximim
>> >    cpmu vector number in the cxlds.
>> > 2. Run a stub in this infrastructure that does max(irq, cxlds->irq_num);
>> > 3. Carry on as before.
>> >
>> > Thus destroying the point of this infrastructure for that usecase at least
>> > and leaving an extra bit of state in the cxl_dev_state that is just
>> > to squirt a value into the callback...
>>
>> I'm not sure I follow?  Do you mean this?
>>
>> static int cxl_cpmu_get_max_msgnum(struct cxl_dev_state *cxlds)
>> {
>>	return cxlds->cpmu_max_vector;
>> }
>
>Yup. That state is no relevance to the cxl_dev_state outside of this tiny
>block of code.  Hence I really don't like putting it in there.

Oh absolutely, this is ugly as sin. And if there is anything even worth stashing
the max would only be mbox, as Ira suggested earlier in v1, iirc. So no,
we should not be doing this sort of thing. And if pass one were done in the
callback the need for this would disappear.

>>
>> >
>> > So with that in mind I'm withdrawing the RB above.  This looks to be
>> > an idea that with hindsight doesn't necessarily pan out.
>> > Long hand equivalent with the specific handling needed for each case
>> > is probably going to be neater than walking a table of much more
>> > restricted callbacks.
>>
>> I'm not married to the idea of the array of callbacks but I'm not sure how this
>> solves having to iterate on the CPMU devices twice?
>
>Laid that out in the other branch of the thread but basically either
>1) We stash irrelevant information in cxl_dev_state just to get it into the callback
>   It's not used for anything else and this makes a fiddly and non obvious tie
>   up between different registration steps that appear somewhat independent.

Yeah anything _but_ this.

>
>2) We do the whole double parse twice (so 4 times in total) which is the right
>   option to keep the layering if using this array of callbacks approach, but
>   really ugly.  If we flatten it to straight line code there is no implication
>   of layering and the state being parsed on is right there in a local variable.

If we are keeping this patch, then as mentioned before, I would prefer this. imo
this is better than both 1 above and the open-coding approach.

>I can live with it either way, but it's definitely not as pretty as it looks
>for the mailbox case.

Agreed.

Thanks,
Davidlohr

  reply	other threads:[~2022-10-21 16:20 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18  3:00 [PATCH v3 0/2] cxl: Add general MSI-X/MSI irq support Davidlohr Bueso
2022-10-18  3:00 ` [PATCH 1/2] cxl/pci: Add generic " Davidlohr Bueso
2022-10-18  9:36   ` Jonathan Cameron
2022-10-18 10:52     ` Jonathan Cameron
2022-10-20 22:31       ` Davidlohr Bueso
2022-10-21  4:18         ` Ira Weiny
2022-10-21  8:49           ` Jonathan Cameron
2022-10-21 16:20             ` Davidlohr Bueso
2022-10-21 21:05               ` Ira Weiny
2022-10-21  4:14       ` Ira Weiny
2022-10-21  8:58         ` Jonathan Cameron
2022-10-21 15:58           ` Davidlohr Bueso [this message]
2022-10-22 22:17           ` Dan Williams
2022-10-18 11:17   ` Jonathan Cameron
2022-10-22 22:05   ` Dan Williams
2022-10-24  0:09     ` Ira Weiny
2022-10-24  2:08       ` Dan Williams
2022-10-24 12:36         ` Jonathan Cameron
2022-10-25 23:25           ` Bjorn Helgaas
2022-10-30  8:38             ` Christoph Hellwig
2022-11-02 17:15             ` Davidlohr Bueso
2022-11-02 22:54               ` Bjorn Helgaas
2022-11-02 23:42               ` Ira Weiny
2022-11-03  0:18                 ` Davidlohr Bueso
2022-11-03 18:09                   ` Jonathan Cameron
2022-11-10  3:30                     ` Ira Weiny
2022-11-11 21:18                       ` Davidlohr Bueso
2022-11-03 18:08               ` Jonathan Cameron
2022-10-18  3:00 ` [PATCH 2/2] cxl/mbox: Wire up " Davidlohr Bueso
2022-10-18  9:38   ` Jonathan Cameron
2022-10-21 17:23     ` Davidlohr Bueso
2022-10-22 22:14       ` Dan Williams
2022-10-22 22:06   ` Dan Williams

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