All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Stuart Summers <stuart.summers@intel.com>,
	Alan Previn <alan.previn.teres.alexis@intel.com>,
	John Harrison <John.C.Harrison@Intel.com>,
	dri-devel@lists.freedesktop.org,
	Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Subject: [PATCH v3 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL
Date: Fri, 21 Oct 2022 17:10:05 -0700	[thread overview]
Message-ID: <20221022001008.2340224-5-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20221022001008.2340224-1-daniele.ceraolospurio@intel.com>

From: Stuart Summers <stuart.summers@intel.com>

MTL supports GuC deprivilege. Add the feature flag to this platform.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 496df0f547f4..05645984dd05 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1143,6 +1143,7 @@ static const struct intel_device_info mtl_info = {
 	.extra_gt_list = xelpmp_extra_gt,
 	.has_flat_ccs = 0,
 	.has_gmd_id = 1,
+	.has_guc_deprivilege = 1,
 	.has_mslice_steering = 0,
 	.has_snoop = 1,
 	.__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
-- 
2.37.3


WARNING: multiple messages have this Message-ID (diff)
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL
Date: Fri, 21 Oct 2022 17:10:05 -0700	[thread overview]
Message-ID: <20221022001008.2340224-5-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20221022001008.2340224-1-daniele.ceraolospurio@intel.com>

From: Stuart Summers <stuart.summers@intel.com>

MTL supports GuC deprivilege. Add the feature flag to this platform.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: John Harrison <john.c.harrison@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 496df0f547f4..05645984dd05 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1143,6 +1143,7 @@ static const struct intel_device_info mtl_info = {
 	.extra_gt_list = xelpmp_extra_gt,
 	.has_flat_ccs = 0,
 	.has_gmd_id = 1,
+	.has_guc_deprivilege = 1,
 	.has_mslice_steering = 0,
 	.has_snoop = 1,
 	.__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
-- 
2.37.3


  parent reply	other threads:[~2022-10-22  0:09 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-22  0:10 [PATCH v3 0/7] drm/i915: prepare for uC loading on MTL Daniele Ceraolo Spurio
2022-10-22  0:10 ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-22  0:10 ` [PATCH v3 1/7] drm/i915/huc: only load HuC on GTs that have VCS engines Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-22  0:10 ` [PATCH v3 2/7] drm/i915/uc: fetch uc firmwares for each GT Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-22  0:10 ` [PATCH v3 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-24 20:41   ` John Harrison
2022-10-24 20:41     ` [Intel-gfx] " John Harrison
2022-10-22  0:10 ` Daniele Ceraolo Spurio [this message]
2022-10-22  0:10   ` [Intel-gfx] [PATCH v3 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL Daniele Ceraolo Spurio
2022-10-22  0:10 ` [PATCH v3 5/7] drm/i915/mtl: Handle wopcm per-GT and limit calculations Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-24 21:33   ` John Harrison
2022-10-24 21:33     ` [Intel-gfx] " John Harrison
2022-10-24 21:39     ` Ceraolo Spurio, Daniele
2022-10-24 21:39       ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-10-24 21:46       ` John Harrison
2022-10-24 21:46         ` [Intel-gfx] " John Harrison
2022-10-24 22:10         ` Ceraolo Spurio, Daniele
2022-10-24 22:10           ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-10-24 22:26   ` [PATCH] " Daniele Ceraolo Spurio
2022-10-24 22:26     ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-26  1:33     ` John Harrison
2022-10-26  1:33       ` [Intel-gfx] " John Harrison
2022-10-22  0:10 ` [PATCH v3 6/7] drm/i915/guc: define media GT GuC send regs Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-22  0:10 ` [PATCH v3 7/7] drm/i915/guc: handle interrupts from media GuC Daniele Ceraolo Spurio
2022-10-22  0:10   ` [Intel-gfx] " Daniele Ceraolo Spurio
2022-10-24 20:28   ` Ceraolo Spurio, Daniele
2022-10-24 20:28     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-10-22  0:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL (rev3) Patchwork
2022-10-22  0:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-22  0:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-22 20:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-25  2:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL (rev4) Patchwork
2022-10-25  2:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-25  2:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-27  0:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL (rev5) Patchwork
2022-10-27  0:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-27  0:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-27 10:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-11-07 23:46 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: prepare for uC loading on MTL (rev6) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221022001008.2340224-5-daniele.ceraolospurio@intel.com \
    --to=daniele.ceraolospurio@intel.com \
    --cc=John.C.Harrison@Intel.com \
    --cc=alan.previn.teres.alexis@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=radhakrishna.sripada@intel.com \
    --cc=stuart.summers@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.