* [PATCH v2 0/6] MT6795 Devicetrees and Sony Xperia M5
@ 2022-10-27 9:54 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:54 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
This series brings some more support for the MT6795 SoC, as it
adds support for basic clock controllers (and resets) and all
of the mtk-sd mmc controllers.
While at it, since now it's possible to get the "first signs of
life" out of a MT6795 smartphone platform, add a basic devicetree
for the Sony Xperia M5 (codename "Holly") device as to start
preparing the ground for a gradual bringup.
This series depends on [1] my mt6795 clocks series.
P.S.: Thumbs up for the first MediaTek-powered ARM64 smartphone
going upstream! :-) :-) :-)
Changes in v2:
- Rebased over next-20221026
- Removed "mediatek,mt8173-mmc" from mmc compatible strings
- Added clock and reset dt-bindings headers inclusions
AngeloGioacchino Del Regno (6):
arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART
DMAs
arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
.../devicetree/bindings/arm/mediatek.yaml | 1 +
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 ++++++++++++++
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 109 +++++++++++++++++-
4 files changed, 195 insertions(+), 4 deletions(-)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH v2 1/6] arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:54 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:54 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add nodes for topckgen, infracfg and pericfg, providing various
clocks and resets and needed to support basic IPs of this SoC.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 46f0e54be766..1801cafd9c13 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -6,7 +6,9 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mediatek,mt6795-clk.h>
#include <dt-bindings/pinctrl/mt6795-pinfunc.h>
+#include <dt-bindings/reset/mediatek,mt6795-resets.h>
/ {
compatible = "mediatek,mt6795";
@@ -192,6 +194,26 @@ soc {
compatible = "simple-bus";
ranges;
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt6795-topckgen", "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt6795-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt6795-pericfg", "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
pio: pinctrl@10005000 {
compatible = "mediatek,mt6795-pinctrl";
reg = <0 0x10005000 0 0x1000>, <0 0x1000b000 0 0x1000>;
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 1/6] arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
@ 2022-10-27 9:54 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:54 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add nodes for topckgen, infracfg and pericfg, providing various
clocks and resets and needed to support basic IPs of this SoC.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 46f0e54be766..1801cafd9c13 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -6,7 +6,9 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/mediatek,mt6795-clk.h>
#include <dt-bindings/pinctrl/mt6795-pinfunc.h>
+#include <dt-bindings/reset/mediatek,mt6795-resets.h>
/ {
compatible = "mediatek,mt6795";
@@ -192,6 +194,26 @@ soc {
compatible = "simple-bus";
ranges;
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt6795-topckgen", "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt6795-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt6795-pericfg", "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
pio: pinctrl@10005000 {
compatible = "mediatek,mt6795-pinctrl";
reg = <0 0x10005000 0 0x1000>, <0 0x1000b000 0 0x1000>;
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 2/6] arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
The UART nodes had a dummy clock for early bringup, as it is
expected that these are left on by the bootloader: now that
the pericfg clock controller is supported, we can replace
them with the real clocks.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 1801cafd9c13..60a07410ff63 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -314,7 +314,8 @@ uart0: serial@11002000 {
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -323,7 +324,8 @@ uart1: serial@11003000 {
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -332,7 +334,8 @@ uart2: serial@11004000 {
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -341,7 +344,8 @@ uart3: serial@11005000 {
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+ clock-names = "baud", "bus";
status = "disabled";
};
};
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 2/6] arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
The UART nodes had a dummy clock for early bringup, as it is
expected that these are left on by the bootloader: now that
the pericfg clock controller is supported, we can replace
them with the real clocks.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 1801cafd9c13..60a07410ff63 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -314,7 +314,8 @@ uart0: serial@11002000 {
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -323,7 +324,8 @@ uart1: serial@11003000 {
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -332,7 +334,8 @@ uart2: serial@11004000 {
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -341,7 +344,8 @@ uart3: serial@11005000 {
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+ clock-names = "baud", "bus";
status = "disabled";
};
};
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 3/6] arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAs
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
This SoC has a DMA controller with tx/rx channels for all of the
UART controller IPs: add the apdma node and wire up the DMAs on
all controllers.
When one of the UART controllers is used as a serial console,
the DMA will be automatically ignored.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 34 ++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 60a07410ff63..39677eec388b 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -316,6 +316,8 @@ uart0: serial@11002000 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
clock-names = "baud", "bus";
+ dmas = <&apdma 0>, <&apdma 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -326,9 +328,37 @@ uart1: serial@11003000 {
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
clock-names = "baud", "bus";
+ dmas = <&apdma 2>, <&apdma 3>;
+ dma-names = "tx", "rx";
status = "disabled";
};
+ apdma: dma-controller@11000380 {
+ compatible = "mediatek,mt6795-uart-dma",
+ "mediatek,mt6577-uart-dma";
+ reg = <0 0x11000380 0 0x60>,
+ <0 0x11000400 0 0x60>,
+ <0 0x11000480 0 0x60>,
+ <0 0x11000500 0 0x60>,
+ <0 0x11000580 0 0x60>,
+ <0 0x11000600 0 0x60>,
+ <0 0x11000680 0 0x60>,
+ <0 0x11000700 0 0x60>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
+ dma-requests = <8>;
+ clocks = <&pericfg CLK_PERI_AP_DMA>;
+ clock-names = "apdma";
+ mediatek,dma-33bits;
+ #dma-cells = <1>;
+ };
+
uart2: serial@11004000 {
compatible = "mediatek,mt6795-uart",
"mediatek,mt6577-uart";
@@ -336,6 +366,8 @@ uart2: serial@11004000 {
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
clock-names = "baud", "bus";
+ dmas = <&apdma 4>, <&apdma 5>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -346,6 +378,8 @@ uart3: serial@11005000 {
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
clock-names = "baud", "bus";
+ dmas = <&apdma 6>, <&apdma 7>;
+ dma-names = "tx", "rx";
status = "disabled";
};
};
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 3/6] arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAs
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
This SoC has a DMA controller with tx/rx channels for all of the
UART controller IPs: add the apdma node and wire up the DMAs on
all controllers.
When one of the UART controllers is used as a serial console,
the DMA will be automatically ignored.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 34 ++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 60a07410ff63..39677eec388b 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -316,6 +316,8 @@ uart0: serial@11002000 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
clock-names = "baud", "bus";
+ dmas = <&apdma 0>, <&apdma 1>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -326,9 +328,37 @@ uart1: serial@11003000 {
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
clock-names = "baud", "bus";
+ dmas = <&apdma 2>, <&apdma 3>;
+ dma-names = "tx", "rx";
status = "disabled";
};
+ apdma: dma-controller@11000380 {
+ compatible = "mediatek,mt6795-uart-dma",
+ "mediatek,mt6577-uart-dma";
+ reg = <0 0x11000380 0 0x60>,
+ <0 0x11000400 0 0x60>,
+ <0 0x11000480 0 0x60>,
+ <0 0x11000500 0 0x60>,
+ <0 0x11000580 0 0x60>,
+ <0 0x11000600 0 0x60>,
+ <0 0x11000680 0 0x60>,
+ <0 0x11000700 0 0x60>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
+ dma-requests = <8>;
+ clocks = <&pericfg CLK_PERI_AP_DMA>;
+ clock-names = "apdma";
+ mediatek,dma-33bits;
+ #dma-cells = <1>;
+ };
+
uart2: serial@11004000 {
compatible = "mediatek,mt6795-uart",
"mediatek,mt6577-uart";
@@ -336,6 +366,8 @@ uart2: serial@11004000 {
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
clock-names = "baud", "bus";
+ dmas = <&apdma 4>, <&apdma 5>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -346,6 +378,8 @@ uart3: serial@11005000 {
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
clock-names = "baud", "bus";
+ dmas = <&apdma 6>, <&apdma 7>;
+ dma-names = "tx", "rx";
status = "disabled";
};
};
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 4/6] arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add the mmc nodes to support all of the four controllers, used for
eMMC, SD/MicroSD and SDIO storage.
All of these controller nodes are left disabled by default, as
usage is board dependent.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 41 ++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 39677eec388b..1564f2c127c4 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -382,5 +382,46 @@ uart3: serial@11005000 {
dma-names = "tx", "rx";
status = "disabled";
};
+
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11230000 0 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_0>,
+ <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
+ <&topckgen CLK_TOP_MSDC50_0_SEL>;
+ clock-names = "source", "hclk", "source_cg";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11240000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11240000 0 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_1>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc2: mmc@11250000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11250000 0 0x1000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_2>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc3: mmc@11260000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11260000 0 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_3>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
};
};
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 4/6] arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add the mmc nodes to support all of the four controllers, used for
eMMC, SD/MicroSD and SDIO storage.
All of these controller nodes are left disabled by default, as
usage is board dependent.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt6795.dtsi | 41 ++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 39677eec388b..1564f2c127c4 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -382,5 +382,46 @@ uart3: serial@11005000 {
dma-names = "tx", "rx";
status = "disabled";
};
+
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11230000 0 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_0>,
+ <&topckgen CLK_TOP_MSDC50_0_H_SEL>,
+ <&topckgen CLK_TOP_MSDC50_0_SEL>;
+ clock-names = "source", "hclk", "source_cg";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11240000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11240000 0 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_1>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc2: mmc@11250000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11250000 0 0x1000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_2>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
+
+ mmc3: mmc@11260000 {
+ compatible = "mediatek,mt6795-mmc";
+ reg = <0 0x11260000 0 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_MSDC30_3>,
+ <&topckgen CLK_TOP_AXI_SEL>;
+ clock-names = "source", "hclk";
+ status = "disabled";
+ };
};
};
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v2 5/6] dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add a compatible for the Sony Xperia M5 smartphone.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/arm/mediatek.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index d76ce4c3819d..49153d66796a 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -58,6 +58,7 @@ properties:
- items:
- enum:
- mediatek,mt6795-evb
+ - sony,xperia-m5
- const: mediatek,mt6795
- items:
- enum:
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 5/6] dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add a compatible for the Sony Xperia M5 smartphone.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
Documentation/devicetree/bindings/arm/mediatek.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
index d76ce4c3819d..49153d66796a 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml
@@ -58,6 +58,7 @@ properties:
- items:
- enum:
- mediatek,mt6795-evb
+ - sony,xperia-m5
- const: mediatek,mt6795
- items:
- enum:
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v2 5/6] dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
2022-10-27 9:55 ` AngeloGioacchino Del Regno
@ 2022-10-27 13:39 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-27 13:39 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, hsinyi, nfraprado,
allen-kh.cheng, sam.shih, andrew, sean.wang, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 27/10/2022 05:55, AngeloGioacchino Del Regno wrote:
> Add a compatible for the Sony Xperia M5 smartphone.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 5/6] dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
@ 2022-10-27 13:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 18+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-27 13:39 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, hsinyi, nfraprado,
allen-kh.cheng, sam.shih, andrew, sean.wang, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 27/10/2022 05:55, AngeloGioacchino Del Regno wrote:
> Add a compatible for the Sony Xperia M5 smartphone.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v2 6/6] arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add a basic support for the Sony Xperia M5 (codename "Holly")
smartphone, powered by a MediaTek Helio X10 SoC.
This achieves a console boot.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 +++++++++++++++++++
2 files changed, 89 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 04597ffc4286..179661c9cc1c 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6779-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-sony-xperia-m5.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
new file mode 100644
index 000000000000..d3415527d389
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022, Collabora Ltd
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+/dts-v1/;
+#include "mt6795.dtsi"
+
+/ {
+ model = "Sony Xperia M5";
+ compatible = "sony,xperia-m5", "mediatek,mt6795";
+ chassis-type = "handset";
+
+ aliases {
+ mmc0 = &mmc0;
+ mmc1 = &mmc1;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x1e800000>;
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 128 KiB reserved for ARM Trusted Firmware (BL31) */
+ bl31_secmon_reserved: secmon@43000000 {
+ reg = <0 0x43000000 0 0x30000>;
+ no-map;
+ };
+
+ /* preloader and bootloader regions cannot be touched */
+ preloader-region@44800000 {
+ reg = <0 0x44800000 0 0x100000>;
+ no-map;
+ };
+
+ bootloader-region@46000000 {
+ reg = <0 0x46000000 0 0x400000>;
+ no-map;
+ };
+ };
+};
+
+&pio {
+ uart0_pins: uart0-pins {
+ pins-rx {
+ pinmux = <PINMUX_GPIO113__FUNC_URXD0>;
+ bias-pull-up;
+ input-enable;
+ };
+ pins-tx {
+ pinmux = <PINMUX_GPIO114__FUNC_UTXD0>;
+ output-high;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ pins-rx {
+ pinmux = <PINMUX_GPIO31__FUNC_URXD2>;
+ bias-pull-up;
+ input-enable;
+ };
+ pins-tx {
+ pinmux = <PINMUX_GPIO32__FUNC_UTXD2>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+};
+
+&uart2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+};
--
2.37.2
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v2 6/6] arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
@ 2022-10-27 9:55 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 18+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-10-27 9:55 UTC (permalink / raw)
To: matthias.bgg
Cc: robh+dt, krzysztof.kozlowski+dt, angelogioacchino.delregno,
hsinyi, nfraprado, allen-kh.cheng, sam.shih, andrew, sean.wang,
devicetree, linux-kernel, linux-arm-kernel, linux-mediatek
Add a basic support for the Sony Xperia M5 (codename "Holly")
smartphone, powered by a MediaTek Helio X10 SoC.
This achieves a console boot.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/Makefile | 1 +
.../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 +++++++++++++++++++
2 files changed, 89 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 04597ffc4286..179661c9cc1c 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6779-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-sony-xperia-m5.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
new file mode 100644
index 000000000000..d3415527d389
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022, Collabora Ltd
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+/dts-v1/;
+#include "mt6795.dtsi"
+
+/ {
+ model = "Sony Xperia M5";
+ compatible = "sony,xperia-m5", "mediatek,mt6795";
+ chassis-type = "handset";
+
+ aliases {
+ mmc0 = &mmc0;
+ mmc1 = &mmc1;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0x1e800000>;
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 128 KiB reserved for ARM Trusted Firmware (BL31) */
+ bl31_secmon_reserved: secmon@43000000 {
+ reg = <0 0x43000000 0 0x30000>;
+ no-map;
+ };
+
+ /* preloader and bootloader regions cannot be touched */
+ preloader-region@44800000 {
+ reg = <0 0x44800000 0 0x100000>;
+ no-map;
+ };
+
+ bootloader-region@46000000 {
+ reg = <0 0x46000000 0 0x400000>;
+ no-map;
+ };
+ };
+};
+
+&pio {
+ uart0_pins: uart0-pins {
+ pins-rx {
+ pinmux = <PINMUX_GPIO113__FUNC_URXD0>;
+ bias-pull-up;
+ input-enable;
+ };
+ pins-tx {
+ pinmux = <PINMUX_GPIO114__FUNC_UTXD0>;
+ output-high;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ pins-rx {
+ pinmux = <PINMUX_GPIO31__FUNC_URXD2>;
+ bias-pull-up;
+ input-enable;
+ };
+ pins-tx {
+ pinmux = <PINMUX_GPIO32__FUNC_UTXD2>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+};
+
+&uart2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+};
--
2.37.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v2 0/6] MT6795 Devicetrees and Sony Xperia M5
2022-10-27 9:54 ` AngeloGioacchino Del Regno
@ 2022-11-21 12:23 ` Matthias Brugger
-1 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2022-11-21 12:23 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: robh+dt, krzysztof.kozlowski+dt, hsinyi, nfraprado,
allen-kh.cheng, sam.shih, andrew, sean.wang, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 27/10/2022 11:54, AngeloGioacchino Del Regno wrote:
> This series brings some more support for the MT6795 SoC, as it
> adds support for basic clock controllers (and resets) and all
> of the mtk-sd mmc controllers.
>
> While at it, since now it's possible to get the "first signs of
> life" out of a MT6795 smartphone platform, add a basic devicetree
> for the Sony Xperia M5 (codename "Holly") device as to start
> preparing the ground for a gradual bringup.
>
> This series depends on [1] my mt6795 clocks series.
>
> P.S.: Thumbs up for the first MediaTek-powered ARM64 smartphone
> going upstream! :-) :-) :-)
>
> Changes in v2:
> - Rebased over next-20221026
> - Removed "mediatek,mt8173-mmc" from mmc compatible strings
> - Added clock and reset dt-bindings headers inclusions
>
> AngeloGioacchino Del Regno (6):
> arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
> arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
> arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART
> DMAs
> arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
> dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
> arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
>
Whole series applied, thanks!
> .../devicetree/bindings/arm/mediatek.yaml | 1 +
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> .../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 ++++++++++++++
> arch/arm64/boot/dts/mediatek/mt6795.dtsi | 109 +++++++++++++++++-
> 4 files changed, 195 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v2 0/6] MT6795 Devicetrees and Sony Xperia M5
@ 2022-11-21 12:23 ` Matthias Brugger
0 siblings, 0 replies; 18+ messages in thread
From: Matthias Brugger @ 2022-11-21 12:23 UTC (permalink / raw)
To: AngeloGioacchino Del Regno
Cc: robh+dt, krzysztof.kozlowski+dt, hsinyi, nfraprado,
allen-kh.cheng, sam.shih, andrew, sean.wang, devicetree,
linux-kernel, linux-arm-kernel, linux-mediatek
On 27/10/2022 11:54, AngeloGioacchino Del Regno wrote:
> This series brings some more support for the MT6795 SoC, as it
> adds support for basic clock controllers (and resets) and all
> of the mtk-sd mmc controllers.
>
> While at it, since now it's possible to get the "first signs of
> life" out of a MT6795 smartphone platform, add a basic devicetree
> for the Sony Xperia M5 (codename "Holly") device as to start
> preparing the ground for a gradual bringup.
>
> This series depends on [1] my mt6795 clocks series.
>
> P.S.: Thumbs up for the first MediaTek-powered ARM64 smartphone
> going upstream! :-) :-) :-)
>
> Changes in v2:
> - Rebased over next-20221026
> - Removed "mediatek,mt8173-mmc" from mmc compatible strings
> - Added clock and reset dt-bindings headers inclusions
>
> AngeloGioacchino Del Regno (6):
> arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
> arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
> arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART
> DMAs
> arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
> dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
> arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
>
Whole series applied, thanks!
> .../devicetree/bindings/arm/mediatek.yaml | 1 +
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> .../dts/mediatek/mt6795-sony-xperia-m5.dts | 88 ++++++++++++++
> arch/arm64/boot/dts/mediatek/mt6795.dtsi | 109 +++++++++++++++++-
> 4 files changed, 195 insertions(+), 4 deletions(-)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
>
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