From: Maxime Chevallier <maxime.chevallier@bootlin.com> To: davem@davemloft.net, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn <andrew@lunn.ch>, Florian Fainelli <f.fainelli@gmail.com>, Heiner Kallweit <hkallweit1@gmail.com>, Russell King <linux@armlinux.org.uk>, linux-arm-kernel@lists.infradead.org, Vladimir Oltean <vladimir.oltean@nxp.com>, Luka Perkov <luka.perkov@sartura.hr>, Robert Marko <robert.marko@sartura.hr> Subject: [PATCH net-next v6 1/5] net: dt-bindings: Introduce the Qualcomm IPQESS Ethernet controller Date: Fri, 28 Oct 2022 17:49:20 +0200 [thread overview] Message-ID: <20221028154924.789116-2-maxime.chevallier@bootlin.com> (raw) In-Reply-To: <20221028154924.789116-1-maxime.chevallier@bootlin.com> Add the DT binding for the IPQESS Ethernet Controller. This is a simple controller, only requiring the phy-mode, interrupts, clocks, and possibly a MAC address setting. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- V5->V6: - Fixed the $id that used the wrong compatible - Force passing all the per-queue interrupts V4->V5: - Remove stray quotes arount the ref property - Rename the binding to match the compatible string V3->V4: - Fix a binding typo in the compatible string V2->V3: - Cleanup on reset and clock names V1->V2: - Fixed the example - Added reset and clocks - Removed generic ethernet attributes .../bindings/net/qcom,ipq4019-ess-edma.yaml | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml new file mode 100644 index 000000000000..4f34e0f7f35b --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq4019-ess-edma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ ESS EDMA Ethernet Controller + +maintainers: + - Maxime Chevallier <maxime.chevallier@bootlin.com> + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + const: qcom,ipq4019-ess-edma + + reg: + maxItems: 1 + + interrupts: + maxItems: 32 + description: One interrupt per tx and rx queue, the firts 16 are rx queues + and the last 16 are the tx queues + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - phy-mode + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq4019.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + gmac: ethernet@c080000 { + compatible = "qcom,ipq4019-ess-edma"; + reg = <0xc080000 0x8000>; + resets = <&gcc ESS_RESET>; + clocks = <&gcc GCC_ESS_CLK>; + interrupts = <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>; + + phy-mode = "internal"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + +... -- 2.37.3
WARNING: multiple messages have this Message-ID (diff)
From: Maxime Chevallier <maxime.chevallier@bootlin.com> To: davem@davemloft.net, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Maxime Chevallier <maxime.chevallier@bootlin.com>, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn <andrew@lunn.ch>, Florian Fainelli <f.fainelli@gmail.com>, Heiner Kallweit <hkallweit1@gmail.com>, Russell King <linux@armlinux.org.uk>, linux-arm-kernel@lists.infradead.org, Vladimir Oltean <vladimir.oltean@nxp.com>, Luka Perkov <luka.perkov@sartura.hr>, Robert Marko <robert.marko@sartura.hr> Subject: [PATCH net-next v6 1/5] net: dt-bindings: Introduce the Qualcomm IPQESS Ethernet controller Date: Fri, 28 Oct 2022 17:49:20 +0200 [thread overview] Message-ID: <20221028154924.789116-2-maxime.chevallier@bootlin.com> (raw) In-Reply-To: <20221028154924.789116-1-maxime.chevallier@bootlin.com> Add the DT binding for the IPQESS Ethernet Controller. This is a simple controller, only requiring the phy-mode, interrupts, clocks, and possibly a MAC address setting. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- V5->V6: - Fixed the $id that used the wrong compatible - Force passing all the per-queue interrupts V4->V5: - Remove stray quotes arount the ref property - Rename the binding to match the compatible string V3->V4: - Fix a binding typo in the compatible string V2->V3: - Cleanup on reset and clock names V1->V2: - Fixed the example - Added reset and clocks - Removed generic ethernet attributes .../bindings/net/qcom,ipq4019-ess-edma.yaml | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml new file mode 100644 index 000000000000..4f34e0f7f35b --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-ess-edma.yaml @@ -0,0 +1,94 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ipq4019-ess-edma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ ESS EDMA Ethernet Controller + +maintainers: + - Maxime Chevallier <maxime.chevallier@bootlin.com> + +allOf: + - $ref: ethernet-controller.yaml# + +properties: + compatible: + const: qcom,ipq4019-ess-edma + + reg: + maxItems: 1 + + interrupts: + maxItems: 32 + description: One interrupt per tx and rx queue, the firts 16 are rx queues + and the last 16 are the tx queues + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - resets + - phy-mode + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-ipq4019.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + gmac: ethernet@c080000 { + compatible = "qcom,ipq4019-ess-edma"; + reg = <0xc080000 0x8000>; + resets = <&gcc ESS_RESET>; + clocks = <&gcc GCC_ESS_CLK>; + interrupts = <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>; + + phy-mode = "internal"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + +... -- 2.37.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-10-28 15:49 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-10-28 15:49 [PATCH net-next v6 0/5] net: ipqess: introduce Qualcomm IPQESS driver Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier [this message] 2022-10-28 15:49 ` [PATCH net-next v6 1/5] net: dt-bindings: Introduce the Qualcomm IPQESS Ethernet controller Maxime Chevallier 2022-10-28 15:49 ` [PATCH net-next v6 2/5] net: ipqess: introduce the Qualcomm IPQESS driver Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier 2022-10-28 15:49 ` [PATCH net-next v6 3/5] net: dsa: add out-of-band tagging protocol Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier 2022-11-01 15:29 ` kernel test robot 2022-10-28 15:49 ` [PATCH net-next v6 4/5] net: ipqess: Add out-of-band DSA tagging support Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier 2022-10-28 15:49 ` [PATCH net-next v6 5/5] ARM: dts: qcom: ipq4019: Add description for the IPQESS Ethernet controller Maxime Chevallier 2022-10-28 15:49 ` Maxime Chevallier 2022-10-28 19:01 ` Krzysztof Kozlowski 2022-10-28 19:01 ` Krzysztof Kozlowski 2022-10-29 5:21 ` [PATCH net-next v6 0/5] net: ipqess: introduce Qualcomm IPQESS driver Jakub Kicinski 2022-10-29 5:21 ` Jakub Kicinski
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20221028154924.789116-2-maxime.chevallier@bootlin.com \ --to=maxime.chevallier@bootlin.com \ --cc=andrew@lunn.ch \ --cc=davem@davemloft.net \ --cc=devicetree@vger.kernel.org \ --cc=f.fainelli@gmail.com \ --cc=hkallweit1@gmail.com \ --cc=krzysztof.kozlowski@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@armlinux.org.uk \ --cc=luka.perkov@sartura.hr \ --cc=netdev@vger.kernel.org \ --cc=robert.marko@sartura.hr \ --cc=robh+dt@kernel.org \ --cc=thomas.petazzoni@bootlin.com \ --cc=vladimir.oltean@nxp.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.