* [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 11:49 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 11:49 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula, John Harrison, dri-devel, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 +++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
19 files changed, 116 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 1160723c9d2d..1eb7b66191b2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
{
struct drm_i915_gem_exec_fence __user *user_fences;
+ struct drm_device *drm = &eb->i915->drm;
u64 __user *user_values;
struct eb_fence *f;
u64 nfences;
@@ -2799,7 +2801,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(drm, "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2807,7 +2809,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(drm, "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2816,7 +2818,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2842,7 +2846,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(drm, "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2873,6 +2877,7 @@ static int add_fence_array(struct i915_execbuffer *eb)
struct drm_i915_gem_execbuffer2 *args = eb->args;
struct drm_i915_gem_exec_fence __user *user;
unsigned long num_fences = args->num_cliprects;
+ struct drm_device *drm = &eb->i915->drm;
struct eb_fence *f;
if (!(args->flags & I915_EXEC_FENCE_ARRAY))
@@ -2913,14 +2918,14 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(drm, "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(drm, "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3515,7 +3520,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..2af97d954fc4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,11 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal,
+ struct drm_i915_private *i915,
+ const char *name, const char *engine_name)
{
+ wal->i915 = i915;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, i915, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt->i915, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(&i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->i915, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, i915, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->i915, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..7e51e0219a5d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct drm_i915_private;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,8 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct drm_i915_private *i915;
+
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..3dd761a690d7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt->i915, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 11:49 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 11:49 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula, dri-devel
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 +++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
19 files changed, 116 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 1160723c9d2d..1eb7b66191b2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
{
struct drm_i915_gem_exec_fence __user *user_fences;
+ struct drm_device *drm = &eb->i915->drm;
u64 __user *user_values;
struct eb_fence *f;
u64 nfences;
@@ -2799,7 +2801,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(drm, "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2807,7 +2809,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(drm, "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2816,7 +2818,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2842,7 +2846,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(drm, "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2873,6 +2877,7 @@ static int add_fence_array(struct i915_execbuffer *eb)
struct drm_i915_gem_execbuffer2 *args = eb->args;
struct drm_i915_gem_exec_fence __user *user;
unsigned long num_fences = args->num_cliprects;
+ struct drm_device *drm = &eb->i915->drm;
struct eb_fence *f;
if (!(args->flags & I915_EXEC_FENCE_ARRAY))
@@ -2913,14 +2918,14 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(drm, "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(drm, "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3515,7 +3520,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..2af97d954fc4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,11 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal,
+ struct drm_i915_private *i915,
+ const char *name, const char *engine_name)
{
+ wal->i915 = i915;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, i915, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt->i915, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(&i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->i915, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, i915, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->i915, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..7e51e0219a5d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct drm_i915_private;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,8 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct drm_i915_private *i915;
+
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..3dd761a690d7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt->i915, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
@ 2022-11-08 12:01 ` Jani Nikula
-1 siblings, 0 replies; 24+ messages in thread
From: Jani Nikula @ 2022-11-08 12:01 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: John Harrison, dri-devel, Tvrtko Ursulin
On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 116 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..1eb7b66191b2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
> {
> struct drm_i915_gem_exec_fence __user *user_fences;
> + struct drm_device *drm = &eb->i915->drm;
Elsewhere we've been pretty strict about not adding struct drm_device as
a local variable, just struct drm_i915_private *i915. We don't want to
have both, and in general it's more likely i915 is needed than
drm_device, if not now then in the future. Even if it means having to
use &i915->drm here.
BR,
Jani.
> u64 __user *user_values;
> struct eb_fence *f;
> u64 nfences;
> @@ -2799,7 +2801,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(drm, "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(drm, "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2818,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2846,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(drm, "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2873,6 +2877,7 @@ static int add_fence_array(struct i915_execbuffer *eb)
> struct drm_i915_gem_execbuffer2 *args = eb->args;
> struct drm_i915_gem_exec_fence __user *user;
> unsigned long num_fences = args->num_cliprects;
> + struct drm_device *drm = &eb->i915->drm;
> struct eb_fence *f;
>
> if (!(args->flags & I915_EXEC_FENCE_ARRAY))
> @@ -2913,14 +2918,14 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(drm, "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(drm, "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3520,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 12:01 ` Jani Nikula
0 siblings, 0 replies; 24+ messages in thread
From: Jani Nikula @ 2022-11-08 12:01 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: dri-devel
On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 116 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..1eb7b66191b2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
> {
> struct drm_i915_gem_exec_fence __user *user_fences;
> + struct drm_device *drm = &eb->i915->drm;
Elsewhere we've been pretty strict about not adding struct drm_device as
a local variable, just struct drm_i915_private *i915. We don't want to
have both, and in general it's more likely i915 is needed than
drm_device, if not now then in the future. Even if it means having to
use &i915->drm here.
BR,
Jani.
> u64 __user *user_values;
> struct eb_fence *f;
> u64 nfences;
> @@ -2799,7 +2801,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(drm, "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(drm, "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2818,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2846,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(drm, "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2873,6 +2877,7 @@ static int add_fence_array(struct i915_execbuffer *eb)
> struct drm_i915_gem_execbuffer2 *args = eb->args;
> struct drm_i915_gem_exec_fence __user *user;
> unsigned long num_fences = args->num_cliprects;
> + struct drm_device *drm = &eb->i915->drm;
> struct eb_fence *f;
>
> if (!(args->flags & I915_EXEC_FENCE_ARRAY))
> @@ -2913,14 +2918,14 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(drm, "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(drm, "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3520,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
(?)
(?)
@ 2022-11-08 12:05 ` Ville Syrjälä
-1 siblings, 0 replies; 24+ messages in thread
From: Ville Syrjälä @ 2022-11-08 12:05 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: Jani Nikula, Intel-gfx, dri-devel
> @@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
> {
> struct drm_i915_gem_exec_fence __user *user_fences;
> + struct drm_device *drm = &eb->i915->drm;
We've said a firm "no" to drm_device pointers in display code at
least. If we want a local device pointer we always make it a 'i915'.
Otherwise you end up with annoying aliases all over the place.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 12:01 ` [Intel-gfx] " Jani Nikula
@ 2022-11-08 12:05 ` Tvrtko Ursulin
-1 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 12:05 UTC (permalink / raw)
To: Jani Nikula, Intel-gfx; +Cc: John Harrison, dri-devel, Tvrtko Ursulin
On 08/11/2022 12:01, Jani Nikula wrote:
> On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Convert some usages of legacy DRM logging macros into versions which tell
>> us on which device have the events occurred.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
>> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
>> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
>> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
>> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
>> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
>> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
>> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
>> drivers/gpu/drm/i915/i915_gem.c | 2 +-
>> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
>> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
>> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
>> drivers/gpu/drm/i915/i915_query.c | 12 +++---
>> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
>> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
>> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
>> 19 files changed, 116 insertions(+), 81 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> index 01402f3c58f6..7f2831efc798 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
>> }
>>
>> if (intel_engine_uses_guc(master)) {
>> - DRM_DEBUG("bonding extension not supported with GuC submission");
>> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
>> return -ENODEV;
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> index 1160723c9d2d..1eb7b66191b2 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
>> return err;
>> }
>>
>> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
>> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
>> + struct drm_i915_gem_execbuffer2 *exec)
>> {
>> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
>> return -EINVAL;
>> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
>> }
>>
>> if (exec->DR4 == 0xffffffff) {
>> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
>> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
>> exec->DR4 = 0;
>> }
>> if (exec->DR1 || exec->DR4)
>> @@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>> const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
>> {
>> struct drm_i915_gem_exec_fence __user *user_fences;
>> + struct drm_device *drm = &eb->i915->drm;
>
> Elsewhere we've been pretty strict about not adding struct drm_device as
> a local variable, just struct drm_i915_private *i915. We don't want to
> have both, and in general it's more likely i915 is needed than
> drm_device, if not now then in the future. Even if it means having to
> use &i915->drm here.
Yeah it smelled bad while I was typing it.. will change.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 12:05 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 12:05 UTC (permalink / raw)
To: Jani Nikula, Intel-gfx; +Cc: dri-devel
On 08/11/2022 12:01, Jani Nikula wrote:
> On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Convert some usages of legacy DRM logging macros into versions which tell
>> us on which device have the events occurred.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
>> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 23 ++++++----
>> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
>> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
>> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
>> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
>> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
>> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
>> drivers/gpu/drm/i915/i915_gem.c | 2 +-
>> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
>> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
>> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
>> drivers/gpu/drm/i915/i915_query.c | 12 +++---
>> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
>> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
>> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
>> 19 files changed, 116 insertions(+), 81 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> index 01402f3c58f6..7f2831efc798 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
>> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
>> }
>>
>> if (intel_engine_uses_guc(master)) {
>> - DRM_DEBUG("bonding extension not supported with GuC submission");
>> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
>> return -ENODEV;
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> index 1160723c9d2d..1eb7b66191b2 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
>> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
>> return err;
>> }
>>
>> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
>> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
>> + struct drm_i915_gem_execbuffer2 *exec)
>> {
>> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
>> return -EINVAL;
>> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
>> }
>>
>> if (exec->DR4 == 0xffffffff) {
>> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
>> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
>> exec->DR4 = 0;
>> }
>> if (exec->DR1 || exec->DR4)
>> @@ -2744,6 +2745,7 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>> const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
>> {
>> struct drm_i915_gem_exec_fence __user *user_fences;
>> + struct drm_device *drm = &eb->i915->drm;
>
> Elsewhere we've been pretty strict about not adding struct drm_device as
> a local variable, just struct drm_i915_private *i915. We don't want to
> have both, and in general it's more likely i915 is needed than
> drm_device, if not now then in the future. Even if it means having to
> use &i915->drm here.
Yeah it smelled bad while I was typing it.. will change.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
@ 2022-11-08 12:26 ` Tvrtko Ursulin
-1 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 12:26 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula, John Harrison, dri-devel, Tvrtko Ursulin
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
v2:
* Don't have struct drm_device as local. (Jani, Ville)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 +++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
19 files changed, 119 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 1160723c9d2d..f65fd03f7cf2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(&eb->i915->drm,
+ "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..2af97d954fc4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,11 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal,
+ struct drm_i915_private *i915,
+ const char *name, const char *engine_name)
{
+ wal->i915 = i915;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, i915, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt->i915, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(&i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->i915, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, i915, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->i915, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..7e51e0219a5d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct drm_i915_private;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,8 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct drm_i915_private *i915;
+
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..3dd761a690d7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt->i915, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 12:26 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-08 12:26 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula, dri-devel
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
v2:
* Don't have struct drm_device as local. (Jani, Ville)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 +++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
19 files changed, 119 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 1160723c9d2d..f65fd03f7cf2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(&eb->i915->drm,
+ "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..2af97d954fc4 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,11 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal,
+ struct drm_i915_private *i915,
+ const char *name, const char *engine_name)
{
+ wal->i915 = i915;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, i915, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt->i915, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(&i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->i915, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, i915, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->i915, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..7e51e0219a5d 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct drm_i915_private;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,8 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct drm_i915_private *i915;
+
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..3dd761a690d7 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt->i915, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 12:26 ` [Intel-gfx] " Tvrtko Ursulin
@ 2022-11-08 12:32 ` Jani Nikula
-1 siblings, 0 replies; 24+ messages in thread
From: Jani Nikula @ 2022-11-08 12:32 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: John Harrison, dri-devel, Tvrtko Ursulin
On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 119 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..f65fd03f7cf2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(&eb->i915->drm,
> + "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 12:32 ` Jani Nikula
0 siblings, 0 replies; 24+ messages in thread
From: Jani Nikula @ 2022-11-08 12:32 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: dri-devel
On Tue, 08 Nov 2022, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 119 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..f65fd03f7cf2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(&eb->i915->drm,
> + "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (3 preceding siblings ...)
(?)
@ 2022-11-08 12:42 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-08 12:42 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
URL : https://patchwork.freedesktop.org/series/110660/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (4 preceding siblings ...)
(?)
@ 2022-11-08 13:07 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-08 13:07 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7498 bytes --]
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
URL : https://patchwork.freedesktop.org/series/110660/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12354 -> Patchwork_110660v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/index.html
Participating hosts (40 -> 38)
------------------------------
Additional (1): fi-tgl-dsi
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_110660v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_lmem_swapping@basic:
- fi-bdw-gvtdvm: NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-bdw-gvtdvm/igt@gem_lmem_swapping@basic.html
* igt@gem_render_tiled_blits@basic:
- fi-apl-guc: [PASS][2] -> [INCOMPLETE][3] ([i915#7056])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/fi-apl-guc/igt@gem_render_tiled_blits@basic.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-apl-guc/igt@gem_render_tiled_blits@basic.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [PASS][4] -> [INCOMPLETE][5] ([i915#4785])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@migrate:
- bat-adlp-4: [PASS][6] -> [INCOMPLETE][7] ([i915#7308] / [i915#7348])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/bat-adlp-4/igt@i915_selftest@live@migrate.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/bat-adlp-4/igt@i915_selftest@live@migrate.html
* igt@i915_suspend@basic-s2idle-without-i915:
- fi-bdw-gvtdvm: NOTRUN -> [INCOMPLETE][8] ([i915#146])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-bdw-gvtdvm/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-bdw-gvtdvm: NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +7 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-bdw-gvtdvm/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@runner@aborted:
- fi-hsw-4770: NOTRUN -> [FAIL][10] ([fdo#109271] / [i915#4312] / [i915#5594])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-hsw-4770/igt@runner@aborted.html
- bat-adlp-4: NOTRUN -> [FAIL][11] ([i915#4312])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/bat-adlp-4/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [FAIL][12] ([i915#7229]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
* igt@gem_exec_parallel@engines@contexts:
- fi-bdw-gvtdvm: [INCOMPLETE][14] -> [PASS][15]
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@contexts.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@contexts.html
* igt@gem_linear_blits@basic:
- fi-pnv-d510: [SKIP][16] ([fdo#109271]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/fi-pnv-d510/igt@gem_linear_blits@basic.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/fi-pnv-d510/igt@gem_linear_blits@basic.html
* igt@i915_selftest@live@migrate:
- {bat-adlp-6}: [INCOMPLETE][18] ([i915#7348]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/bat-adlp-6/igt@i915_selftest@live@migrate.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/bat-adlp-6/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@reset:
- {bat-rpls-2}: [DMESG-FAIL][20] ([i915#4983]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/bat-rpls-2/igt@i915_selftest@live@reset.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/bat-rpls-2/igt@i915_selftest@live@reset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434
[i915#6559]: https://gitlab.freedesktop.org/drm/intel/issues/6559
[i915#6856]: https://gitlab.freedesktop.org/drm/intel/issues/6856
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7056]: https://gitlab.freedesktop.org/drm/intel/issues/7056
[i915#7125]: https://gitlab.freedesktop.org/drm/intel/issues/7125
[i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
[i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308
[i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348
[i915#7355]: https://gitlab.freedesktop.org/drm/intel/issues/7355
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
Build changes
-------------
* Linux: CI_DRM_12354 -> Patchwork_110660v2
CI-20190529: 20190529
CI_DRM_12354: ee91a500e2dc4a8b28c9e90a81e70767e6630301 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7047: 9cea1d05f492429a6d793995b87081e87a94b492 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_110660v2: ee91a500e2dc4a8b28c9e90a81e70767e6630301 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
faabf5e67029 drm/i915: Partial abandonment of legacy DRM logging macros
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/index.html
[-- Attachment #2: Type: text/html, Size: 7336 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 12:26 ` [Intel-gfx] " Tvrtko Ursulin
(?)
(?)
@ 2022-11-08 15:15 ` Andrzej Hajda
-1 siblings, 0 replies; 24+ messages in thread
From: Andrzej Hajda @ 2022-11-08 15:15 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula, dri-devel
On 08.11.2022 13:26, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Nice work.
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Regards
Andrzej
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 119 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..f65fd03f7cf2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(&eb->i915->drm,
> + "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (5 preceding siblings ...)
(?)
@ 2022-11-08 17:50 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-08 17:50 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 38731 bytes --]
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev2)
URL : https://patchwork.freedesktop.org/series/110660/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12354_full -> Patchwork_110660v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_110660v2_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-snb: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [FAIL][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50]) ([i915#4338])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb6/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb6/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb6/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb6/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb5/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb5/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb5/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb5/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb5/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb2/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb2/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb2/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb2/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb2/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb5/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb7/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb6/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb5/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb5/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb5/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_ccs@ctrl-surf-copy:
- shard-tglb: NOTRUN -> [SKIP][51] ([i915#3555] / [i915#5325])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@gem_ccs@ctrl-surf-copy.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-skl: NOTRUN -> [SKIP][52] ([fdo#109271]) +156 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_create@create-massive:
- shard-tglb: NOTRUN -> [DMESG-WARN][53] ([i915#4991])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@gem_create@create-massive.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-iclb: [PASS][54] -> [SKIP][55] ([i915#4525]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb1/igt@gem_exec_balancer@parallel-balancer.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb6/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][56] -> [FAIL][57] ([i915#2842])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-tglb: NOTRUN -> [FAIL][58] ([i915#2842])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-glk: [PASS][59] -> [FAIL][60] ([i915#2842])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-glk9/igt@gem_exec_fair@basic-none@vcs0.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-glk6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][61] -> [FAIL][62] ([i915#2842])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl6/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-iclb: [PASS][63] -> [FAIL][64] ([i915#2842])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb7/igt@gem_exec_fair@basic-pace@bcs0.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb3/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_lmem_swapping@heavy-random:
- shard-skl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#4613])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@parallel-multi:
- shard-tglb: NOTRUN -> [SKIP][66] ([i915#4613]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@gem_lmem_swapping@parallel-multi.html
* igt@gem_pread@exhaustion:
- shard-skl: NOTRUN -> [INCOMPLETE][67] ([i915#7248])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@gem_pread@exhaustion.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglb: NOTRUN -> [SKIP][68] ([i915#4270]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-tglb: NOTRUN -> [SKIP][69] ([i915#3323])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@input-checking:
- shard-skl: NOTRUN -> [DMESG-WARN][70] ([i915#4991])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl10/igt@gem_userptr_blits@input-checking.html
* igt@gem_userptr_blits@readonly-pwrite-unsync:
- shard-tglb: NOTRUN -> [SKIP][71] ([i915#3297]) +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@gem_userptr_blits@readonly-pwrite-unsync.html
* igt@gen9_exec_parse@shadow-peek:
- shard-tglb: NOTRUN -> [SKIP][72] ([i915#2527] / [i915#2856]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_pipe_stress@stress-xrgb8888-untiled:
- shard-skl: NOTRUN -> [FAIL][73] ([i915#7036])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl9/igt@i915_pipe_stress@stress-xrgb8888-untiled.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-tglb: NOTRUN -> [SKIP][74] ([i915#1904])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: NOTRUN -> [FAIL][75] ([i915#3989] / [i915#454])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl10/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- shard-tglb: NOTRUN -> [SKIP][76] ([fdo#111644] / [i915#1397] / [i915#2411])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [PASS][77] -> [FAIL][78] ([i915#6537])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl2/igt@i915_pm_rps@engine-order.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl1/igt@i915_pm_rps@engine-order.html
* igt@i915_query@test-query-geometry-subslices:
- shard-tglb: NOTRUN -> [SKIP][79] ([i915#5723])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@i915_query@test-query-geometry-subslices.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [PASS][80] -> [DMESG-FAIL][81] ([i915#5334])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl8/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-tglb: NOTRUN -> [SKIP][82] ([i915#1769])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-tglb: NOTRUN -> [SKIP][83] ([i915#5286]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][84] ([fdo#111614]) +2 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-glk: [PASS][85] -> [FAIL][86] ([i915#5138])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-glk1/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-glk9/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-tglb: NOTRUN -> [SKIP][87] ([fdo#111615]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#3886]) +10 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@kms_ccs@pipe-a-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][89] ([i915#3689] / [i915#3886])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][90] ([fdo#111615] / [i915#3689])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_ccs@pipe-c-bad-rotation-90-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-snb: NOTRUN -> [SKIP][91] ([fdo#109271]) +18 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][92] ([i915#3689] / [i915#6095]) +1 similar issue
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][93] ([i915#3689]) +5 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][94] ([i915#6095]) +3 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-snb: NOTRUN -> [SKIP][95] ([fdo#109271] / [fdo#111827])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb4/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-crc-multiple:
- shard-skl: NOTRUN -> [SKIP][96] ([fdo#109271] / [fdo#111827]) +5 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl9/igt@kms_chamelium@hdmi-crc-multiple.html
* igt@kms_color_chamelium@ctm-green-to-red:
- shard-tglb: NOTRUN -> [SKIP][97] ([fdo#109284] / [fdo#111827]) +3 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_color_chamelium@ctm-green-to-red.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglb: NOTRUN -> [SKIP][98] ([i915#3116] / [i915#3299]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_cursor_crc@cursor-offscreen-32x32:
- shard-tglb: NOTRUN -> [SKIP][99] ([i915#3555])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_cursor_crc@cursor-offscreen-32x32.html
* igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1:
- shard-skl: [PASS][100] -> [INCOMPLETE][101] ([i915#6951])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl9/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl1/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-tglb: NOTRUN -> [SKIP][102] ([fdo#109274] / [fdo#111825] / [i915#3637]) +1 similar issue
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][103] -> [FAIL][104] ([i915#79])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [PASS][105] -> [DMESG-WARN][106] ([i915#180]) +1 similar issue
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl6/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-fb-recreate@c-edp1:
- shard-skl: NOTRUN -> [FAIL][107] ([i915#2122])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][108] ([i915#2587] / [i915#2672]) +1 similar issue
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][109] ([i915#2587] / [i915#2672]) +1 similar issue
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][110] ([i915#2672]) +3 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][111] ([i915#3555])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][112] ([i915#6497]) +3 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-skl: [PASS][113] -> [DMESG-WARN][114] ([i915#1982])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][115] ([fdo#109280] / [fdo#111825]) +17 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite.html
* igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c:
- shard-tglb: NOTRUN -> [SKIP][116] ([fdo#109289]) +1 similar issue
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_pipe_b_c_ivb@pipe-b-dpms-off-modeset-pipe-c.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-b-edp-1:
- shard-skl: NOTRUN -> [FAIL][117] ([i915#4573]) +2 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl10/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-b-edp-1.html
* igt@kms_plane_lowres@tiling-4:
- shard-tglb: NOTRUN -> [SKIP][118] ([fdo#112054] / [i915#5288])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_plane_lowres@tiling-4.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-d-edp-1:
- shard-tglb: NOTRUN -> [SKIP][119] ([i915#5176]) +7 similar issues
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-d-edp-1.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-skl: NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#658])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-iclb: NOTRUN -> [SKIP][121] ([fdo#109642] / [fdo#111068] / [i915#658])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb3/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [PASS][122] -> [SKIP][123] ([fdo#109441]) +2 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb8/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@kms_psr@psr2_primary_render:
- shard-tglb: NOTRUN -> [FAIL][124] ([i915#132] / [i915#3467]) +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_psr@psr2_primary_render.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-tglb: [PASS][125] -> [SKIP][126] ([i915#5519])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-tglb7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-tglb: NOTRUN -> [SKIP][127] ([fdo#111615] / [i915#5289])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_vblank@pipe-b-accuracy-idle:
- shard-snb: [PASS][128] -> [SKIP][129] ([fdo#109271])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb4/igt@kms_vblank@pipe-b-accuracy-idle.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb5/igt@kms_vblank@pipe-b-accuracy-idle.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-skl: [PASS][130] -> [INCOMPLETE][131] ([i915#7404])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
* igt@kms_writeback@writeback-check-output:
- shard-tglb: NOTRUN -> [SKIP][132] ([i915#2437])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@kms_writeback@writeback-check-output.html
* igt@perf@blocking:
- shard-skl: [PASS][133] -> [FAIL][134] ([i915#1542])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl10/igt@perf@blocking.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl3/igt@perf@blocking.html
* igt@perf_pmu@interrupts:
- shard-skl: [PASS][135] -> [FAIL][136] ([i915#7318])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl4/igt@perf_pmu@interrupts.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl9/igt@perf_pmu@interrupts.html
* igt@prime_vgem@basic-userptr:
- shard-tglb: NOTRUN -> [SKIP][137] ([fdo#109295] / [i915#3301])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- shard-skl: NOTRUN -> ([FAIL][138], [FAIL][139]) ([i915#3002] / [i915#4312])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl10/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl3/igt@runner@aborted.html
* igt@syncobj_wait@multi-wait-for-submit-unsubmitted:
- shard-skl: NOTRUN -> [DMESG-WARN][140] ([i915#1982])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@syncobj_wait@multi-wait-for-submit-unsubmitted.html
* igt@sysfs_clients@fair-0:
- shard-skl: NOTRUN -> [SKIP][141] ([fdo#109271] / [i915#2994]) +1 similar issue
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl6/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@sema-50:
- shard-tglb: NOTRUN -> [SKIP][142] ([i915#2994]) +1 similar issue
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb7/igt@sysfs_clients@sema-50.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][143] ([i915#658]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb8/igt@feature_discovery@psr2.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [FAIL][145] ([i915#6268]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-tglb8/igt@gem_ctx_exec@basic-nohangcheck.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb6/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][147] ([i915#4525]) -> [PASS][148] +1 similar issue
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb3/igt@gem_exec_balancer@parallel-keep-in-fence.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb1/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-tglb: [FAIL][149] ([i915#2842]) -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-tglb5/igt@gem_exec_fair@basic-none-vip@rcs0.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-tglb6/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [FAIL][151] ([i915#2842]) -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-glk9/igt@gem_exec_fair@basic-none@vecs0.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-glk6/igt@gem_exec_fair@basic-none@vecs0.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [FAIL][153] ([i915#3989] / [i915#454]) -> [PASS][154]
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb5/igt@i915_pm_dc@dc6-psr.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
- shard-glk: [FAIL][155] ([i915#79]) -> [PASS][156]
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@c-dp1:
- shard-apl: [FAIL][157] ([i915#79]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl6/igt@kms_flip@flip-vs-expired-vblank@c-dp1.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl2/igt@kms_flip@flip-vs-expired-vblank@c-dp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [FAIL][159] ([i915#79]) -> [PASS][160]
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
- shard-skl: [FAIL][161] ([i915#2122]) -> [PASS][162]
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode:
- shard-iclb: [SKIP][163] ([i915#3555]) -> [PASS][164]
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-snb: [SKIP][165] ([fdo#109271]) -> [PASS][166]
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-snb7/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-snb2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_psr@psr2_sprite_blt:
- shard-iclb: [SKIP][167] ([fdo#109441]) -> [PASS][168] +2 similar issues
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb8/igt@kms_psr@psr2_sprite_blt.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
#### Warnings ####
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][169] ([i915#658]) -> [SKIP][170] ([i915#2920])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@runner@aborted:
- shard-apl: ([FAIL][171], [FAIL][172]) ([i915#3002] / [i915#4312]) -> ([FAIL][173], [FAIL][174], [FAIL][175], [FAIL][176]) ([i915#180] / [i915#3002] / [i915#4312])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl6/igt@runner@aborted.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12354/shard-apl2/igt@runner@aborted.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl7/igt@runner@aborted.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl3/igt@runner@aborted.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl6/igt@runner@aborted.html
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/shard-apl1/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1904]: https://gitlab.freedesktop.org/drm/intel/issues/1904
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4338]: https://gitlab.freedesktop.org/drm/intel/issues/4338
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6951]: https://gitlab.freedesktop.org/drm/intel/issues/6951
[i915#7036]: https://gitlab.freedesktop.org/drm/intel/issues/7036
[i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248
[i915#7318]: https://gitlab.freedesktop.org/drm/intel/issues/7318
[i915#7404]: https://gitlab.freedesktop.org/drm/intel/issues/7404
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12354 -> Patchwork_110660v2
CI-20190529: 20190529
CI_DRM_12354: ee91a500e2dc4a8b28c9e90a81e70767e6630301 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7047: 9cea1d05f492429a6d793995b87081e87a94b492 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_110660v2: ee91a500e2dc4a8b28c9e90a81e70767e6630301 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v2/index.html
[-- Attachment #2: Type: text/html, Size: 45327 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 12:26 ` [Intel-gfx] " Tvrtko Ursulin
@ 2022-11-08 19:53 ` John Harrison
-1 siblings, 0 replies; 24+ messages in thread
From: John Harrison @ 2022-11-08 19:53 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula, dri-devel, Tvrtko Ursulin
On 11/8/2022 04:26, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 119 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..f65fd03f7cf2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(&eb->i915->drm,
> + "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
It was already decided to convert these to use a GT specific printer. So
this patch is only half implemented.
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
Adding an i915 is wrong given that these are all supposed to be being
converted to GT specific prints. wa_init_start is always called with
access to a GT. So that is what should be saved for future message
output usage.
John.
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-08 19:53 ` John Harrison
0 siblings, 0 replies; 24+ messages in thread
From: John Harrison @ 2022-11-08 19:53 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula, dri-devel
On 11/8/2022 04:26, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 +++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 43 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 4 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 +++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 ++++---
> drivers/gpu/drm/i915/intel_uncore.c | 21 +++++----
> 19 files changed, 119 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 01402f3c58f6..7f2831efc798 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
> }
>
> if (intel_engine_uses_guc(master)) {
> - DRM_DEBUG("bonding extension not supported with GuC submission");
> + drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
> return -ENODEV;
> }
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 1160723c9d2d..f65fd03f7cf2 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -2148,7 +2148,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> return err;
> }
>
> -static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> +static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
> + struct drm_i915_gem_execbuffer2 *exec)
> {
> if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
> return -EINVAL;
> @@ -2161,7 +2162,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> }
>
> if (exec->DR4 == 0xffffffff) {
> - DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
> + drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
> exec->DR4 = 0;
> }
> if (exec->DR1 || exec->DR4)
> @@ -2799,7 +2800,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> @@ -2807,7 +2809,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
>
> if (!fence && user_fence.flags &&
> !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -2816,7 +2819,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> err = dma_fence_chain_find_seqno(&fence, point);
>
> if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
> - DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle missing requested point %llu\n",
> + point);
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return err;
> @@ -2842,7 +2847,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
> * 0) would break the timeline.
> */
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> - DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
> + drm_dbg(&eb->i915->drm,
> + "Trying to wait & signal the same timeline point.\n");
> dma_fence_put(fence);
> drm_syncobj_put(syncobj);
> return -EINVAL;
> @@ -2913,14 +2919,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
>
> syncobj = drm_syncobj_find(eb->file, user_fence.handle);
> if (!syncobj) {
> - DRM_DEBUG("Invalid syncobj handle provided\n");
> + drm_dbg(&eb->i915->drm,
> + "Invalid syncobj handle provided\n");
> return -ENOENT;
> }
>
> if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
> fence = drm_syncobj_fence_get(syncobj);
> if (!fence) {
> - DRM_DEBUG("Syncobj handle has no fence\n");
> + drm_dbg(&eb->i915->drm,
> + "Syncobj handle has no fence\n");
> drm_syncobj_put(syncobj);
> return -EINVAL;
> }
> @@ -3515,7 +3523,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
> }
>
> - err = i915_gem_check_execbuffer(args);
> + err = i915_gem_check_execbuffer(i915, args);
> if (err)
> return err;
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 0187bc72310d..d92512780467 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -3921,6 +3921,7 @@ static struct intel_context *
> execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> unsigned long flags)
> {
> + struct drm_i915_private *i915 = siblings[0]->i915;
> struct virtual_engine *ve;
> unsigned int n;
> int err;
> @@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> if (!ve)
> return ERR_PTR(-ENOMEM);
>
> - ve->base.i915 = siblings[0]->i915;
> + ve->base.i915 = i915;
> ve->base.gt = siblings[0]->gt;
> ve->base.uncore = siblings[0]->uncore;
> ve->base.id = -1;
> @@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
>
> GEM_BUG_ON(!is_power_of_2(sibling->mask));
> if (sibling->mask & ve->base.mask) {
> - DRM_DEBUG("duplicate %s entry in load balancer\n",
> - sibling->name);
> + drm_dbg(&i915->drm,
> + "duplicate %s entry in load balancer\n",
> + sibling->name);
It was already decided to convert these to use a GT specific printer. So
this patch is only half implemented.
> err = -EINVAL;
> goto err_put;
> }
> @@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
> */
> if (ve->base.class != OTHER_CLASS) {
> if (ve->base.class != sibling->class) {
> - DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
> - sibling->class, ve->base.class);
> + drm_dbg(&i915->drm,
> + "invalid mixing of engine class, sibling %d, already %d\n",
> + sibling->class, ve->base.class);
> err = -EINVAL;
> goto err_put;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index ea775e601686..995082d45cb2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
> if (obj->bit_17 == NULL) {
> obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
> if (obj->bit_17 == NULL) {
> - DRM_ERROR("Failed to allocate memory for bit 17 "
> - "record\n");
> + drm_err(&to_i915(obj->base.dev)->drm,
> + "Failed to allocate memory for bit 17 record\n");
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 8e914c4066ed..0ba7d6f36b28 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
>
> ret = i915_ppgtt_init_hw(gt);
> if (ret) {
> - DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
> + drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
> goto out;
> }
>
> @@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
> * some errors might have become stuck,
> * mask them.
> */
> - DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
> + drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> rmw_set(uncore, EMR, eir);
> intel_uncore_write(uncore, GEN2_IIR,
> I915_MASTER_ERROR_INTERRUPT);
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index b197f0e9794f..4c8ddd074b78 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
> !time_after32(local_clock() >> 10, timeout_ts));
>
> if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
> - DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> - bank, bit, ident);
> + drm_err(>->i915->drm,
> + "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
> + bank, bit, ident);
> return 0;
> }
>
> @@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
> GT_BSD_CS_ERROR_INTERRUPT |
> GT_CS_MASTER_ERROR_INTERRUPT))
> - DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
> + drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
> + gt_iir);
>
> if (gt_iir & GT_PARITY_ERROR(gt->i915))
> gen7_parity_error_irq_handler(gt, gt_iir);
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 6c34a83c24b3..effe60ac22cd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
>
> rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
> if (rgvswctl & MEMCTL_CMD_STS) {
> - DRM_DEBUG("gpu busy, RCS change rejected\n");
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "gpu busy, RCS change rejected\n");
> return -EBUSY; /* still busy with another command */
> }
>
> @@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
>
> if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
> - DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
> + drm_dbg(&rps_to_i915(rps)->drm,
> + "Command parser error, pm_iir 0x%08x\n", pm_iir);
> }
>
> void gen5_rps_irq_handler(struct intel_rps *rps)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3cdf5c24dbc5..2af97d954fc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -55,8 +55,11 @@
> * - Public functions to init or apply the given workaround type.
> */
>
> -static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
> +static void wa_init_start(struct i915_wa_list *wal,
> + struct drm_i915_private *i915,
> + const char *name, const char *engine_name)
> {
> + wal->i915 = i915;
> wal->name = name;
> wal->engine_name = engine_name;
> }
> @@ -80,13 +83,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
> if (!wal->count)
> return;
>
> - DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
> - wal->wa_count, wal->name, wal->engine_name);
> + drm_dbg(&wal->i915->drm, "Initialized %u %s workarounds on %s\n",
> + wal->wa_count, wal->name, wal->engine_name);
> }
>
> static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> {
> unsigned int addr = i915_mmio_reg_offset(wa->reg);
> + struct drm_i915_private *i915 = wal->i915;
> unsigned int start = 0, end = wal->count;
> const unsigned int grow = WA_LIST_CHUNK;
> struct i915_wa *wa_;
> @@ -99,7 +103,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
> GFP_KERNEL);
> if (!list) {
> - DRM_ERROR("No space for workaround init!\n");
> + drm_err(&i915->drm, "No space for workaround init!\n");
> return;
> }
>
> @@ -122,9 +126,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
> wa_ = &wal->list[mid];
>
> if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
> - DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> - i915_mmio_reg_offset(wa_->reg),
> - wa_->clr, wa_->set);
> + drm_err(&i915->drm,
> + "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
> + i915_mmio_reg_offset(wa_->reg),
> + wa_->clr, wa_->set);
>
> wa_->set &= ~wa->clr;
> }
> @@ -826,7 +831,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
> {
> struct drm_i915_private *i915 = engine->i915;
>
> - wa_init_start(wal, name, engine->name);
> + wa_init_start(wal, i915, name, engine->name);
>
> /* Applies to all engines */
> /*
> @@ -1676,7 +1681,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
> {
> struct i915_wa_list *wal = >->wa_list;
>
> - wa_init_start(wal, "GT", "global");
> + wa_init_start(wal, gt->i915, "GT", "global");
> gt_init_workarounds(gt, wal);
> wa_init_finish(wal);
> }
> @@ -1698,12 +1703,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
> }
>
> static bool
> -wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
> +wa_verify(struct drm_i915_private *i915, const struct i915_wa *wa, u32 cur,
> + const char *name, const char *from)
> {
> if ((cur ^ wa->set) & wa->read) {
> - DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> - name, from, i915_mmio_reg_offset(wa->reg),
> - cur, cur & wa->read, wa->set & wa->read);
> + drm_err(&i915->drm,
> + "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
> + name, from, i915_mmio_reg_offset(wa->reg),
> + cur, cur & wa->read, wa->set & wa->read);
>
> return false;
> }
> @@ -1749,7 +1756,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->i915, wa, val, wal->name, "application");
> }
> }
>
> @@ -1779,7 +1786,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->i915, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2134,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, i915, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3019,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->i915, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3200,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->i915, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..7e51e0219a5d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct drm_i915_private;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,8 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct drm_i915_private *i915;
> +
Adding an i915 is wrong given that these are all supposed to be being
converted to GT specific prints. wa_init_start is always called with
access to a GT. So that is what should be saved for future message
output usage.
John.
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..3dd761a690d7 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt->i915, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt->i915, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
@ 2022-11-09 10:46 ` Tvrtko Ursulin
-1 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-09 10:46 UTC (permalink / raw)
To: Intel-gfx
Cc: Tvrtko Ursulin, Jani Nikula, dri-devel, John Harrison, Andrzej Hajda
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
v2:
* Don't have struct drm_device as local. (Jani, Ville)
v3:
* Store gt, not i915, in workaround list. (John)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> # v2
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 ++++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 42 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 3 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 ++++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 +++----
drivers/gpu/drm/i915/intel_uncore.c | 21 ++++++----
19 files changed, 117 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 280ed90d5001..692b9d03d84b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2149,7 +2149,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2162,7 +2163,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2800,7 +2801,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2808,7 +2810,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2817,7 +2820,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2843,7 +2848,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(&eb->i915->drm,
+ "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2914,14 +2920,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3550,7 +3558,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..07bf115029a0 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,10 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal, struct intel_gt *gt,
+ const char *name, const char *engine_name)
{
+ wal->gt = gt;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +82,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->gt->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->gt->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +102,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +125,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +830,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, engine->gt, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1680,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1702,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct intel_gt *gt, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(>->i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1755,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->gt, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1785,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->gt, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2133,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, engine->gt, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3018,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->gt, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3199,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->gt, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..e14188120e66 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct intel_gt;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,7 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct intel_gt *gt;
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..711014bb53d9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] [PATCH v3] drm/i915: Partial abandonment of legacy DRM logging macros
@ 2022-11-09 10:46 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-09 10:46 UTC (permalink / raw)
To: Intel-gfx; +Cc: Jani Nikula, dri-devel, Andrzej Hajda
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Convert some usages of legacy DRM logging macros into versions which tell
us on which device have the events occurred.
v2:
* Don't have struct drm_device as local. (Jani, Ville)
v3:
* Store gt, not i915, in workaround list. (John)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> # v2
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 ++++++++----
.../drm/i915/gt/intel_execlists_submission.c | 13 +++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 42 +++++++++++--------
.../gpu/drm/i915/gt/intel_workarounds_types.h | 3 ++
.../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_getparam.c | 2 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +++---
drivers/gpu/drm/i915/i915_perf.c | 14 ++++---
drivers/gpu/drm/i915/i915_query.c | 12 +++---
drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 16 +++----
drivers/gpu/drm/i915/intel_uncore.c | 21 ++++++----
19 files changed, 117 insertions(+), 81 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 01402f3c58f6..7f2831efc798 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -546,7 +546,7 @@ set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
}
if (intel_engine_uses_guc(master)) {
- DRM_DEBUG("bonding extension not supported with GuC submission");
+ drm_dbg(&i915->drm, "bonding extension not supported with GuC submission");
return -ENODEV;
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 280ed90d5001..692b9d03d84b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2149,7 +2149,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
return err;
}
-static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
+static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
+ struct drm_i915_gem_execbuffer2 *exec)
{
if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
return -EINVAL;
@@ -2162,7 +2163,7 @@ static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
}
if (exec->DR4 == 0xffffffff) {
- DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
+ drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
exec->DR4 = 0;
}
if (exec->DR1 || exec->DR4)
@@ -2800,7 +2801,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
@@ -2808,7 +2810,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
if (!fence && user_fence.flags &&
!(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -2817,7 +2820,9 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
err = dma_fence_chain_find_seqno(&fence, point);
if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
- DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle missing requested point %llu\n",
+ point);
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return err;
@@ -2843,7 +2848,8 @@ add_timeline_fence_array(struct i915_execbuffer *eb,
* 0) would break the timeline.
*/
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
- DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
+ drm_dbg(&eb->i915->drm,
+ "Trying to wait & signal the same timeline point.\n");
dma_fence_put(fence);
drm_syncobj_put(syncobj);
return -EINVAL;
@@ -2914,14 +2920,16 @@ static int add_fence_array(struct i915_execbuffer *eb)
syncobj = drm_syncobj_find(eb->file, user_fence.handle);
if (!syncobj) {
- DRM_DEBUG("Invalid syncobj handle provided\n");
+ drm_dbg(&eb->i915->drm,
+ "Invalid syncobj handle provided\n");
return -ENOENT;
}
if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
fence = drm_syncobj_fence_get(syncobj);
if (!fence) {
- DRM_DEBUG("Syncobj handle has no fence\n");
+ drm_dbg(&eb->i915->drm,
+ "Syncobj handle has no fence\n");
drm_syncobj_put(syncobj);
return -EINVAL;
}
@@ -3550,7 +3558,7 @@ i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
}
- err = i915_gem_check_execbuffer(args);
+ err = i915_gem_check_execbuffer(i915, args);
if (err)
return err;
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 0187bc72310d..d92512780467 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -3921,6 +3921,7 @@ static struct intel_context *
execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
unsigned long flags)
{
+ struct drm_i915_private *i915 = siblings[0]->i915;
struct virtual_engine *ve;
unsigned int n;
int err;
@@ -3929,7 +3930,7 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
if (!ve)
return ERR_PTR(-ENOMEM);
- ve->base.i915 = siblings[0]->i915;
+ ve->base.i915 = i915;
ve->base.gt = siblings[0]->gt;
ve->base.uncore = siblings[0]->uncore;
ve->base.id = -1;
@@ -3988,8 +3989,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
GEM_BUG_ON(!is_power_of_2(sibling->mask));
if (sibling->mask & ve->base.mask) {
- DRM_DEBUG("duplicate %s entry in load balancer\n",
- sibling->name);
+ drm_dbg(&i915->drm,
+ "duplicate %s entry in load balancer\n",
+ sibling->name);
err = -EINVAL;
goto err_put;
}
@@ -4023,8 +4025,9 @@ execlists_create_virtual(struct intel_engine_cs **siblings, unsigned int count,
*/
if (ve->base.class != OTHER_CLASS) {
if (ve->base.class != sibling->class) {
- DRM_DEBUG("invalid mixing of engine class, sibling %d, already %d\n",
- sibling->class, ve->base.class);
+ drm_dbg(&i915->drm,
+ "invalid mixing of engine class, sibling %d, already %d\n",
+ sibling->class, ve->base.class);
err = -EINVAL;
goto err_put;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index ea775e601686..995082d45cb2 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -816,8 +816,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
if (obj->bit_17 == NULL) {
obj->bit_17 = bitmap_zalloc(page_count, GFP_KERNEL);
if (obj->bit_17 == NULL) {
- DRM_ERROR("Failed to allocate memory for bit 17 "
- "record\n");
+ drm_err(&to_i915(obj->base.dev)->drm,
+ "Failed to allocate memory for bit 17 record\n");
return;
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 8e914c4066ed..0ba7d6f36b28 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -190,7 +190,7 @@ int intel_gt_init_hw(struct intel_gt *gt)
ret = i915_ppgtt_init_hw(gt);
if (ret) {
- DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+ drm_err(&i915->drm, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
@@ -262,7 +262,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
* some errors might have become stuck,
* mask them.
*/
- DRM_DEBUG_DRIVER("EIR stuck: 0x%08x, masking\n", eir);
+ drm_dbg(>->i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
I915_MASTER_ERROR_INTERRUPT);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index b197f0e9794f..4c8ddd074b78 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -44,8 +44,9 @@ gen11_gt_engine_identity(struct intel_gt *gt,
!time_after32(local_clock() >> 10, timeout_ts));
if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) {
- DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
- bank, bit, ident);
+ drm_err(>->i915->drm,
+ "INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n",
+ bank, bit, ident);
return 0;
}
@@ -364,7 +365,8 @@ void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
GT_BSD_CS_ERROR_INTERRUPT |
GT_CS_MASTER_ERROR_INTERRUPT))
- DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
+ drm_dbg(>->i915->drm, "Command parser error, gt_iir 0x%08x\n",
+ gt_iir);
if (gt_iir & GT_PARITY_ERROR(gt->i915))
gen7_parity_error_irq_handler(gt, gt_iir);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 6c34a83c24b3..effe60ac22cd 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -430,7 +430,8 @@ static int __gen5_rps_set(struct intel_rps *rps, u8 val)
rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
if (rgvswctl & MEMCTL_CMD_STS) {
- DRM_DEBUG("gpu busy, RCS change rejected\n");
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "gpu busy, RCS change rejected\n");
return -EBUSY; /* still busy with another command */
}
@@ -1953,7 +1954,8 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
intel_engine_cs_irq(gt->engine[VECS0], pm_iir >> 10);
if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)
- DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);
+ drm_dbg(&rps_to_i915(rps)->drm,
+ "Command parser error, pm_iir 0x%08x\n", pm_iir);
}
void gen5_rps_irq_handler(struct intel_rps *rps)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3cdf5c24dbc5..07bf115029a0 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -55,8 +55,10 @@
* - Public functions to init or apply the given workaround type.
*/
-static void wa_init_start(struct i915_wa_list *wal, const char *name, const char *engine_name)
+static void wa_init_start(struct i915_wa_list *wal, struct intel_gt *gt,
+ const char *name, const char *engine_name)
{
+ wal->gt = gt;
wal->name = name;
wal->engine_name = engine_name;
}
@@ -80,13 +82,14 @@ static void wa_init_finish(struct i915_wa_list *wal)
if (!wal->count)
return;
- DRM_DEBUG_DRIVER("Initialized %u %s workarounds on %s\n",
- wal->wa_count, wal->name, wal->engine_name);
+ drm_dbg(&wal->gt->i915->drm, "Initialized %u %s workarounds on %s\n",
+ wal->wa_count, wal->name, wal->engine_name);
}
static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
{
unsigned int addr = i915_mmio_reg_offset(wa->reg);
+ struct drm_i915_private *i915 = wal->gt->i915;
unsigned int start = 0, end = wal->count;
const unsigned int grow = WA_LIST_CHUNK;
struct i915_wa *wa_;
@@ -99,7 +102,7 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
list = kmalloc_array(ALIGN(wal->count + 1, grow), sizeof(*wa),
GFP_KERNEL);
if (!list) {
- DRM_ERROR("No space for workaround init!\n");
+ drm_err(&i915->drm, "No space for workaround init!\n");
return;
}
@@ -122,9 +125,10 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
wa_ = &wal->list[mid];
if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) {
- DRM_ERROR("Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
- i915_mmio_reg_offset(wa_->reg),
- wa_->clr, wa_->set);
+ drm_err(&i915->drm,
+ "Discarding overwritten w/a for reg %04x (clear: %08x, set: %08x)\n",
+ i915_mmio_reg_offset(wa_->reg),
+ wa_->clr, wa_->set);
wa_->set &= ~wa->clr;
}
@@ -826,7 +830,7 @@ __intel_engine_init_ctx_wa(struct intel_engine_cs *engine,
{
struct drm_i915_private *i915 = engine->i915;
- wa_init_start(wal, name, engine->name);
+ wa_init_start(wal, engine->gt, name, engine->name);
/* Applies to all engines */
/*
@@ -1676,7 +1680,7 @@ void intel_gt_init_workarounds(struct intel_gt *gt)
{
struct i915_wa_list *wal = >->wa_list;
- wa_init_start(wal, "GT", "global");
+ wa_init_start(wal, gt, "GT", "global");
gt_init_workarounds(gt, wal);
wa_init_finish(wal);
}
@@ -1698,12 +1702,14 @@ wal_get_fw_for_rmw(struct intel_uncore *uncore, const struct i915_wa_list *wal)
}
static bool
-wa_verify(const struct i915_wa *wa, u32 cur, const char *name, const char *from)
+wa_verify(struct intel_gt *gt, const struct i915_wa *wa, u32 cur,
+ const char *name, const char *from)
{
if ((cur ^ wa->set) & wa->read) {
- DRM_ERROR("%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
- name, from, i915_mmio_reg_offset(wa->reg),
- cur, cur & wa->read, wa->set & wa->read);
+ drm_err(>->i915->drm,
+ "%s workaround lost on %s! (reg[%x]=0x%x, relevant bits were 0x%x vs expected 0x%x)\n",
+ name, from, i915_mmio_reg_offset(wa->reg),
+ cur, cur & wa->read, wa->set & wa->read);
return false;
}
@@ -1749,7 +1755,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg);
- wa_verify(wa, val, wal->name, "application");
+ wa_verify(wal->gt, wa, val, wal->name, "application");
}
}
@@ -1779,7 +1785,7 @@ static bool wa_list_verify(struct intel_gt *gt,
intel_uncore_forcewake_get__locked(uncore, fw);
for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
- ok &= wa_verify(wa, wa->is_mcr ?
+ ok &= wa_verify(wal->gt, wa, wa->is_mcr ?
intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
intel_uncore_read_fw(uncore, wa->reg),
wal->name, from);
@@ -2127,7 +2133,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
struct drm_i915_private *i915 = engine->i915;
struct i915_wa_list *w = &engine->whitelist;
- wa_init_start(w, "whitelist", engine->name);
+ wa_init_start(w, engine->gt, "whitelist", engine->name);
if (IS_PONTEVECCHIO(i915))
pvc_whitelist_build(engine);
@@ -3012,7 +3018,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
if (GRAPHICS_VER(engine->i915) < 4)
return;
- wa_init_start(wal, "engine", engine->name);
+ wa_init_start(wal, engine->gt, "engine", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
}
@@ -3193,7 +3199,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
continue;
- if (!wa_verify(wa, results[i], wal->name, from))
+ if (!wa_verify(wal->gt, wa, results[i], wal->name, from))
err = -ENXIO;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
index 7c8b01d00043..e14188120e66 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
@@ -10,6 +10,8 @@
#include "i915_reg_defs.h"
+struct intel_gt;
+
struct i915_wa {
union {
i915_reg_t reg;
@@ -24,6 +26,7 @@ struct i915_wa {
};
struct i915_wa_list {
+ struct intel_gt *gt;
const char *name;
const char *engine_name;
struct i915_wa *list;
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 21b1edc052f8..711014bb53d9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
memset(lists, 0, sizeof(*lists));
- wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
+ wa_init_start(&lists->gt_wa_list, gt, "GT_REF", "global");
gt_init_workarounds(gt, &lists->gt_wa_list);
wa_init_finish(&lists->gt_wa_list);
for_each_engine(engine, gt, id) {
struct i915_wa_list *wal = &lists->engine[id].wa_list;
- wa_init_start(wal, "REF", engine->name);
+ wa_init_start(wal, gt, "REF", engine->name);
engine_init_workarounds(engine, wal);
wa_init_finish(wal);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index ae987e92251d..6c7ac73b69a5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
unsigned int flags;
int ret;
- DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
- val, val & DROP_ALL);
+ drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
+ val, val & DROP_ALL);
ret = gt_drop_caches(to_gt(i915), val);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 299f94a9fb87..8132743ca87e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
struct i915_drm_client *client;
int ret = -ENOMEM;
- DRM_DEBUG("\n");
+ drm_dbg(&i915->drm, "\n");
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
if (!file_priv)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
index 3047e80e1163..61ef2d9cfa62 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
value = i915_perf_oa_timestamp_frequency(i915);
break;
default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
+ drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b0180ea38de0..6c20817f8967 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
KOBJ_CHANGE, parity_event);
- DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
- slice, row, bank, subbank);
+ drm_dbg(&dev_priv->drm,
+ "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
+ slice, row, bank, subbank);
kfree(parity_event[4]);
kfree(parity_event[3]);
@@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
} else {
- DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
+ drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
+ master_tile_ctl);
dg1_master_intr_enable(regs);
return IRQ_NONE;
}
@@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
u16 eir, u16 eir_stuck)
{
- DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
@@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
u32 eir, u32 eir_stuck)
{
- DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
+ drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
if (eir_stuck)
drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 0dd597a7a11f..9e6f060592d8 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
if (OA_TAKEN(hw_tail, tail) > report_size &&
__ratelimit(&stream->perf->tail_pointer_race))
- DRM_NOTE("unlanded report(s) head=0x%x "
- "tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ drm_notice(&stream->uncore->i915->drm,
+ "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
+ head, tail, hw_tail);
stream->oa_buffer.tail = gtt_offset + tail;
stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
@@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
*/
if (report32[0] == 0) {
if (__ratelimit(&stream->perf->spurious_report_rs))
- DRM_NOTE("Skipping spurious, invalid OA report\n");
+ drm_notice(&uncore->i915->drm,
+ "Skipping spurious, invalid OA report\n");
continue;
}
@@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ drm_notice(>->i915->drm,
+ "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index 6ec9c9fb7b0d..00871ef99792 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
return total_size;
if (query_item->length < total_size) {
- DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
- query_item->length, total_size);
+ drm_dbg(&i915->drm,
+ "Invalid query config data item size=%u expected=%u\n",
+ query_item->length, total_size);
return -EINVAL;
}
@@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
} while (n_configs > alloc);
if (query_item->length < sizeof_perf_config_list(n_configs)) {
- DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
- query_item->length,
- sizeof_perf_config_list(n_configs));
+ drm_dbg(&i915->drm,
+ "Invalid query config list item size=%u expected=%zu\n",
+ query_item->length,
+ sizeof_perf_config_list(n_configs));
kfree(oa_config_ids);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index 1e2750210831..595e8b574990 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
static void i915_setup_error_capture(struct device *kdev)
{
if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
- DRM_ERROR("error_state sysfs setup failed\n");
+ drm_err(&kdev_minor_to_i915(kdev)->drm,
+ "error_state sysfs setup failed\n");
}
static void i915_teardown_error_capture(struct device *kdev)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index c39488eb9eeb..3b969d679c1e 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
char buf[512];
if (!vma->node.stack) {
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
- vma->node.start, vma->node.size, reason);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm
+ "vma.node [%08llx + %08llx] %s: unknown owner\n",
+ vma->node.start, vma->node.size, reason);
return;
}
stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
- DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
- vma->node.start, vma->node.size, reason, buf);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "vma.node [%08llx + %08llx] %s: inserted at %s\n",
+ vma->node.start, vma->node.size, reason, buf);
}
#else
@@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
- size, flags & PIN_MAPPABLE ? "mappable" : "total",
- end);
+ drm_dbg(&to_i915(vma->obj->base.dev)->drm,
+ "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
return -ENOSPC;
}
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 2a3e2869fe71..6c25c9e7090a 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -178,8 +178,9 @@ static inline void
fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack to clear.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
@@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
} while (!ack_detected && pass++ < 10);
- DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
- intel_uncore_forcewake_domain_to_str(d->id),
- type == ACK_SET ? "set" : "clear",
- fw_ack(d),
- pass);
+ drm_dbg(&d->uncore->i915->drm,
+ "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
+ intel_uncore_forcewake_domain_to_str(d->id),
+ type == ACK_SET ? "set" : "clear",
+ fw_ack(d),
+ pass);
return ack_detected ? 0 : -ETIMEDOUT;
}
@@ -255,8 +257,9 @@ static inline void
fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
{
if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
- DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
- intel_uncore_forcewake_domain_to_str(d->id));
+ drm_err(&d->uncore->i915->drm,
+ "%s: timed out waiting for forcewake ack request.\n",
+ intel_uncore_forcewake_domain_to_str(d->id));
add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (7 preceding siblings ...)
(?)
@ 2022-11-09 13:31 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-09 13:31 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
URL : https://patchwork.freedesktop.org/series/110660/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (8 preceding siblings ...)
(?)
@ 2022-11-09 13:52 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-09 13:52 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7279 bytes --]
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
URL : https://patchwork.freedesktop.org/series/110660/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12360 -> Patchwork_110660v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/index.html
Participating hosts (42 -> 40)
------------------------------
Additional (1): fi-tgl-dsi
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_110660v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_render_tiled_blits@basic:
- fi-apl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#7056])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-apl-guc/igt@gem_render_tiled_blits@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/fi-apl-guc/igt@gem_render_tiled_blits@basic.html
* igt@i915_selftest@live@gt_engines:
- bat-dg1-6: [PASS][3] -> [INCOMPLETE][4] ([i915#4418])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-dg1-6/igt@i915_selftest@live@gt_engines.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
- bat-adlp-4: NOTRUN -> [SKIP][6] ([fdo#111827])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adlp-4/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlp-4: NOTRUN -> [SKIP][7] ([i915#3546])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adlp-4/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@runner@aborted:
- bat-dg1-6: NOTRUN -> [FAIL][8] ([i915#4312])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-dg1-6/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_tiled_blits@basic:
- fi-pnv-d510: [SKIP][9] ([fdo#109271]) -> [PASS][10] +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-pnv-d510/igt@gem_tiled_blits@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/fi-pnv-d510/igt@gem_tiled_blits@basic.html
* igt@i915_module_load@reload:
- {bat-rpls-2}: [DMESG-WARN][11] ([i915#6434]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-rpls-2/igt@i915_module_load@reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-rpls-2/igt@i915_module_load@reload.html
* igt@i915_selftest@live@gt_pm:
- {bat-adln-1}: [DMESG-FAIL][13] ([i915#4258]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adln-1/igt@i915_selftest@live@gt_pm.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adln-1/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][15] ([i915#4785]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@migrate:
- {bat-adlp-6}: [INCOMPLETE][17] ([i915#7348]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adlp-6/igt@i915_selftest@live@migrate.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adlp-6/igt@i915_selftest@live@migrate.html
- bat-adlp-4: [INCOMPLETE][19] ([i915#7308] / [i915#7348]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adlp-4/igt@i915_selftest@live@migrate.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adlp-4/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@slpc:
- {bat-adln-1}: [DMESG-FAIL][21] ([i915#6997]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adln-1/igt@i915_selftest@live@slpc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/bat-adln-1/igt@i915_selftest@live@slpc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4418]: https://gitlab.freedesktop.org/drm/intel/issues/4418
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434
[i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7056]: https://gitlab.freedesktop.org/drm/intel/issues/7056
[i915#7058]: https://gitlab.freedesktop.org/drm/intel/issues/7058
[i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308
[i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
Build changes
-------------
* Linux: CI_DRM_12360 -> Patchwork_110660v3
CI-20190529: 20190529
CI_DRM_12360: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7048: 5edd5c539f1fdf1c02157bf43fa1fd22d4ad2c75 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_110660v3: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
3b6fefdf1210 drm/i915: Partial abandonment of legacy DRM logging macros
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/index.html
[-- Attachment #2: Type: text/html, Size: 7317 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
` (9 preceding siblings ...)
(?)
@ 2022-11-09 17:53 ` Patchwork
-1 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2022-11-09 17:53 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 42167 bytes --]
== Series Details ==
Series: drm/i915: Partial abandonment of legacy DRM logging macros (rev3)
URL : https://patchwork.freedesktop.org/series/110660/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12360_full -> Patchwork_110660v3_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_110660v3_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_110660v3_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_110660v3_full:
### IGT changes ###
#### Warnings ####
* igt@dmabuf@all@dma_fence_chain:
- shard-skl: [INCOMPLETE][1] ([i915#6949]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl4/igt@dmabuf@all@dma_fence_chain.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl7/igt@dmabuf@all@dma_fence_chain.html
Known issues
------------
Here are the changes found in Patchwork_110660v3_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-glk: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [FAIL][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52]) ([i915#4392])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk1/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk3/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk3/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk3/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk2/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk2/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk2/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk1/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk1/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk9/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk9/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk9/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk9/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk8/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk8/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk8/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk8/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk7/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk7/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk6/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk6/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk6/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk8/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk7/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk7/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk7/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk6/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk6/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk6/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk5/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk5/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk5/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk3/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk3/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk3/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk3/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk2/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk2/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk2/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk1/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk1/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk1/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk1/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk9/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk9/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk8/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk8/boot.html
#### Possible fixes ####
* boot:
- shard-apl: ([FAIL][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77]) ([i915#4386]) -> ([PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/boot.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl3/boot.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/boot.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/boot.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/boot.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl8/boot.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl8/boot.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl3/boot.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl8/boot.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/boot.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/boot.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl3/boot.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/boot.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl3/boot.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/boot.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/boot.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/boot.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/boot.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/boot.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/boot.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/boot.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/boot.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/boot.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/boot.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#2190])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/igt@gem_huc_copy@huc-copy.html
- shard-skl: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#2190])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl7/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- shard-skl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#4613])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl7/igt@gem_lmem_swapping@random-engines.html
- shard-apl: NOTRUN -> [SKIP][106] ([fdo#109271] / [i915#4613])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/igt@gem_lmem_swapping@random-engines.html
* igt@i915_module_load@load:
- shard-skl: NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#6227])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@i915_module_load@load.html
* igt@i915_pm_dc@dc6-psr:
- shard-skl: [PASS][108] -> [FAIL][109] ([i915#3989] / [i915#454])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl10/igt@i915_pm_dc@dc6-psr.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-tglb: NOTRUN -> [WARN][110] ([i915#2681]) +3 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-skl: [PASS][111] -> [DMESG-FAIL][112] ([i915#5334])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl4/igt@i915_selftest@live@gt_heartbeat.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl4/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- shard-tglb: [PASS][113] -> [DMESG-WARN][114] ([i915#5591])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb1/igt@i915_selftest@live@hangcheck.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@basic-s2idle-without-i915:
- shard-skl: [PASS][115] -> [DMESG-WARN][116] ([i915#1982])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl1/igt@i915_suspend@basic-s2idle-without-i915.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl7/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][117] ([fdo#111614])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
- shard-iclb: NOTRUN -> [SKIP][118] ([fdo#110725] / [fdo#111614])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][119] ([fdo#109271] / [i915#3886]) +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#3886])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][121] ([fdo#109271] / [i915#3886])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk2/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-glk: NOTRUN -> [SKIP][122] ([fdo#109271]) +10 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk9/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][123] ([fdo#109271]) +100 similar issues
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-crc-single:
- shard-apl: NOTRUN -> [SKIP][124] ([fdo#109271] / [fdo#111827]) +3 similar issues
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@dp-hpd:
- shard-skl: NOTRUN -> [SKIP][125] ([fdo#109271] / [fdo#111827]) +2 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl1/igt@kms_chamelium@dp-hpd.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-1:
- shard-apl: NOTRUN -> [INCOMPLETE][126] ([i915#7121] / [i915#7173])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/igt@kms_content_protection@atomic-dpms@pipe-a-dp-1.html
* igt@kms_cursor_legacy@cursor-vs-flip@atomic-transitions:
- shard-iclb: [PASS][127] -> [FAIL][128] ([i915#5072])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb3/igt@kms_cursor_legacy@cursor-vs-flip@atomic-transitions.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-flip@atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-skl: NOTRUN -> [FAIL][129] ([i915#2346]) +1 similar issue
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_flip@plain-flip-fb-recreate@a-edp1:
- shard-skl: [PASS][130] -> [FAIL][131] ([i915#2122]) +4 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl7/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl1/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][132] ([i915#2587] / [i915#2672]) +5 similar issues
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][133] ([i915#3555]) +3 similar issues
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][134] ([i915#2672]) +3 similar issues
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][135] ([i915#2672] / [i915#3555])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][136] ([i915#6497])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-skl: NOTRUN -> [SKIP][137] ([fdo#109271]) +42 similar issues
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-tglb: NOTRUN -> [SKIP][138] ([fdo#109280] / [fdo#111825])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_psr2_su@page_flip-p010:
- shard-iclb: NOTRUN -> [SKIP][139] ([fdo#109642] / [fdo#111068] / [i915#658])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb1/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][140] -> [SKIP][141] ([fdo#109441])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-apl: NOTRUN -> [SKIP][142] ([fdo#109271] / [i915#2437])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl2/igt@kms_writeback@writeback-pixel-formats.html
* igt@sysfs_clients@fair-3:
- shard-apl: NOTRUN -> [SKIP][143] ([fdo#109271] / [i915#2994]) +1 similar issue
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl3/igt@sysfs_clients@fair-3.html
- shard-skl: NOTRUN -> [SKIP][144] ([fdo#109271] / [i915#2994])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@sysfs_clients@fair-3.html
#### Possible fixes ####
* igt@fbdev@unaligned-read:
- {shard-rkl}: [SKIP][145] ([i915#2582]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@fbdev@unaligned-read.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@fbdev@unaligned-read.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}: [FAIL][147] ([i915#6268]) -> [PASS][148]
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-6/igt@gem_ctx_exec@basic-nohangcheck.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-1/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][149] ([fdo#103375]) -> [PASS][150] +1 similar issue
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-1/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][151] ([i915#4525]) -> [PASS][152] +1 similar issue
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb8/igt@gem_exec_balancer@parallel-keep-in-fence.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb2/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [FAIL][153] ([i915#2842]) -> [PASS][154]
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][155] ([i915#2842]) -> [PASS][156]
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-apl: [FAIL][157] ([i915#2842]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
- {shard-rkl}: [SKIP][159] ([i915#3281]) -> [PASS][160] +11 similar issues
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- {shard-rkl}: [SKIP][161] ([i915#3282]) -> [PASS][162] +4 similar issues
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_softpin@evict-single-offset:
- {shard-rkl}: [FAIL][163] ([i915#4171]) -> [PASS][164]
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-1/igt@gem_softpin@evict-single-offset.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-2/igt@gem_softpin@evict-single-offset.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-skl: [INCOMPLETE][165] ([i915#7231]) -> [PASS][166]
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl10/igt@gem_workarounds@suspend-resume-fd.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl6/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen9_exec_parse@allowed-single:
- {shard-rkl}: [SKIP][167] ([i915#2527]) -> [PASS][168] +3 similar issues
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gen9_exec_parse@allowed-single.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-5/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_backlight@fade_with_suspend:
- {shard-rkl}: [SKIP][169] ([i915#3012]) -> [PASS][170]
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-3/igt@i915_pm_backlight@fade_with_suspend.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@i915_pm_backlight@fade_with_suspend.html
* igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1:
- shard-apl: [DMESG-WARN][171] ([i915#180]) -> [PASS][172] +2 similar issues
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl7/igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1.html
* igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-iclb: [FAIL][173] ([i915#2346]) -> [PASS][174] +1 similar issue
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1:
- shard-glk: [FAIL][175] ([i915#2122]) -> [PASS][176]
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1.html
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1.html
* igt@kms_frontbuffer_tracking@fbc-tiling-linear:
- {shard-rkl}: [SKIP][177] ([i915#1849] / [i915#4098]) -> [PASS][178] +13 similar issues
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
* igt@kms_psr@dpms:
- {shard-rkl}: [SKIP][179] ([i915#1072]) -> [PASS][180]
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@kms_psr@dpms.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@kms_psr@dpms.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][181] ([fdo#109441]) -> [PASS][182] +3 similar issues
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-b-query-idle:
- {shard-rkl}: [SKIP][183] ([i915#1845] / [i915#4098]) -> [PASS][184] +17 similar issues
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@kms_vblank@pipe-b-query-idle.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@kms_vblank@pipe-b-query-idle.html
* igt@perf@stress-open-close:
- shard-glk: [INCOMPLETE][185] ([i915#5213]) -> [PASS][186]
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/igt@perf@stress-open-close.html
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-glk2/igt@perf@stress-open-close.html
* igt@testdisplay:
- {shard-rkl}: [SKIP][187] ([i915#4098]) -> [PASS][188]
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@testdisplay.html
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-rkl-6/igt@testdisplay.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [FAIL][189] ([i915#6117]) -> [SKIP][190] ([i915#4525])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglb: [WARN][191] ([i915#2658]) -> [INCOMPLETE][192] ([i915#7248])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb1/igt@gem_pwrite@basic-exhaustion.html
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-tglb5/igt@gem_pwrite@basic-exhaustion.html
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- shard-iclb: [WARN][193] ([i915#2684]) -> [FAIL][194] ([i915#2684])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb3/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-iclb: [SKIP][195] ([i915#658]) -> [SKIP][196] ([i915#2920])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb8/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-iclb: [SKIP][197] ([i915#2920]) -> [SKIP][198] ([i915#658])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][199] ([i915#2920]) -> [SKIP][200] ([fdo#111068] / [i915#658])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-iclb5/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@runner@aborted:
- shard-apl: ([FAIL][201], [FAIL][202], [FAIL][203], [FAIL][204]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312]) -> ([FAIL][205], [FAIL][206]) ([i915#3002] / [i915#4312])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/igt@runner@aborted.html
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/igt@runner@aborted.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/igt@runner@aborted.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/igt@runner@aborted.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl6/igt@runner@aborted.html
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-apl1/igt@runner@aborted.html
- shard-skl: ([FAIL][207], [FAIL][208], [FAIL][209]) ([i915#3002] / [i915#4312] / [i915#6949]) -> ([FAIL][210], [FAIL][211]) ([i915#3002] / [i915#4312])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl4/igt@runner@aborted.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl7/igt@runner@aborted.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl10/igt@runner@aborted.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl1/igt@runner@aborted.html
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/shard-skl4/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
[i915#4392]: https://gitlab.freedesktop.org/drm/intel/issues/4392
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4778]: https://gitlab.freedesktop.org/drm/intel/issues/4778
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#5072]: https://gitlab.freedesktop.org/drm/intel/issues/5072
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7121]: https://gitlab.freedesktop.org/drm/intel/issues/7121
[i915#7134]: https://gitlab.freedesktop.org/drm/intel/issues/7134
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7231]: https://gitlab.freedesktop.org/drm/intel/issues/7231
[i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248
Build changes
-------------
* Linux: CI_DRM_12360 -> Patchwork_110660v3
CI-20190529: 20190529
CI_DRM_12360: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7048: 5edd5c539f1fdf1c02157bf43fa1fd22d4ad2c75 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_110660v3: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110660v3/index.html
[-- Attachment #2: Type: text/html, Size: 43783 bytes --]
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-09 10:46 ` [Intel-gfx] " Tvrtko Ursulin
(?)
@ 2022-11-10 11:07 ` Andrzej Hajda
2022-11-10 11:42 ` Tvrtko Ursulin
-1 siblings, 1 reply; 24+ messages in thread
From: Andrzej Hajda @ 2022-11-10 11:07 UTC (permalink / raw)
To: Tvrtko Ursulin, Intel-gfx; +Cc: Jani Nikula, dri-devel
On 09.11.2022 11:46, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>
> Convert some usages of legacy DRM logging macros into versions which tell
> us on which device have the events occurred.
>
> v2:
> * Don't have struct drm_device as local. (Jani, Ville)
>
> v3:
> * Store gt, not i915, in workaround list. (John)
Neither gt neither i915 does fit into wa list IMHO.
The best solution would be provide context (i915/gt/whatever)
as a function parameter, every time it is necessary.
On the other side it should not block the patch.
More below.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> # v2
> Acked-by: Jani Nikula <jani.nikula@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 ++++++++----
> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 42 +++++++++++--------
> .../gpu/drm/i915/gt/intel_workarounds_types.h | 3 ++
> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
> drivers/gpu/drm/i915/i915_perf.c | 14 ++++---
> drivers/gpu/drm/i915/i915_query.c | 12 +++---
> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
> drivers/gpu/drm/i915/i915_vma.c | 16 +++----
> drivers/gpu/drm/i915/intel_uncore.c | 21 ++++++----
> 19 files changed, 117 insertions(+), 81 deletions(-)
>
(...)
> @@ -1749,7 +1755,7 @@ wa_list_apply(struct intel_gt *gt, const struct i915_wa_list *wal)
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg);
>
> - wa_verify(wa, val, wal->name, "application");
> + wa_verify(wal->gt, wa, val, wal->name, "application");
This looks confusing at 1st sight, why wa_verify(wal->gt,...) and not
wa_verify(gt,...). Can they differ? and similar questions as in case of
redundant vars.
The same apply to wal->engine_name, which is almost unused anyway?
Also AFAIK there is always sequence:
1. wa_init_start
2. *init_workarounds*
3. wa_init_finish - btw funny name.
Why not 1 and 3 embed in 2? Do we need this sequence.
Anyway all these comments are for wa handling, which should be addressed
in other patch. So my r-b still holds, either with wal->i915, either
with wal->gt.
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Regards
Andrzej
> }
> }
>
> @@ -1779,7 +1785,7 @@ static bool wa_list_verify(struct intel_gt *gt,
> intel_uncore_forcewake_get__locked(uncore, fw);
>
> for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> - ok &= wa_verify(wa, wa->is_mcr ?
> + ok &= wa_verify(wal->gt, wa, wa->is_mcr ?
> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
> intel_uncore_read_fw(uncore, wa->reg),
> wal->name, from);
> @@ -2127,7 +2133,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine)
> struct drm_i915_private *i915 = engine->i915;
> struct i915_wa_list *w = &engine->whitelist;
>
> - wa_init_start(w, "whitelist", engine->name);
> + wa_init_start(w, engine->gt, "whitelist", engine->name);
>
> if (IS_PONTEVECCHIO(i915))
> pvc_whitelist_build(engine);
> @@ -3012,7 +3018,7 @@ void intel_engine_init_workarounds(struct intel_engine_cs *engine)
> if (GRAPHICS_VER(engine->i915) < 4)
> return;
>
> - wa_init_start(wal, "engine", engine->name);
> + wa_init_start(wal, engine->gt, "engine", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
> }
> @@ -3193,7 +3199,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
> if (mcr_range(rq->engine->i915, i915_mmio_reg_offset(wa->reg)))
> continue;
>
> - if (!wa_verify(wa, results[i], wal->name, from))
> + if (!wa_verify(wal->gt, wa, results[i], wal->name, from))
> err = -ENXIO;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> index 7c8b01d00043..e14188120e66 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h
> @@ -10,6 +10,8 @@
>
> #include "i915_reg_defs.h"
>
> +struct intel_gt;
> +
> struct i915_wa {
> union {
> i915_reg_t reg;
> @@ -24,6 +26,7 @@ struct i915_wa {
> };
>
> struct i915_wa_list {
> + struct intel_gt *gt;
> const char *name;
> const char *engine_name;
> struct i915_wa *list;
> diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> index 21b1edc052f8..711014bb53d9 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
> @@ -66,14 +66,14 @@ reference_lists_init(struct intel_gt *gt, struct wa_lists *lists)
>
> memset(lists, 0, sizeof(*lists));
>
> - wa_init_start(&lists->gt_wa_list, "GT_REF", "global");
> + wa_init_start(&lists->gt_wa_list, gt, "GT_REF", "global");
> gt_init_workarounds(gt, &lists->gt_wa_list);
> wa_init_finish(&lists->gt_wa_list);
>
> for_each_engine(engine, gt, id) {
> struct i915_wa_list *wal = &lists->engine[id].wa_list;
>
> - wa_init_start(wal, "REF", engine->name);
> + wa_init_start(wal, gt, "REF", engine->name);
> engine_init_workarounds(engine, wal);
> wa_init_finish(wal);
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index ae987e92251d..6c7ac73b69a5 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -688,8 +688,8 @@ i915_drop_caches_set(void *data, u64 val)
> unsigned int flags;
> int ret;
>
> - DRM_DEBUG("Dropping caches: 0x%08llx [0x%08llx]\n",
> - val, val & DROP_ALL);
> + drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> + val, val & DROP_ALL);
>
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 299f94a9fb87..8132743ca87e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1286,7 +1286,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
> struct i915_drm_client *client;
> int ret = -ENOMEM;
>
> - DRM_DEBUG("\n");
> + drm_dbg(&i915->drm, "\n");
>
> file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
> if (!file_priv)
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index 3047e80e1163..61ef2d9cfa62 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -179,7 +179,7 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
> value = i915_perf_oa_timestamp_frequency(i915);
> break;
> default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> + drm_dbg(&i915->drm, "Unknown parameter %d\n", param->param);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b0180ea38de0..6c20817f8967 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1086,8 +1086,9 @@ static void ivb_parity_work(struct work_struct *work)
> kobject_uevent_env(&dev_priv->drm.primary->kdev->kobj,
> KOBJ_CHANGE, parity_event);
>
> - DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> - slice, row, bank, subbank);
> + drm_dbg(&dev_priv->drm,
> + "Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
> + slice, row, bank, subbank);
>
> kfree(parity_event[4]);
> kfree(parity_event[3]);
> @@ -2774,7 +2775,8 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
> master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ);
> raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, master_ctl);
> } else {
> - DRM_ERROR("Tile not supported: 0x%08x\n", master_tile_ctl);
> + drm_err(&i915->drm, "Tile not supported: 0x%08x\n",
> + master_tile_ctl);
> dg1_master_intr_enable(regs);
> return IRQ_NONE;
> }
> @@ -3940,7 +3942,7 @@ static void i8xx_error_irq_ack(struct drm_i915_private *i915,
> static void i8xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u16 eir, u16 eir_stuck)
> {
> - DRM_DEBUG("Master Error: EIR 0x%04x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error: EIR 0x%04x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%04x, masked\n",
> @@ -3975,7 +3977,7 @@ static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> static void i9xx_error_irq_handler(struct drm_i915_private *dev_priv,
> u32 eir, u32 eir_stuck)
> {
> - DRM_DEBUG("Master Error, EIR 0x%08x\n", eir);
> + drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
>
> if (eir_stuck)
> drm_dbg(&dev_priv->drm, "EIR stuck: 0x%08x, masked\n",
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 0dd597a7a11f..9e6f060592d8 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -530,9 +530,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
>
> if (OA_TAKEN(hw_tail, tail) > report_size &&
> __ratelimit(&stream->perf->tail_pointer_race))
> - DRM_NOTE("unlanded report(s) head=0x%x "
> - "tail=0x%x hw_tail=0x%x\n",
> - head, tail, hw_tail);
> + drm_notice(&stream->uncore->i915->drm,
> + "unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
> + head, tail, hw_tail);
>
> stream->oa_buffer.tail = gtt_offset + tail;
> stream->oa_buffer.aging_tail = gtt_offset + hw_tail;
> @@ -1015,7 +1015,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
> */
> if (report32[0] == 0) {
> if (__ratelimit(&stream->perf->spurious_report_rs))
> - DRM_NOTE("Skipping spurious, invalid OA report\n");
> + drm_notice(&uncore->i915->drm,
> + "Skipping spurious, invalid OA report\n");
> continue;
> }
>
> @@ -1602,8 +1603,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
> free_noa_wait(stream);
>
> if (perf->spurious_report_rs.missed) {
> - DRM_NOTE("%d spurious OA report notices suppressed due to ratelimiting\n",
> - perf->spurious_report_rs.missed);
> + drm_notice(>->i915->drm,
> + "%d spurious OA report notices suppressed due to ratelimiting\n",
> + perf->spurious_report_rs.missed);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
> index 6ec9c9fb7b0d..00871ef99792 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -250,8 +250,9 @@ static int query_perf_config_data(struct drm_i915_private *i915,
> return total_size;
>
> if (query_item->length < total_size) {
> - DRM_DEBUG("Invalid query config data item size=%u expected=%u\n",
> - query_item->length, total_size);
> + drm_dbg(&i915->drm,
> + "Invalid query config data item size=%u expected=%u\n",
> + query_item->length, total_size);
> return -EINVAL;
> }
>
> @@ -418,9 +419,10 @@ static int query_perf_config_list(struct drm_i915_private *i915,
> } while (n_configs > alloc);
>
> if (query_item->length < sizeof_perf_config_list(n_configs)) {
> - DRM_DEBUG("Invalid query config list item size=%u expected=%zu\n",
> - query_item->length,
> - sizeof_perf_config_list(n_configs));
> + drm_dbg(&i915->drm,
> + "Invalid query config list item size=%u expected=%zu\n",
> + query_item->length,
> + sizeof_perf_config_list(n_configs));
> kfree(oa_config_ids);
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 1e2750210831..595e8b574990 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -218,7 +218,8 @@ static const struct bin_attribute error_state_attr = {
> static void i915_setup_error_capture(struct device *kdev)
> {
> if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
> - DRM_ERROR("error_state sysfs setup failed\n");
> + drm_err(&kdev_minor_to_i915(kdev)->drm,
> + "error_state sysfs setup failed\n");
> }
>
> static void i915_teardown_error_capture(struct device *kdev)
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index c39488eb9eeb..3b969d679c1e 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -73,14 +73,16 @@ static void vma_print_allocator(struct i915_vma *vma, const char *reason)
> char buf[512];
>
> if (!vma->node.stack) {
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: unknown owner\n",
> - vma->node.start, vma->node.size, reason);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm
> + "vma.node [%08llx + %08llx] %s: unknown owner\n",
> + vma->node.start, vma->node.size, reason);
> return;
> }
>
> stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
> - DRM_DEBUG_DRIVER("vma.node [%08llx + %08llx] %s: inserted at %s\n",
> - vma->node.start, vma->node.size, reason, buf);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "vma.node [%08llx + %08llx] %s: inserted at %s\n",
> + vma->node.start, vma->node.size, reason, buf);
> }
>
> #else
> @@ -782,9 +784,9 @@ i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
> * attempt to find space.
> */
> if (size > end) {
> - DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> - size, flags & PIN_MAPPABLE ? "mappable" : "total",
> - end);
> + drm_dbg(&to_i915(vma->obj->base.dev)->drm,
> + "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
> + size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
> return -ENOSPC;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 2a3e2869fe71..6c25c9e7090a 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -178,8 +178,9 @@ static inline void
> fw_domain_wait_ack_clear(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_clear(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack to clear.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack to clear.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
> @@ -226,11 +227,12 @@ fw_domain_wait_ack_with_fallback(const struct intel_uncore_forcewake_domain *d,
> fw_clear(d, FORCEWAKE_KERNEL_FALLBACK);
> } while (!ack_detected && pass++ < 10);
>
> - DRM_DEBUG_DRIVER("%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> - intel_uncore_forcewake_domain_to_str(d->id),
> - type == ACK_SET ? "set" : "clear",
> - fw_ack(d),
> - pass);
> + drm_dbg(&d->uncore->i915->drm,
> + "%s had to use fallback to %s ack, 0x%x (passes %u)\n",
> + intel_uncore_forcewake_domain_to_str(d->id),
> + type == ACK_SET ? "set" : "clear",
> + fw_ack(d),
> + pass);
>
> return ack_detected ? 0 : -ETIMEDOUT;
> }
> @@ -255,8 +257,9 @@ static inline void
> fw_domain_wait_ack_set(const struct intel_uncore_forcewake_domain *d)
> {
> if (wait_ack_set(d, FORCEWAKE_KERNEL)) {
> - DRM_ERROR("%s: timed out waiting for forcewake ack request.\n",
> - intel_uncore_forcewake_domain_to_str(d->id));
> + drm_err(&d->uncore->i915->drm,
> + "%s: timed out waiting for forcewake ack request.\n",
> + intel_uncore_forcewake_domain_to_str(d->id));
> add_taint_for_CI(d->uncore->i915, TAINT_WARN); /* CI now unreliable */
> }
> }
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915: Partial abandonment of legacy DRM logging macros
2022-11-10 11:07 ` Andrzej Hajda
@ 2022-11-10 11:42 ` Tvrtko Ursulin
0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2022-11-10 11:42 UTC (permalink / raw)
To: Andrzej Hajda, Intel-gfx; +Cc: Jani Nikula, dri-devel
On 10/11/2022 11:07, Andrzej Hajda wrote:
> On 09.11.2022 11:46, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Convert some usages of legacy DRM logging macros into versions which tell
>> us on which device have the events occurred.
>>
>> v2:
>> * Don't have struct drm_device as local. (Jani, Ville)
>>
>> v3:
>> * Store gt, not i915, in workaround list. (John)
>
>
> Neither gt neither i915 does fit into wa list IMHO.
> The best solution would be provide context (i915/gt/whatever)
> as a function parameter, every time it is necessary.
> On the other side it should not block the patch.
> More below.
I thought about the very same lines but then concluded that the only _current_ usage of the lists is that they belong to a gt (directly or via engine). So having a back pointer felt passable.
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> # v2
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: John Harrison <John.C.Harrison@Intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
>> .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 26 ++++++++----
>> .../drm/i915/gt/intel_execlists_submission.c | 13 +++---
>> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt.c | 4 +-
>> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 8 ++--
>> drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++-
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 42 +++++++++++--------
>> .../gpu/drm/i915/gt/intel_workarounds_types.h | 3 ++
>> .../gpu/drm/i915/gt/selftest_workarounds.c | 4 +-
>> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
>> drivers/gpu/drm/i915/i915_gem.c | 2 +-
>> drivers/gpu/drm/i915/i915_getparam.c | 2 +-
>> drivers/gpu/drm/i915/i915_irq.c | 12 +++---
>> drivers/gpu/drm/i915/i915_perf.c | 14 ++++---
>> drivers/gpu/drm/i915/i915_query.c | 12 +++---
>> drivers/gpu/drm/i915/i915_sysfs.c | 3 +-
>> drivers/gpu/drm/i915/i915_vma.c | 16 +++----
>> drivers/gpu/drm/i915/intel_uncore.c | 21 ++++++----
>> 19 files changed, 117 insertions(+), 81 deletions(-)
>>
>
> (...)
>
>> @@ -1749,7 +1755,7 @@ wa_list_apply(struct intel_gt *gt, const struct
>> i915_wa_list *wal)
>> intel_gt_mcr_read_any_fw(gt, wa->mcr_reg) :
>> intel_uncore_read_fw(uncore, wa->reg);
>> - wa_verify(wa, val, wal->name, "application");
>> + wa_verify(wal->gt, wa, val, wal->name, "application");
>
> This looks confusing at 1st sight, why wa_verify(wal->gt,...) and not
> wa_verify(gt,...). Can they differ? and similar questions as in case of
> redundant vars.
Would be always the same in current code. But point taken, it is confusing.. hm..
./gt/intel_workarounds.c: wa_list_apply(gt, >->wa_list);
./gt/intel_workarounds.c: wa_list_apply(engine->gt, &engine->wa_list);
Could drop the gt argument now that gt is available in the wa list.
> The same apply to wal->engine_name, which is almost unused anyway?
> Also AFAIK there is always sequence:
> 1. wa_init_start
> 2. *init_workarounds*
> 3. wa_init_finish - btw funny name.
Why funny? :) Because init collides with finish? Start of initialisation, initialisation, end of initialisation. :)
> Why not 1 and 3 embed in 2? Do we need this sequence.
It's just some common code so it doesn't have to be duplicated in the callers.
> Anyway all these comments are for wa handling, which should be addressed
> in other patch. So my r-b still holds, either with wal->i915, either
> with wal->gt.
>
> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Thanks, I think I'll go with v3 and follow up with wa_list_apply cleanup, so that my logging changes in gt/ are in before further CI delays and people can freely work on the GT logging macros without conflicts.
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2022-11-10 11:42 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-08 11:49 [PATCH] drm/i915: Partial abandonment of legacy DRM logging macros Tvrtko Ursulin
2022-11-08 11:49 ` [Intel-gfx] " Tvrtko Ursulin
2022-11-08 12:01 ` Jani Nikula
2022-11-08 12:01 ` [Intel-gfx] " Jani Nikula
2022-11-08 12:05 ` Tvrtko Ursulin
2022-11-08 12:05 ` [Intel-gfx] " Tvrtko Ursulin
2022-11-08 12:05 ` Ville Syrjälä
2022-11-08 12:26 ` [PATCH v2] " Tvrtko Ursulin
2022-11-08 12:26 ` [Intel-gfx] " Tvrtko Ursulin
2022-11-08 12:32 ` Jani Nikula
2022-11-08 12:32 ` [Intel-gfx] " Jani Nikula
2022-11-08 15:15 ` Andrzej Hajda
2022-11-08 19:53 ` John Harrison
2022-11-08 19:53 ` [Intel-gfx] " John Harrison
2022-11-08 12:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Partial abandonment of legacy DRM logging macros (rev2) Patchwork
2022-11-08 13:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-08 17:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-11-09 10:46 ` [PATCH v3] drm/i915: Partial abandonment of legacy DRM logging macros Tvrtko Ursulin
2022-11-09 10:46 ` [Intel-gfx] " Tvrtko Ursulin
2022-11-10 11:07 ` Andrzej Hajda
2022-11-10 11:42 ` Tvrtko Ursulin
2022-11-09 13:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Partial abandonment of legacy DRM logging macros (rev3) Patchwork
2022-11-09 13:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-09 17:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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