[Intel-gfx] [PATCH 0/6] drm/i915: Fake dual eDP VBT fixes

[Intel-gfx] [PATCH 0/6] drm/i915: Fake dual eDP VBT fixes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Here's my take on fixing *some* of the issues around the
dual eDP VBTs floating around atm. I have now such a machine.

While the rest of the series does avoid the PPS confusions
the last patch is the only way I can get the HDMI port to
actually work.

Cc: Animesh Manna <animesh.manna@intel.com>

Ville Syrjälä (6):
  drm/i915: Introduce intel_panel_init_alloc()
  drm/i915: Do panel VBT init early if the VBT declares an explicit
    panel type
  drm/i915: Generalize the PPS vlv_pipe_check() stuff
  drm/i915: Try to use the correct power sequencer intiially on bxt/glk
  drm/915: Extend dual PPS handlind for ICP+
  drm/i915: Ignore LFP2 for now

 drivers/gpu/drm/i915/display/icl_dsi.c        |   2 +-
 drivers/gpu/drm/i915/display/intel_bios.c     |  87 ++++++++++---
 drivers/gpu/drm/i915/display/intel_bios.h     |  11 +-
 .../gpu/drm/i915/display/intel_connector.c    |   2 +-
 .../drm/i915/display/intel_display_types.h    |  10 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |   7 +-
 drivers/gpu/drm/i915/display/intel_lvds.c     |   4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |   9 ++
 drivers/gpu/drm/i915/display/intel_panel.h    |   1 +
 drivers/gpu/drm/i915/display/intel_pps.c      | 116 ++++++++++++++----
 drivers/gpu/drm/i915/display/intel_sdvo.c     |   2 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c        |   2 +-
 12 files changed, 198 insertions(+), 55 deletions(-)

-- 
2.37.4

[Intel-gfx] [PATCH 1/6] drm/i915: Introduce intel_panel_init_alloc()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Introduce a plaec where we can initialize connector->panel
after it's been allocated. We already have a intel_panel_init()
so had to get creative with the name and came up with
intel_panel_init_alloc().

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_connector.c | 2 +-
 drivers/gpu/drm/i915/display/intel_panel.c     | 7 +++++++
 drivers/gpu/drm/i915/display/intel_panel.h     | 1 +
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c
index 6205ddd3ded0..562da3b741e2 100644
--- a/drivers/gpu/drm/i915/display/intel_connector.c
+++ b/drivers/gpu/drm/i915/display/intel_connector.c
@@ -54,7 +54,7 @@ int intel_connector_init(struct intel_connector *connector)
 	__drm_atomic_helper_connector_reset(&connector->base,
 					    &conn_state->base);
 
-	INIT_LIST_HEAD(&connector->panel.fixed_modes);
+	intel_panel_init_alloc(connector);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 69ce77711b7c..8e683ab75594 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -660,6 +660,13 @@ intel_panel_mode_valid(struct intel_connector *connector,
 	return MODE_OK;
 }
 
+void intel_panel_init_alloc(struct intel_connector *connector)
+{
+	struct intel_panel *panel = &connector->panel;
+
+	INIT_LIST_HEAD(&panel->fixed_modes);
+}
+
 int intel_panel_init(struct intel_connector *connector)
 {
 	struct intel_panel *panel = &connector->panel;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 5c5b5b7f95b6..4b51e1c51da6 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -18,6 +18,7 @@ struct intel_connector;
 struct intel_crtc_state;
 struct intel_encoder;
 
+void intel_panel_init_alloc(struct intel_connector *connector);
 int intel_panel_init(struct intel_connector *connector);
 void intel_panel_fini(struct intel_connector *connector);
 enum drm_connector_status
-- 
2.37.4

Re: [Intel-gfx] [PATCH 1/6] drm/i915: Introduce intel_panel_init_alloc()

[Jani Nikula]

On Wed, 09 Nov 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Introduce a plaec where we can initialize connector->panel

*place

> after it's been allocated. We already have a intel_panel_init()
> so had to get creative with the name and came up with
> intel_panel_init_alloc().

A bit contrived, but no big deal.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_connector.c | 2 +-
>  drivers/gpu/drm/i915/display/intel_panel.c     | 7 +++++++
>  drivers/gpu/drm/i915/display/intel_panel.h     | 1 +
>  3 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/drm/i915/display/intel_connector.c
> index 6205ddd3ded0..562da3b741e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_connector.c
> +++ b/drivers/gpu/drm/i915/display/intel_connector.c
> @@ -54,7 +54,7 @@ int intel_connector_init(struct intel_connector *connector)
>  	__drm_atomic_helper_connector_reset(&connector->base,
>  					    &conn_state->base);
>  
> -	INIT_LIST_HEAD(&connector->panel.fixed_modes);
> +	intel_panel_init_alloc(connector);
>  
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 69ce77711b7c..8e683ab75594 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -660,6 +660,13 @@ intel_panel_mode_valid(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> +void intel_panel_init_alloc(struct intel_connector *connector)
> +{
> +	struct intel_panel *panel = &connector->panel;
> +
> +	INIT_LIST_HEAD(&panel->fixed_modes);
> +}
> +
>  int intel_panel_init(struct intel_connector *connector)
>  {
>  	struct intel_panel *panel = &connector->panel;
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
> index 5c5b5b7f95b6..4b51e1c51da6 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -18,6 +18,7 @@ struct intel_connector;
>  struct intel_crtc_state;
>  struct intel_encoder;
>  
> +void intel_panel_init_alloc(struct intel_connector *connector);
>  int intel_panel_init(struct intel_connector *connector);
>  void intel_panel_fini(struct intel_connector *connector);
>  enum drm_connector_status

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 2/6] drm/i915: Do panel VBT init early if the VBT declares an explicit panel type

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Lots of ADL machines out there with bogus VBTs that declare
two eDP child devices. In order for those to work we need to
figure out which power sequencer to use before we try the EDID
read. So let's do the panel VBT init early if we can, falling
back to the post-EDID init otherwise.

The post-EDID init panel_type=0xff approach of assuming the
power sequencer should already be enabled doesn't really work
with multiple eDP panels, and currently we just end up using
the same power sequencer for both eDP ports, which at least
confuses the wakeref tracking, and potentially also causes us
to toggle the VDD for the panel when we should not.

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c        |  2 +-
 drivers/gpu/drm/i915/display/intel_bios.c     | 56 ++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_bios.h     | 11 ++--
 .../drm/i915/display/intel_display_types.h    |  2 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  7 ++-
 drivers/gpu/drm/i915/display/intel_lvds.c     |  4 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
 drivers/gpu/drm/i915/display/intel_sdvo.c     |  2 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c        |  2 +-
 9 files changed, 61 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index e05e7cd6c412..b6b48d25f31e 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -2042,7 +2042,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
 	/* attach connector to encoder */
 	intel_connector_attach_encoder(intel_connector, encoder);
 
-	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL, NULL);
+	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL, NULL);
 
 	mutex_lock(&dev_priv->drm.mode_config.mutex);
 	intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c2987f2c2b2e..64f927f6479d 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -620,14 +620,14 @@ static void dump_pnp_id(struct drm_i915_private *i915,
 
 static int opregion_get_panel_type(struct drm_i915_private *i915,
 				   const struct intel_bios_encoder_data *devdata,
-				   const struct edid *edid)
+				   const struct edid *edid, bool use_fallback)
 {
 	return intel_opregion_get_panel_type(i915);
 }
 
 static int vbt_get_panel_type(struct drm_i915_private *i915,
 			      const struct intel_bios_encoder_data *devdata,
-			      const struct edid *edid)
+			      const struct edid *edid, bool use_fallback)
 {
 	const struct bdb_lvds_options *lvds_options;
 
@@ -652,7 +652,7 @@ static int vbt_get_panel_type(struct drm_i915_private *i915,
 
 static int pnpid_get_panel_type(struct drm_i915_private *i915,
 				const struct intel_bios_encoder_data *devdata,
-				const struct edid *edid)
+				const struct edid *edid, bool use_fallback)
 {
 	const struct bdb_lvds_lfp_data *data;
 	const struct bdb_lvds_lfp_data_ptrs *ptrs;
@@ -701,9 +701,9 @@ static int pnpid_get_panel_type(struct drm_i915_private *i915,
 
 static int fallback_get_panel_type(struct drm_i915_private *i915,
 				   const struct intel_bios_encoder_data *devdata,
-				   const struct edid *edid)
+				   const struct edid *edid, bool use_fallback)
 {
-	return 0;
+	return use_fallback ? 0 : -1;
 }
 
 enum panel_type {
@@ -715,13 +715,13 @@ enum panel_type {
 
 static int get_panel_type(struct drm_i915_private *i915,
 			  const struct intel_bios_encoder_data *devdata,
-			  const struct edid *edid)
+			  const struct edid *edid, bool use_fallback)
 {
 	struct {
 		const char *name;
 		int (*get_panel_type)(struct drm_i915_private *i915,
 				      const struct intel_bios_encoder_data *devdata,
-				      const struct edid *edid);
+				      const struct edid *edid, bool use_fallback);
 		int panel_type;
 	} panel_types[] = {
 		[PANEL_TYPE_OPREGION] = {
@@ -744,7 +744,8 @@ static int get_panel_type(struct drm_i915_private *i915,
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
-		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, edid);
+		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
+									  edid, use_fallback);
 
 		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
 			    panel_types[i].panel_type != 0xff);
@@ -3183,15 +3184,27 @@ void intel_bios_init(struct drm_i915_private *i915)
 	kfree(oprom_vbt);
 }
 
-void intel_bios_init_panel(struct drm_i915_private *i915,
-			   struct intel_panel *panel,
-			   const struct intel_bios_encoder_data *devdata,
-			   const struct edid *edid)
+static void intel_bios_init_panel(struct drm_i915_private *i915,
+				  struct intel_panel *panel,
+				  const struct intel_bios_encoder_data *devdata,
+				  const struct edid *edid,
+				  bool use_fallback)
 {
+	/* already have it? */
+	if (panel->vbt.panel_type >= 0) {
+		drm_WARN_ON(&i915->drm, !use_fallback);
+		return;
+	}
+
+	panel->vbt.panel_type = get_panel_type(i915, devdata,
+					       edid, use_fallback);
+	if (panel->vbt.panel_type < 0) {
+		drm_WARN_ON(&i915->drm, use_fallback);
+		return;
+	}
+
 	init_vbt_panel_defaults(panel);
 
-	panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
-
 	parse_panel_options(i915, panel);
 	parse_generic_dtd(i915, panel);
 	parse_lfp_data(i915, panel);
@@ -3205,6 +3218,21 @@ void intel_bios_init_panel(struct drm_i915_private *i915,
 	parse_mipi_sequence(i915, panel);
 }
 
+void intel_bios_init_panel_early(struct drm_i915_private *i915,
+				 struct intel_panel *panel,
+				 const struct intel_bios_encoder_data *devdata)
+{
+	intel_bios_init_panel(i915, panel, devdata, NULL, false);
+}
+
+void intel_bios_init_panel_late(struct drm_i915_private *i915,
+				struct intel_panel *panel,
+				const struct intel_bios_encoder_data *devdata,
+				const struct edid *edid)
+{
+	intel_bios_init_panel(i915, panel, devdata, edid, true);
+}
+
 /**
  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
  * @i915: i915 device instance
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index e375405a7828..ff1fdd2e0c1c 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -232,10 +232,13 @@ struct mipi_pps_data {
 } __packed;
 
 void intel_bios_init(struct drm_i915_private *dev_priv);
-void intel_bios_init_panel(struct drm_i915_private *dev_priv,
-			   struct intel_panel *panel,
-			   const struct intel_bios_encoder_data *devdata,
-			   const struct edid *edid);
+void intel_bios_init_panel_early(struct drm_i915_private *dev_priv,
+				 struct intel_panel *panel,
+				 const struct intel_bios_encoder_data *devdata);
+void intel_bios_init_panel_late(struct drm_i915_private *dev_priv,
+				struct intel_panel *panel,
+				const struct intel_bios_encoder_data *devdata,
+				const struct edid *edid);
 void intel_bios_fini_panel(struct intel_panel *panel);
 void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
 bool intel_bios_is_valid_vbt(const void *buf, size_t size);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index c6abaaa46e17..aec06cb24e23 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -291,7 +291,7 @@ struct intel_vbt_panel_data {
 	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
 
 	/* Feature bits */
-	unsigned int panel_type:4;
+	int panel_type;
 	unsigned int lvds_dither:1;
 	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7400d6b4c587..509ce003312b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5254,6 +5254,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	intel_bios_init_panel_early(dev_priv, &intel_connector->panel,
+				    encoder->devdata);
+
 	intel_pps_init(intel_dp);
 
 	/* Cache DPCD and EDID for edp. */
@@ -5289,8 +5292,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 	}
 	intel_connector->edid = edid;
 
-	intel_bios_init_panel(dev_priv, &intel_connector->panel,
-			      encoder->devdata, IS_ERR(edid) ? NULL : edid);
+	intel_bios_init_panel_late(dev_priv, &intel_connector->panel,
+				   encoder->devdata, IS_ERR(edid) ? NULL : edid);
 
 	intel_panel_add_edid_fixed_modes(intel_connector, true);
 
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 246787bbf5ef..e19ae171af33 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -963,8 +963,8 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
 	}
 	intel_connector->edid = edid;
 
-	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL,
-			      IS_ERR(edid) ? NULL : edid);
+	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL,
+				   IS_ERR(edid) ? NULL : edid);
 
 	/* Try EDID first */
 	intel_panel_add_edid_fixed_modes(intel_connector, true);
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 8e683ab75594..918b3b9d9ebe 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -664,6 +664,7 @@ void intel_panel_init_alloc(struct intel_connector *connector)
 {
 	struct intel_panel *panel = &connector->panel;
 
+	connector->panel.vbt.panel_type = -1;
 	INIT_LIST_HEAD(&panel->fixed_modes);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 48b7b1aa37b2..b2122aff3f63 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -2885,7 +2885,7 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
 	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
 		goto err;
 
-	intel_bios_init_panel(i915, &intel_connector->panel, NULL, NULL);
+	intel_bios_init_panel_late(i915, &intel_connector->panel, NULL, NULL);
 
 	/*
 	 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 5a741ea4505f..d84352bc1376 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -1915,7 +1915,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
 
 	intel_dsi->panel_power_off_time = ktime_get_boottime();
 
-	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL, NULL);
+	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL, NULL);
 
 	if (intel_connector->panel.vbt.dsi.config->dual_link)
 		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
-- 
2.37.4

Re: [Intel-gfx] [PATCH 2/6] drm/i915: Do panel VBT init early if the VBT declares an explicit panel type

[Jani Nikula]

On Wed, 09 Nov 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Lots of ADL machines out there with bogus VBTs that declare
> two eDP child devices. In order for those to work we need to
> figure out which power sequencer to use before we try the EDID
> read. So let's do the panel VBT init early if we can, falling
> back to the post-EDID init otherwise.
>
> The post-EDID init panel_type=0xff approach of assuming the
> power sequencer should already be enabled doesn't really work
> with multiple eDP panels, and currently we just end up using
> the same power sequencer for both eDP ports, which at least
> confuses the wakeref tracking, and potentially also causes us
> to toggle the VDD for the panel when we should not.

So this doesn't actually fix any of that stuff yet because the PPS code
doesn't handle two PPS for ADL yet.

Other than that,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c        |  2 +-
>  drivers/gpu/drm/i915/display/intel_bios.c     | 56 ++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_bios.h     | 11 ++--
>  .../drm/i915/display/intel_display_types.h    |  2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c       |  7 ++-
>  drivers/gpu/drm/i915/display/intel_lvds.c     |  4 +-
>  drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
>  drivers/gpu/drm/i915/display/intel_sdvo.c     |  2 +-
>  drivers/gpu/drm/i915/display/vlv_dsi.c        |  2 +-
>  9 files changed, 61 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index e05e7cd6c412..b6b48d25f31e 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -2042,7 +2042,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
>  	/* attach connector to encoder */
>  	intel_connector_attach_encoder(intel_connector, encoder);
>  
> -	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL, NULL);
> +	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL, NULL);
>  
>  	mutex_lock(&dev_priv->drm.mode_config.mutex);
>  	intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index c2987f2c2b2e..64f927f6479d 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -620,14 +620,14 @@ static void dump_pnp_id(struct drm_i915_private *i915,
>  
>  static int opregion_get_panel_type(struct drm_i915_private *i915,
>  				   const struct intel_bios_encoder_data *devdata,
> -				   const struct edid *edid)
> +				   const struct edid *edid, bool use_fallback)
>  {
>  	return intel_opregion_get_panel_type(i915);
>  }
>  
>  static int vbt_get_panel_type(struct drm_i915_private *i915,
>  			      const struct intel_bios_encoder_data *devdata,
> -			      const struct edid *edid)
> +			      const struct edid *edid, bool use_fallback)
>  {
>  	const struct bdb_lvds_options *lvds_options;
>  
> @@ -652,7 +652,7 @@ static int vbt_get_panel_type(struct drm_i915_private *i915,
>  
>  static int pnpid_get_panel_type(struct drm_i915_private *i915,
>  				const struct intel_bios_encoder_data *devdata,
> -				const struct edid *edid)
> +				const struct edid *edid, bool use_fallback)
>  {
>  	const struct bdb_lvds_lfp_data *data;
>  	const struct bdb_lvds_lfp_data_ptrs *ptrs;
> @@ -701,9 +701,9 @@ static int pnpid_get_panel_type(struct drm_i915_private *i915,
>  
>  static int fallback_get_panel_type(struct drm_i915_private *i915,
>  				   const struct intel_bios_encoder_data *devdata,
> -				   const struct edid *edid)
> +				   const struct edid *edid, bool use_fallback)
>  {
> -	return 0;
> +	return use_fallback ? 0 : -1;
>  }
>  
>  enum panel_type {
> @@ -715,13 +715,13 @@ enum panel_type {
>  
>  static int get_panel_type(struct drm_i915_private *i915,
>  			  const struct intel_bios_encoder_data *devdata,
> -			  const struct edid *edid)
> +			  const struct edid *edid, bool use_fallback)
>  {
>  	struct {
>  		const char *name;
>  		int (*get_panel_type)(struct drm_i915_private *i915,
>  				      const struct intel_bios_encoder_data *devdata,
> -				      const struct edid *edid);
> +				      const struct edid *edid, bool use_fallback);
>  		int panel_type;
>  	} panel_types[] = {
>  		[PANEL_TYPE_OPREGION] = {
> @@ -744,7 +744,8 @@ static int get_panel_type(struct drm_i915_private *i915,
>  	int i;
>  
>  	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
> -		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata, edid);
> +		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
> +									  edid, use_fallback);
>  
>  		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
>  			    panel_types[i].panel_type != 0xff);
> @@ -3183,15 +3184,27 @@ void intel_bios_init(struct drm_i915_private *i915)
>  	kfree(oprom_vbt);
>  }
>  
> -void intel_bios_init_panel(struct drm_i915_private *i915,
> -			   struct intel_panel *panel,
> -			   const struct intel_bios_encoder_data *devdata,
> -			   const struct edid *edid)
> +static void intel_bios_init_panel(struct drm_i915_private *i915,
> +				  struct intel_panel *panel,
> +				  const struct intel_bios_encoder_data *devdata,
> +				  const struct edid *edid,
> +				  bool use_fallback)
>  {
> +	/* already have it? */
> +	if (panel->vbt.panel_type >= 0) {
> +		drm_WARN_ON(&i915->drm, !use_fallback);
> +		return;
> +	}
> +
> +	panel->vbt.panel_type = get_panel_type(i915, devdata,
> +					       edid, use_fallback);
> +	if (panel->vbt.panel_type < 0) {
> +		drm_WARN_ON(&i915->drm, use_fallback);
> +		return;
> +	}
> +
>  	init_vbt_panel_defaults(panel);
>  
> -	panel->vbt.panel_type = get_panel_type(i915, devdata, edid);
> -
>  	parse_panel_options(i915, panel);
>  	parse_generic_dtd(i915, panel);
>  	parse_lfp_data(i915, panel);
> @@ -3205,6 +3218,21 @@ void intel_bios_init_panel(struct drm_i915_private *i915,
>  	parse_mipi_sequence(i915, panel);
>  }
>  
> +void intel_bios_init_panel_early(struct drm_i915_private *i915,
> +				 struct intel_panel *panel,
> +				 const struct intel_bios_encoder_data *devdata)
> +{
> +	intel_bios_init_panel(i915, panel, devdata, NULL, false);
> +}
> +
> +void intel_bios_init_panel_late(struct drm_i915_private *i915,
> +				struct intel_panel *panel,
> +				const struct intel_bios_encoder_data *devdata,
> +				const struct edid *edid)
> +{
> +	intel_bios_init_panel(i915, panel, devdata, edid, true);
> +}
> +
>  /**
>   * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
>   * @i915: i915 device instance
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
> index e375405a7828..ff1fdd2e0c1c 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -232,10 +232,13 @@ struct mipi_pps_data {
>  } __packed;
>  
>  void intel_bios_init(struct drm_i915_private *dev_priv);
> -void intel_bios_init_panel(struct drm_i915_private *dev_priv,
> -			   struct intel_panel *panel,
> -			   const struct intel_bios_encoder_data *devdata,
> -			   const struct edid *edid);
> +void intel_bios_init_panel_early(struct drm_i915_private *dev_priv,
> +				 struct intel_panel *panel,
> +				 const struct intel_bios_encoder_data *devdata);
> +void intel_bios_init_panel_late(struct drm_i915_private *dev_priv,
> +				struct intel_panel *panel,
> +				const struct intel_bios_encoder_data *devdata,
> +				const struct edid *edid);
>  void intel_bios_fini_panel(struct intel_panel *panel);
>  void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
>  bool intel_bios_is_valid_vbt(const void *buf, size_t size);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index c6abaaa46e17..aec06cb24e23 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -291,7 +291,7 @@ struct intel_vbt_panel_data {
>  	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
>  
>  	/* Feature bits */
> -	unsigned int panel_type:4;
> +	int panel_type;
>  	unsigned int lvds_dither:1;
>  	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7400d6b4c587..509ce003312b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5254,6 +5254,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  		return false;
>  	}
>  
> +	intel_bios_init_panel_early(dev_priv, &intel_connector->panel,
> +				    encoder->devdata);
> +
>  	intel_pps_init(intel_dp);
>  
>  	/* Cache DPCD and EDID for edp. */
> @@ -5289,8 +5292,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  	}
>  	intel_connector->edid = edid;
>  
> -	intel_bios_init_panel(dev_priv, &intel_connector->panel,
> -			      encoder->devdata, IS_ERR(edid) ? NULL : edid);
> +	intel_bios_init_panel_late(dev_priv, &intel_connector->panel,
> +				   encoder->devdata, IS_ERR(edid) ? NULL : edid);
>  
>  	intel_panel_add_edid_fixed_modes(intel_connector, true);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 246787bbf5ef..e19ae171af33 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -963,8 +963,8 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
>  	}
>  	intel_connector->edid = edid;
>  
> -	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL,
> -			      IS_ERR(edid) ? NULL : edid);
> +	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL,
> +				   IS_ERR(edid) ? NULL : edid);
>  
>  	/* Try EDID first */
>  	intel_panel_add_edid_fixed_modes(intel_connector, true);
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 8e683ab75594..918b3b9d9ebe 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -664,6 +664,7 @@ void intel_panel_init_alloc(struct intel_connector *connector)
>  {
>  	struct intel_panel *panel = &connector->panel;
>  
> +	connector->panel.vbt.panel_type = -1;
>  	INIT_LIST_HEAD(&panel->fixed_modes);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 48b7b1aa37b2..b2122aff3f63 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -2885,7 +2885,7 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
>  	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
>  		goto err;
>  
> -	intel_bios_init_panel(i915, &intel_connector->panel, NULL, NULL);
> +	intel_bios_init_panel_late(i915, &intel_connector->panel, NULL, NULL);
>  
>  	/*
>  	 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index 5a741ea4505f..d84352bc1376 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -1915,7 +1915,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
>  
>  	intel_dsi->panel_power_off_time = ktime_get_boottime();
>  
> -	intel_bios_init_panel(dev_priv, &intel_connector->panel, NULL, NULL);
> +	intel_bios_init_panel_late(dev_priv, &intel_connector->panel, NULL, NULL);
>  
>  	if (intel_connector->panel.vbt.dsi.config->dual_link)
>  		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 3/6] drm/i915: Generalize the PPS vlv_pipe_check() stuff

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Restate the vlv_pipe_check() stuff in terms of PPS index
(rather than pipe, which it is on VLV/CHV) so that we can
reuse this same mechanim on other platforms as well.

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_pps.c | 27 ++++++++++--------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 22f5e08d396b..84265096f751 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -233,31 +233,26 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	return backlight_controller;
 }
 
-typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv,
-			       enum pipe pipe);
+typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx);
 
-static bool vlv_pipe_has_pp_on(struct drm_i915_private *dev_priv,
-			       enum pipe pipe)
+static bool pps_has_pp_on(struct drm_i915_private *dev_priv, int pps_idx)
 {
-	return intel_de_read(dev_priv, PP_STATUS(pipe)) & PP_ON;
+	return intel_de_read(dev_priv, PP_STATUS(pps_idx)) & PP_ON;
 }
 
-static bool vlv_pipe_has_vdd_on(struct drm_i915_private *dev_priv,
-				enum pipe pipe)
+static bool pps_has_vdd_on(struct drm_i915_private *dev_priv, int pps_idx)
 {
-	return intel_de_read(dev_priv, PP_CONTROL(pipe)) & EDP_FORCE_VDD;
+	return intel_de_read(dev_priv, PP_CONTROL(pps_idx)) & EDP_FORCE_VDD;
 }
 
-static bool vlv_pipe_any(struct drm_i915_private *dev_priv,
-			 enum pipe pipe)
+static bool pps_any(struct drm_i915_private *dev_priv, int pps_idx)
 {
 	return true;
 }
 
 static enum pipe
 vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
-		     enum port port,
-		     vlv_pipe_check pipe_check)
+		     enum port port, pps_check check)
 {
 	enum pipe pipe;
 
@@ -268,7 +263,7 @@ vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
 		if (port_sel != PANEL_PORT_SELECT_VLV(port))
 			continue;
 
-		if (!pipe_check(dev_priv, pipe))
+		if (!check(dev_priv, pipe))
 			continue;
 
 		return pipe;
@@ -289,15 +284,15 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
 	/* try to find a pipe with this port selected */
 	/* first pick one where the panel is on */
 	intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
-						      vlv_pipe_has_pp_on);
+						      pps_has_pp_on);
 	/* didn't find one? pick one where vdd is on */
 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
-							      vlv_pipe_has_vdd_on);
+							      pps_has_vdd_on);
 	/* didn't find one? pick one with just the correct port */
 	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
 		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
-							      vlv_pipe_any);
+							      pps_any);
 
 	/* didn't find one? just let vlv_power_sequencer_pipe() pick one when needed */
 	if (intel_dp->pps.pps_pipe == INVALID_PIPE) {
-- 
2.37.4

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Generalize the PPS vlv_pipe_check() stuff

[Jani Nikula]

On Wed, 09 Nov 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Restate the vlv_pipe_check() stuff in terms of PPS index
> (rather than pipe, which it is on VLV/CHV) so that we can
> reuse this same mechanim on other platforms as well.
>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 27 ++++++++++--------------
>  1 file changed, 11 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 22f5e08d396b..84265096f751 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -233,31 +233,26 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
>  	return backlight_controller;
>  }
>  
> -typedef bool (*vlv_pipe_check)(struct drm_i915_private *dev_priv,
> -			       enum pipe pipe);
> +typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx);
>  
> -static bool vlv_pipe_has_pp_on(struct drm_i915_private *dev_priv,
> -			       enum pipe pipe)
> +static bool pps_has_pp_on(struct drm_i915_private *dev_priv, int pps_idx)
>  {
> -	return intel_de_read(dev_priv, PP_STATUS(pipe)) & PP_ON;
> +	return intel_de_read(dev_priv, PP_STATUS(pps_idx)) & PP_ON;
>  }
>  
> -static bool vlv_pipe_has_vdd_on(struct drm_i915_private *dev_priv,
> -				enum pipe pipe)
> +static bool pps_has_vdd_on(struct drm_i915_private *dev_priv, int pps_idx)
>  {
> -	return intel_de_read(dev_priv, PP_CONTROL(pipe)) & EDP_FORCE_VDD;
> +	return intel_de_read(dev_priv, PP_CONTROL(pps_idx)) & EDP_FORCE_VDD;
>  }
>  
> -static bool vlv_pipe_any(struct drm_i915_private *dev_priv,
> -			 enum pipe pipe)
> +static bool pps_any(struct drm_i915_private *dev_priv, int pps_idx)
>  {
>  	return true;
>  }
>  
>  static enum pipe
>  vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
> -		     enum port port,
> -		     vlv_pipe_check pipe_check)
> +		     enum port port, pps_check check)
>  {
>  	enum pipe pipe;
>  
> @@ -268,7 +263,7 @@ vlv_initial_pps_pipe(struct drm_i915_private *dev_priv,
>  		if (port_sel != PANEL_PORT_SELECT_VLV(port))
>  			continue;
>  
> -		if (!pipe_check(dev_priv, pipe))
> +		if (!check(dev_priv, pipe))
>  			continue;
>  
>  		return pipe;
> @@ -289,15 +284,15 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
>  	/* try to find a pipe with this port selected */
>  	/* first pick one where the panel is on */
>  	intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -						      vlv_pipe_has_pp_on);
> +						      pps_has_pp_on);
>  	/* didn't find one? pick one where vdd is on */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
>  		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -							      vlv_pipe_has_vdd_on);
> +							      pps_has_vdd_on);
>  	/* didn't find one? pick one with just the correct port */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE)
>  		intel_dp->pps.pps_pipe = vlv_initial_pps_pipe(dev_priv, port,
> -							      vlv_pipe_any);
> +							      pps_any);
>  
>  	/* didn't find one? just let vlv_power_sequencer_pipe() pick one when needed */
>  	if (intel_dp->pps.pps_pipe == INVALID_PIPE) {

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially on bxt/glk

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently on bxt/glk we just grab the power sequencer index from
the VBT data even though it may not have been parsed yet. That
could lead us to using the incorrect power sequencer during the
initial panel probe.

To avoid that let's try to read out the current state of the
power sequencer from the hardware. Unfortunately the power
sequencer no longer has anything in its registers to associate
it with the port, so the best we can do is just iterate through
the power sequencers and pick the first one. This should be
sufficient for single panel cases.

For the dual panel cases we probably need to go back to
parsing the VBT before the panel probe (and hope that
panel_type=0xff is never a thing in those cases). To that
end the code always prefers the VBT panel sequencer, if
available.

TODO: Deal with all the modern platforms too
      Maybe add checks to make sure the same power
      sequencer doesn't get assigned to multiple ports?

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  8 +-
 drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
 drivers/gpu/drm/i915/display/intel_pps.c      | 78 +++++++++++++++++--
 3 files changed, 80 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index aec06cb24e23..25165110142b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -330,7 +330,7 @@ struct intel_vbt_panel_data {
 		bool present;
 		bool active_low_pwm;
 		u8 min_brightness;	/* min_brightness/255 of max */
-		u8 controller;		/* brightness controller number */
+		s8 controller;		/* brightness controller number */
 		enum intel_backlight_type type;
 	} backlight;
 
@@ -1571,9 +1571,13 @@ struct intel_pps {
 	enum pipe active_pipe;
 	/*
 	 * Set if the sequencer may be reset due to a power transition,
-	 * requiring a reinitialization. Only relevant on BXT.
+	 * requiring a reinitialization. Only relevant on BXT+.
 	 */
 	bool pps_reset;
+	/*
+	 * Power sequencer index. Only relevant on BXT+.
+	 */
+	s8 pps_idx;
 	struct edp_power_seq pps_delays;
 	struct edp_power_seq bios_pps_delays;
 };
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 918b3b9d9ebe..1794e5eecf90 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -665,6 +665,7 @@ void intel_panel_init_alloc(struct intel_connector *connector)
 	struct intel_panel *panel = &connector->panel;
 
 	connector->panel.vbt.panel_type = -1;
+	connector->panel.vbt.backlight.controller = -1;
 	INIT_LIST_HEAD(&panel->fixed_modes);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 84265096f751..ff4f1def59d2 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -211,8 +211,7 @@ static int
 bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	struct intel_connector *connector = intel_dp->attached_connector;
-	int backlight_controller = connector->panel.vbt.backlight.controller;
+	int pps_idx = intel_dp->pps.pps_idx;
 
 	lockdep_assert_held(&dev_priv->display.pps.mutex);
 
@@ -220,7 +219,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
 
 	if (!intel_dp->pps.pps_reset)
-		return backlight_controller;
+		return pps_idx;
 
 	intel_dp->pps.pps_reset = false;
 
@@ -230,7 +229,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
 	 */
 	pps_init_registers(intel_dp, false);
 
-	return backlight_controller;
+	return pps_idx;
 }
 
 typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx);
@@ -310,6 +309,54 @@ vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)
 		    pipe_name(intel_dp->pps.pps_pipe));
 }
 
+static int
+bxt_initial_pps_idx(struct drm_i915_private *i915, pps_check check)
+{
+	int pps_idx, pps_num = 2;
+
+	for (pps_idx = 0; pps_idx < pps_num; pps_idx++) {
+		if (check(i915, pps_idx))
+			return pps_idx;
+	}
+
+	return -1;
+};
+
+static void
+bxt_initial_power_sequencer_setup(struct intel_dp *intel_dp)
+{
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	struct intel_connector *connector = intel_dp->attached_connector;
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+	lockdep_assert_held(&i915->display.pps.mutex);
+
+	/* first ask the VBT */
+	intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;
+
+	/* VBT wasn't parsed yet? pick one where the panel is on */
+	if (intel_dp->pps.pps_idx < 0)
+		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_has_pp_on);
+	/* didn't find one? pick one where vdd is on */
+	if (intel_dp->pps.pps_idx < 0)
+		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_has_vdd_on);
+	/* didn't find one? pick any */
+	if (intel_dp->pps.pps_idx < 0) {
+		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_any);
+
+		drm_dbg_kms(&i915->drm,
+			    "[ENCODER:%d:%s] no initial power sequencer, assuming %d\n",
+			    encoder->base.base.id, encoder->base.name,
+			    intel_dp->pps.pps_idx);
+		return;
+	}
+
+	drm_dbg_kms(&i915->drm,
+		    "[ENCODER:%d:%s] initial power sequencer: %d\n",
+		    encoder->base.base.id, encoder->base.name,
+		    intel_dp->pps.pps_idx);
+}
+
 void intel_pps_reset_all(struct drm_i915_private *dev_priv)
 {
 	struct intel_encoder *encoder;
@@ -1431,7 +1478,9 @@ void intel_pps_init(struct intel_dp *intel_dp)
 	pps_init_timestamps(intel_dp);
 
 	with_intel_pps_lock(intel_dp, wakeref) {
-		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+			bxt_initial_power_sequencer_setup(intel_dp);
+		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
 			vlv_initial_power_sequencer_setup(intel_dp);
 
 		pps_init_delays(intel_dp);
@@ -1440,12 +1489,31 @@ void intel_pps_init(struct intel_dp *intel_dp)
 	}
 }
 
+static void bxt_pps_init_late(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+	struct intel_connector *connector = intel_dp->attached_connector;
+
+	drm_WARN(&i915->drm, connector->panel.vbt.backlight.controller >= 0 &&
+		 intel_dp->pps.pps_idx != connector->panel.vbt.backlight.controller,
+		 "[ENCODER:%d:%s] power sequencer mismatch: %d (initial) vs. %d (VBT)\n",
+		 encoder->base.base.id, encoder->base.name,
+		 intel_dp->pps.pps_idx, connector->panel.vbt.backlight.controller);
+
+	if (connector->panel.vbt.backlight.controller >= 0)
+		intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;
+}
+
 void intel_pps_init_late(struct intel_dp *intel_dp)
 {
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	intel_wakeref_t wakeref;
 
 	with_intel_pps_lock(intel_dp, wakeref) {
 		/* Reinit delays after per-panel info has been parsed from VBT */
+		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+			bxt_pps_init_late(intel_dp);
 		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));
 		pps_init_delays(intel_dp);
 		pps_init_registers(intel_dp, false);
-- 
2.37.4

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially on bxt/glk

[Manna, Animesh]

> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Wednesday, November 9, 2022 4:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>
> Subject: [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially
> on bxt/glk
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently on bxt/glk we just grab the power sequencer index from the VBT data
> even though it may not have been parsed yet. That could lead us to using the
> incorrect power sequencer during the initial panel probe.
> 
> To avoid that let's try to read out the current state of the power sequencer from
> the hardware. Unfortunately the power sequencer no longer has anything in its
> registers to associate it with the port, so the best we can do is just iterate
> through the power sequencers and pick the first one. This should be sufficient
> for single panel cases.
> 
> For the dual panel cases we probably need to go back to parsing the VBT before
> the panel probe (and hope that panel_type=0xff is never a thing in those cases).
> To that end the code always prefers the VBT panel sequencer, if available.
> 
> TODO: Deal with all the modern platforms too
>       Maybe add checks to make sure the same power
>       sequencer doesn't get assigned to multiple ports?
> 
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |  8 +-
>  drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
>  drivers/gpu/drm/i915/display/intel_pps.c      | 78 +++++++++++++++++--
>  3 files changed, 80 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index aec06cb24e23..25165110142b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -330,7 +330,7 @@ struct intel_vbt_panel_data {
>  		bool present;
>  		bool active_low_pwm;
>  		u8 min_brightness;	/* min_brightness/255 of max */
> -		u8 controller;		/* brightness controller number */
> +		s8 controller;		/* brightness controller number */
>  		enum intel_backlight_type type;
>  	} backlight;
> 
> @@ -1571,9 +1571,13 @@ struct intel_pps {
>  	enum pipe active_pipe;
>  	/*
>  	 * Set if the sequencer may be reset due to a power transition,
> -	 * requiring a reinitialization. Only relevant on BXT.
> +	 * requiring a reinitialization. Only relevant on BXT+.
>  	 */
>  	bool pps_reset;
> +	/*
> +	 * Power sequencer index. Only relevant on BXT+.
> +	 */
> +	s8 pps_idx;
>  	struct edp_power_seq pps_delays;
>  	struct edp_power_seq bios_pps_delays;
>  };
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 918b3b9d9ebe..1794e5eecf90 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -665,6 +665,7 @@ void intel_panel_init_alloc(struct intel_connector
> *connector)
>  	struct intel_panel *panel = &connector->panel;
> 
>  	connector->panel.vbt.panel_type = -1;
> +	connector->panel.vbt.backlight.controller = -1;
>  	INIT_LIST_HEAD(&panel->fixed_modes);
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index 84265096f751..ff4f1def59d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -211,8 +211,7 @@ static int
>  bxt_power_sequencer_idx(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	struct intel_connector *connector = intel_dp->attached_connector;
> -	int backlight_controller = connector->panel.vbt.backlight.controller;
> +	int pps_idx = intel_dp->pps.pps_idx;
> 
>  	lockdep_assert_held(&dev_priv->display.pps.mutex);
> 
> @@ -220,7 +219,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
>  	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
> 
>  	if (!intel_dp->pps.pps_reset)
> -		return backlight_controller;
> +		return pps_idx;
> 
>  	intel_dp->pps.pps_reset = false;
> 
> @@ -230,7 +229,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
>  	 */
>  	pps_init_registers(intel_dp, false);
> 
> -	return backlight_controller;
> +	return pps_idx;
>  }
> 
>  typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx); @@
> -310,6 +309,54 @@ vlv_initial_power_sequencer_setup(struct intel_dp
> *intel_dp)
>  		    pipe_name(intel_dp->pps.pps_pipe));
>  }
> 
> +static int
> +bxt_initial_pps_idx(struct drm_i915_private *i915, pps_check check) {
> +	int pps_idx, pps_num = 2;
> +
> +	for (pps_idx = 0; pps_idx < pps_num; pps_idx++) {
> +		if (check(i915, pps_idx))
> +			return pps_idx;
> +	}
> +
> +	return -1;
> +};
> +
> +static void
> +bxt_initial_power_sequencer_setup(struct intel_dp *intel_dp) {
> +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> +	lockdep_assert_held(&i915->display.pps.mutex);
> +
> +	/* first ask the VBT */
> +	intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;
> +  
> +	/* VBT wasn't parsed yet? pick one where the panel is on */
> +	if (intel_dp->pps.pps_idx < 0)
> +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915,
> pps_has_pp_on);

Always we will get 0 here even if bios enabled correctly two pps instance for dual EDP.
Can pps be mapped with port number, like pps1 for portA and pps2 for portB?
 
> +	/* didn't find one? pick one where vdd is on */
> +	if (intel_dp->pps.pps_idx < 0)
> +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915,
> pps_has_vdd_on);

Same as above for vdd.

> +	/* didn't find one? pick any */
> +	if (intel_dp->pps.pps_idx < 0) {
> +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_any);

pps_any() is returning bool, any specific reason? Can we return 0 from it. 

Regards,
Animesh 

> +
> +		drm_dbg_kms(&i915->drm,
> +			    "[ENCODER:%d:%s] no initial power sequencer,
> assuming %d\n",
> +			    encoder->base.base.id, encoder->base.name,
> +			    intel_dp->pps.pps_idx);
> +		return;
> +	}
> +
> +	drm_dbg_kms(&i915->drm,
> +		    "[ENCODER:%d:%s] initial power sequencer: %d\n",
> +		    encoder->base.base.id, encoder->base.name,
> +		    intel_dp->pps.pps_idx);
> +}
> +
>  void intel_pps_reset_all(struct drm_i915_private *dev_priv)  {
>  	struct intel_encoder *encoder;
> @@ -1431,7 +1478,9 @@ void intel_pps_init(struct intel_dp *intel_dp)
>  	pps_init_timestamps(intel_dp);
> 
>  	with_intel_pps_lock(intel_dp, wakeref) {
> -		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> +		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +			bxt_initial_power_sequencer_setup(intel_dp);
> +		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>  			vlv_initial_power_sequencer_setup(intel_dp);
> 
>  		pps_init_delays(intel_dp);
> @@ -1440,12 +1489,31 @@ void intel_pps_init(struct intel_dp *intel_dp)
>  	}
>  }
> 
> +static void bxt_pps_init_late(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> +	struct intel_connector *connector = intel_dp->attached_connector;
> +
> +	drm_WARN(&i915->drm, connector->panel.vbt.backlight.controller >= 0
> &&
> +		 intel_dp->pps.pps_idx != connector-
> >panel.vbt.backlight.controller,
> +		 "[ENCODER:%d:%s] power sequencer mismatch: %d (initial) vs.
> %d (VBT)\n",
> +		 encoder->base.base.id, encoder->base.name,
> +		 intel_dp->pps.pps_idx, connector-
> >panel.vbt.backlight.controller);
> +
> +	if (connector->panel.vbt.backlight.controller >= 0)
> +		intel_dp->pps.pps_idx = connector-
> >panel.vbt.backlight.controller;
> +}
> +
>  void intel_pps_init_late(struct intel_dp *intel_dp)  {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	intel_wakeref_t wakeref;
> 
>  	with_intel_pps_lock(intel_dp, wakeref) {
>  		/* Reinit delays after per-panel info has been parsed from VBT
> */
> +		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +			bxt_pps_init_late(intel_dp);
>  		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp-
> >pps.pps_delays));
>  		pps_init_delays(intel_dp);
>  		pps_init_registers(intel_dp, false);
> --
> 2.37.4

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially on bxt/glk

[Ville Syrjälä]

On Thu, Nov 10, 2022 at 01:56:46PM +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Sent: Wednesday, November 9, 2022 4:47 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Manna, Animesh <animesh.manna@intel.com>
> > Subject: [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially
> > on bxt/glk
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Currently on bxt/glk we just grab the power sequencer index from the VBT data
> > even though it may not have been parsed yet. That could lead us to using the
> > incorrect power sequencer during the initial panel probe.
> > 
> > To avoid that let's try to read out the current state of the power sequencer from
> > the hardware. Unfortunately the power sequencer no longer has anything in its
> > registers to associate it with the port, so the best we can do is just iterate
> > through the power sequencers and pick the first one. This should be sufficient
> > for single panel cases.
> > 
> > For the dual panel cases we probably need to go back to parsing the VBT before
> > the panel probe (and hope that panel_type=0xff is never a thing in those cases).
> > To that end the code always prefers the VBT panel sequencer, if available.
> > 
> > TODO: Deal with all the modern platforms too
> >       Maybe add checks to make sure the same power
> >       sequencer doesn't get assigned to multiple ports?
> > 
> > Cc: Animesh Manna <animesh.manna@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  .../drm/i915/display/intel_display_types.h    |  8 +-
> >  drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
> >  drivers/gpu/drm/i915/display/intel_pps.c      | 78 +++++++++++++++++--
> >  3 files changed, 80 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index aec06cb24e23..25165110142b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -330,7 +330,7 @@ struct intel_vbt_panel_data {
> >  		bool present;
> >  		bool active_low_pwm;
> >  		u8 min_brightness;	/* min_brightness/255 of max */
> > -		u8 controller;		/* brightness controller number */
> > +		s8 controller;		/* brightness controller number */
> >  		enum intel_backlight_type type;
> >  	} backlight;
> > 
> > @@ -1571,9 +1571,13 @@ struct intel_pps {
> >  	enum pipe active_pipe;
> >  	/*
> >  	 * Set if the sequencer may be reset due to a power transition,
> > -	 * requiring a reinitialization. Only relevant on BXT.
> > +	 * requiring a reinitialization. Only relevant on BXT+.
> >  	 */
> >  	bool pps_reset;
> > +	/*
> > +	 * Power sequencer index. Only relevant on BXT+.
> > +	 */
> > +	s8 pps_idx;
> >  	struct edp_power_seq pps_delays;
> >  	struct edp_power_seq bios_pps_delays;
> >  };
> > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> > b/drivers/gpu/drm/i915/display/intel_panel.c
> > index 918b3b9d9ebe..1794e5eecf90 100644
> > --- a/drivers/gpu/drm/i915/display/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> > @@ -665,6 +665,7 @@ void intel_panel_init_alloc(struct intel_connector
> > *connector)
> >  	struct intel_panel *panel = &connector->panel;
> > 
> >  	connector->panel.vbt.panel_type = -1;
> > +	connector->panel.vbt.backlight.controller = -1;
> >  	INIT_LIST_HEAD(&panel->fixed_modes);
> >  }
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> > b/drivers/gpu/drm/i915/display/intel_pps.c
> > index 84265096f751..ff4f1def59d2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pps.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> > @@ -211,8 +211,7 @@ static int
> >  bxt_power_sequencer_idx(struct intel_dp *intel_dp)  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	struct intel_connector *connector = intel_dp->attached_connector;
> > -	int backlight_controller = connector->panel.vbt.backlight.controller;
> > +	int pps_idx = intel_dp->pps.pps_idx;
> > 
> >  	lockdep_assert_held(&dev_priv->display.pps.mutex);
> > 
> > @@ -220,7 +219,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
> >  	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
> > 
> >  	if (!intel_dp->pps.pps_reset)
> > -		return backlight_controller;
> > +		return pps_idx;
> > 
> >  	intel_dp->pps.pps_reset = false;
> > 
> > @@ -230,7 +229,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
> >  	 */
> >  	pps_init_registers(intel_dp, false);
> > 
> > -	return backlight_controller;
> > +	return pps_idx;
> >  }
> > 
> >  typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx); @@
> > -310,6 +309,54 @@ vlv_initial_power_sequencer_setup(struct intel_dp
> > *intel_dp)
> >  		    pipe_name(intel_dp->pps.pps_pipe));
> >  }
> > 
> > +static int
> > +bxt_initial_pps_idx(struct drm_i915_private *i915, pps_check check) {
> > +	int pps_idx, pps_num = 2;
> > +
> > +	for (pps_idx = 0; pps_idx < pps_num; pps_idx++) {
> > +		if (check(i915, pps_idx))
> > +			return pps_idx;
> > +	}
> > +
> > +	return -1;
> > +};
> > +
> > +static void
> > +bxt_initial_power_sequencer_setup(struct intel_dp *intel_dp) {
> > +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> > +	struct intel_connector *connector = intel_dp->attached_connector;
> > +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> > +
> > +	lockdep_assert_held(&i915->display.pps.mutex);
> > +
> > +	/* first ask the VBT */
> > +	intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;
> > +  
> > +	/* VBT wasn't parsed yet? pick one where the panel is on */
> > +	if (intel_dp->pps.pps_idx < 0)
> > +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915,
> > pps_has_pp_on);
> 
> Always we will get 0 here even if bios enabled correctly two pps instance for dual EDP.

Yeah, dual eDP isn't really 100% possible to get right here since the
hardware doesn't tell us which port is associated with which pps.

> Can pps be mapped with port number, like pps1 for portA and pps2 for portB?

I guess we could try something like that as the initial pass. Dunno if
that sort of behaviour is really documented anywhere though, or is it
just assumed that VBT will tell us the mapping explicitly in dual eDP
cases? Also it's not clear what mapping we should use for port != A|B.

Another idea I was thinking is to mark each PPS as in use once we manage
to probe something with it, and then skip those on subsequent probes.
But that still doesn't guarantee the mapping is correct if both PPSes
are enable when we do the EDID read.

>  
> > +	/* didn't find one? pick one where vdd is on */
> > +	if (intel_dp->pps.pps_idx < 0)
> > +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915,
> > pps_has_vdd_on);
> 
> Same as above for vdd.
> 
> > +	/* didn't find one? pick any */
> > +	if (intel_dp->pps.pps_idx < 0) {
> > +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915, pps_any);
> 
> pps_any() is returning bool, any specific reason? Can we return 0 from it. 

They all return bool.

> 
> Regards,
> Animesh 
> 
> > +
> > +		drm_dbg_kms(&i915->drm,
> > +			    "[ENCODER:%d:%s] no initial power sequencer,
> > assuming %d\n",
> > +			    encoder->base.base.id, encoder->base.name,
> > +			    intel_dp->pps.pps_idx);
> > +		return;
> > +	}
> > +
> > +	drm_dbg_kms(&i915->drm,
> > +		    "[ENCODER:%d:%s] initial power sequencer: %d\n",
> > +		    encoder->base.base.id, encoder->base.name,
> > +		    intel_dp->pps.pps_idx);
> > +}
> > +
> >  void intel_pps_reset_all(struct drm_i915_private *dev_priv)  {
> >  	struct intel_encoder *encoder;
> > @@ -1431,7 +1478,9 @@ void intel_pps_init(struct intel_dp *intel_dp)
> >  	pps_init_timestamps(intel_dp);
> > 
> >  	with_intel_pps_lock(intel_dp, wakeref) {
> > -		if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> > +		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> > +			bxt_initial_power_sequencer_setup(intel_dp);
> > +		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
> >  			vlv_initial_power_sequencer_setup(intel_dp);
> > 
> >  		pps_init_delays(intel_dp);
> > @@ -1440,12 +1489,31 @@ void intel_pps_init(struct intel_dp *intel_dp)
> >  	}
> >  }
> > 
> > +static void bxt_pps_init_late(struct intel_dp *intel_dp) {
> > +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> > +	struct intel_connector *connector = intel_dp->attached_connector;
> > +
> > +	drm_WARN(&i915->drm, connector->panel.vbt.backlight.controller >= 0
> > &&
> > +		 intel_dp->pps.pps_idx != connector-
> > >panel.vbt.backlight.controller,
> > +		 "[ENCODER:%d:%s] power sequencer mismatch: %d (initial) vs.
> > %d (VBT)\n",
> > +		 encoder->base.base.id, encoder->base.name,
> > +		 intel_dp->pps.pps_idx, connector-
> > >panel.vbt.backlight.controller);
> > +
> > +	if (connector->panel.vbt.backlight.controller >= 0)
> > +		intel_dp->pps.pps_idx = connector-
> > >panel.vbt.backlight.controller;
> > +}
> > +
> >  void intel_pps_init_late(struct intel_dp *intel_dp)  {
> > +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> >  	intel_wakeref_t wakeref;
> > 
> >  	with_intel_pps_lock(intel_dp, wakeref) {
> >  		/* Reinit delays after per-panel info has been parsed from VBT
> > */
> > +		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> > +			bxt_pps_init_late(intel_dp);
> >  		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp-
> > >pps.pps_delays));
> >  		pps_init_delays(intel_dp);
> >  		pps_init_registers(intel_dp, false);
> > --
> > 2.37.4
> 

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially on bxt/glk

[Ville Syrjälä]

On Thu, Nov 10, 2022 at 04:41:24PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 10, 2022 at 01:56:46PM +0000, Manna, Animesh wrote:
> > 
> > 
> > > -----Original Message-----
> > > From: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > Sent: Wednesday, November 9, 2022 4:47 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: Manna, Animesh <animesh.manna@intel.com>
> > > Subject: [PATCH 4/6] drm/i915: Try to use the correct power sequencer intiially
> > > on bxt/glk
> > > 
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Currently on bxt/glk we just grab the power sequencer index from the VBT data
> > > even though it may not have been parsed yet. That could lead us to using the
> > > incorrect power sequencer during the initial panel probe.
> > > 
> > > To avoid that let's try to read out the current state of the power sequencer from
> > > the hardware. Unfortunately the power sequencer no longer has anything in its
> > > registers to associate it with the port, so the best we can do is just iterate
> > > through the power sequencers and pick the first one. This should be sufficient
> > > for single panel cases.
> > > 
> > > For the dual panel cases we probably need to go back to parsing the VBT before
> > > the panel probe (and hope that panel_type=0xff is never a thing in those cases).
> > > To that end the code always prefers the VBT panel sequencer, if available.
> > > 
> > > TODO: Deal with all the modern platforms too
> > >       Maybe add checks to make sure the same power
> > >       sequencer doesn't get assigned to multiple ports?
> > > 
> > > Cc: Animesh Manna <animesh.manna@intel.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  .../drm/i915/display/intel_display_types.h    |  8 +-
> > >  drivers/gpu/drm/i915/display/intel_panel.c    |  1 +
> > >  drivers/gpu/drm/i915/display/intel_pps.c      | 78 +++++++++++++++++--
> > >  3 files changed, 80 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index aec06cb24e23..25165110142b 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -330,7 +330,7 @@ struct intel_vbt_panel_data {
> > >  		bool present;
> > >  		bool active_low_pwm;
> > >  		u8 min_brightness;	/* min_brightness/255 of max */
> > > -		u8 controller;		/* brightness controller number */
> > > +		s8 controller;		/* brightness controller number */
> > >  		enum intel_backlight_type type;
> > >  	} backlight;
> > > 
> > > @@ -1571,9 +1571,13 @@ struct intel_pps {
> > >  	enum pipe active_pipe;
> > >  	/*
> > >  	 * Set if the sequencer may be reset due to a power transition,
> > > -	 * requiring a reinitialization. Only relevant on BXT.
> > > +	 * requiring a reinitialization. Only relevant on BXT+.
> > >  	 */
> > >  	bool pps_reset;
> > > +	/*
> > > +	 * Power sequencer index. Only relevant on BXT+.
> > > +	 */
> > > +	s8 pps_idx;
> > >  	struct edp_power_seq pps_delays;
> > >  	struct edp_power_seq bios_pps_delays;
> > >  };
> > > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> > > b/drivers/gpu/drm/i915/display/intel_panel.c
> > > index 918b3b9d9ebe..1794e5eecf90 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_panel.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> > > @@ -665,6 +665,7 @@ void intel_panel_init_alloc(struct intel_connector
> > > *connector)
> > >  	struct intel_panel *panel = &connector->panel;
> > > 
> > >  	connector->panel.vbt.panel_type = -1;
> > > +	connector->panel.vbt.backlight.controller = -1;
> > >  	INIT_LIST_HEAD(&panel->fixed_modes);
> > >  }
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> > > b/drivers/gpu/drm/i915/display/intel_pps.c
> > > index 84265096f751..ff4f1def59d2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_pps.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> > > @@ -211,8 +211,7 @@ static int
> > >  bxt_power_sequencer_idx(struct intel_dp *intel_dp)  {
> > >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > -	struct intel_connector *connector = intel_dp->attached_connector;
> > > -	int backlight_controller = connector->panel.vbt.backlight.controller;
> > > +	int pps_idx = intel_dp->pps.pps_idx;
> > > 
> > >  	lockdep_assert_held(&dev_priv->display.pps.mutex);
> > > 
> > > @@ -220,7 +219,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
> > >  	drm_WARN_ON(&dev_priv->drm, !intel_dp_is_edp(intel_dp));
> > > 
> > >  	if (!intel_dp->pps.pps_reset)
> > > -		return backlight_controller;
> > > +		return pps_idx;
> > > 
> > >  	intel_dp->pps.pps_reset = false;
> > > 
> > > @@ -230,7 +229,7 @@ bxt_power_sequencer_idx(struct intel_dp *intel_dp)
> > >  	 */
> > >  	pps_init_registers(intel_dp, false);
> > > 
> > > -	return backlight_controller;
> > > +	return pps_idx;
> > >  }
> > > 
> > >  typedef bool (*pps_check)(struct drm_i915_private *dev_priv, int pps_idx); @@
> > > -310,6 +309,54 @@ vlv_initial_power_sequencer_setup(struct intel_dp
> > > *intel_dp)
> > >  		    pipe_name(intel_dp->pps.pps_pipe));
> > >  }
> > > 
> > > +static int
> > > +bxt_initial_pps_idx(struct drm_i915_private *i915, pps_check check) {
> > > +	int pps_idx, pps_num = 2;
> > > +
> > > +	for (pps_idx = 0; pps_idx < pps_num; pps_idx++) {
> > > +		if (check(i915, pps_idx))
> > > +			return pps_idx;
> > > +	}
> > > +
> > > +	return -1;
> > > +};
> > > +
> > > +static void
> > > +bxt_initial_power_sequencer_setup(struct intel_dp *intel_dp) {
> > > +	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> > > +	struct intel_connector *connector = intel_dp->attached_connector;
> > > +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> > > +
> > > +	lockdep_assert_held(&i915->display.pps.mutex);
> > > +
> > > +	/* first ask the VBT */
> > > +	intel_dp->pps.pps_idx = connector->panel.vbt.backlight.controller;
> > > +  
> > > +	/* VBT wasn't parsed yet? pick one where the panel is on */
> > > +	if (intel_dp->pps.pps_idx < 0)
> > > +		intel_dp->pps.pps_idx = bxt_initial_pps_idx(i915,
> > > pps_has_pp_on);
> > 
> > Always we will get 0 here even if bios enabled correctly two pps instance for dual EDP.
> 
> Yeah, dual eDP isn't really 100% possible to get right here since the
> hardware doesn't tell us which port is associated with which pps.
> 
> > Can pps be mapped with port number, like pps1 for portA and pps2 for portB?
> 
> I guess we could try something like that as the initial pass. Dunno if
> that sort of behaviour is really documented anywhere though, or is it
> just assumed that VBT will tell us the mapping explicitly in dual eDP
> cases? Also it's not clear what mapping we should use for port != A|B.
> 
> Another idea I was thinking is to mark each PPS as in use once we manage
> to probe something with it, and then skip those on subsequent probes.
> But that still doesn't guarantee the mapping is correct if both PPSes
> are enable when we do the EDID read.

But that's probably the direction we should go with the pps core.
Ie. make each pps a freestanding object just representing the
corresponding hw block, and just associate each with the
appropriate eDP port. This way if we don't know any better each
port would just grab the first plausible looking pps in probe
order. Or maybe we could even plug in some kind of nop pps
instance for the initial EDID read, and only do the real
eDP<->PPS assignment once everything has been probed.

-- 
Ville Syrjälä
Intel

[Intel-gfx] [PATCH 5/6] drm/915: Extend dual PPS handlind for ICP+

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On the PCH side the second PPS was introduced in ICP. Let's
make sure we examine both power sequencer on ICP+ as well.

Note that DG1/2 south block only has the single PPS, so need
to exclude the fake DG1/2 PCHs.

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index ff4f1def59d2..f3ac4eee4d39 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -401,6 +401,15 @@ struct pps_registers {
 	i915_reg_t pp_div;
 };
 
+static bool has_dual_bxt_pps(struct drm_i915_private *i915)
+{
+	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+		return true;
+
+	return INTEL_PCH_TYPE(i915) >= PCH_ICP &&
+		INTEL_PCH_TYPE(i915) < PCH_DG1;
+}
+
 static void intel_pps_get_registers(struct intel_dp *intel_dp,
 				    struct pps_registers *regs)
 {
@@ -409,7 +418,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
 
 	memset(regs, 0, sizeof(*regs));
 
-	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
+	if (has_dual_bxt_pps(dev_priv))
 		pps_idx = bxt_power_sequencer_idx(intel_dp);
 	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		pps_idx = vlv_power_sequencer_pipe(intel_dp);
@@ -1478,7 +1487,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
 	pps_init_timestamps(intel_dp);
 
 	with_intel_pps_lock(intel_dp, wakeref) {
-		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+		if (has_dual_bxt_pps(i915))
 			bxt_initial_power_sequencer_setup(intel_dp);
 		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
 			vlv_initial_power_sequencer_setup(intel_dp);
@@ -1512,7 +1521,7 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
 
 	with_intel_pps_lock(intel_dp, wakeref) {
 		/* Reinit delays after per-panel info has been parsed from VBT */
-		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
+		if (has_dual_bxt_pps(i915))
 			bxt_pps_init_late(intel_dp);
 		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));
 		pps_init_delays(intel_dp);
-- 
2.37.4

Re: [Intel-gfx] [PATCH 5/6] drm/915: Extend dual PPS handlind for ICP+

[Manna, Animesh]

> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Wednesday, November 9, 2022 4:47 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>
> Subject: [PATCH 5/6] drm/915: Extend dual PPS handlind for ICP+
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> On the PCH side the second PPS was introduced in ICP. Let's make sure we
> examine both power sequencer on ICP+ as well.
> 
> Note that DG1/2 south block only has the single PPS, so need to exclude the fake
> DG1/2 PCHs.
> 
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index ff4f1def59d2..f3ac4eee4d39 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -401,6 +401,15 @@ struct pps_registers {
>  	i915_reg_t pp_div;
>  };
> 
> +static bool has_dual_bxt_pps(struct drm_i915_private *i915) {
> +	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		return true;
> +
> +	return INTEL_PCH_TYPE(i915) >= PCH_ICP &&
> +		INTEL_PCH_TYPE(i915) < PCH_DG1;
> +}
> +
>  static void intel_pps_get_registers(struct intel_dp *intel_dp,
>  				    struct pps_registers *regs)
>  {
> @@ -409,7 +418,7 @@ static void intel_pps_get_registers(struct intel_dp
> *intel_dp,
> 
>  	memset(regs, 0, sizeof(*regs));
> 
> -	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> +	if (has_dual_bxt_pps(dev_priv))

pps_idx always we will be getting as 0 here as mentioned in previous patch.
 
>  		pps_idx = bxt_power_sequencer_idx(intel_dp);
>  	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>  		pps_idx = vlv_power_sequencer_pipe(intel_dp);
> @@ -1478,7 +1487,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
>  	pps_init_timestamps(intel_dp);
> 
>  	with_intel_pps_lock(intel_dp, wakeref) {
> -		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		if (has_dual_bxt_pps(i915))
>  			bxt_initial_power_sequencer_setup(intel_dp);
>  		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>  			vlv_initial_power_sequencer_setup(intel_dp);
> @@ -1512,7 +1521,7 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
> 
>  	with_intel_pps_lock(intel_dp, wakeref) {
>  		/* Reinit delays after per-panel info has been parsed from VBT
> */
> -		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		if (has_dual_bxt_pps(i915))
>  			bxt_pps_init_late(intel_dp);
>  		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp-
> >pps.pps_delays));
>  		pps_init_delays(intel_dp);
> --
> 2.37.4

Re: [Intel-gfx] [PATCH 5/6] drm/915: Extend dual PPS handlind for ICP+

[Ville Syrjälä]

On Wed, Nov 09, 2022 at 01:16:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> On the PCH side the second PPS was introduced in ICP. Let's
> make sure we examine both power sequencer on ICP+ as well.
> 
> Note that DG1/2 south block only has the single PPS, so need
> to exclude the fake DG1/2 PCHs.
> 
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_pps.c | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index ff4f1def59d2..f3ac4eee4d39 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -401,6 +401,15 @@ struct pps_registers {
>  	i915_reg_t pp_div;
>  };
>  
> +static bool has_dual_bxt_pps(struct drm_i915_private *i915)
> +{
> +	if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		return true;
> +
> +	return INTEL_PCH_TYPE(i915) >= PCH_ICP &&
> +		INTEL_PCH_TYPE(i915) < PCH_DG1;

Apparently there is a chicken bit to switch the pin muxing
between second pps/backlight vs. some other display functions.
We should probably check that before assuming that usage of
the second pps is even possible.

> +}
> +
>  static void intel_pps_get_registers(struct intel_dp *intel_dp,
>  				    struct pps_registers *regs)
>  {
> @@ -409,7 +418,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp,
>  
>  	memset(regs, 0, sizeof(*regs));
>  
> -	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
> +	if (has_dual_bxt_pps(dev_priv))
>  		pps_idx = bxt_power_sequencer_idx(intel_dp);
>  	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>  		pps_idx = vlv_power_sequencer_pipe(intel_dp);
> @@ -1478,7 +1487,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
>  	pps_init_timestamps(intel_dp);
>  
>  	with_intel_pps_lock(intel_dp, wakeref) {
> -		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		if (has_dual_bxt_pps(i915))
>  			bxt_initial_power_sequencer_setup(intel_dp);
>  		else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
>  			vlv_initial_power_sequencer_setup(intel_dp);
> @@ -1512,7 +1521,7 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
>  
>  	with_intel_pps_lock(intel_dp, wakeref) {
>  		/* Reinit delays after per-panel info has been parsed from VBT */
> -		if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
> +		if (has_dual_bxt_pps(i915))
>  			bxt_pps_init_late(intel_dp);
>  		memset(&intel_dp->pps.pps_delays, 0, sizeof(intel_dp->pps.pps_delays));
>  		pps_init_delays(intel_dp);
> -- 
> 2.37.4

-- 
Ville Syrjälä
Intel

[Intel-gfx] [PATCH 6/6] drm/i915: Ignore LFP2 for now

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

There are tons of ADL machines in the wild where the VBT has
two child devices (eDP and HDMI) for port B. Our code can't
handle that as the whole parse_ddi_port() stuff assumes a
single child device per port. So even if we fix the PPS issues
around the (typically) non-present second eDP port we still
won't be able to use the HDMI port after the eDP init fails.

The easiest way to get the HDMI port operational is to just
ignore the second eDP child device entirely. Dual eDP systems
should be exceedingly rare anyway.

Cc: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 31 ++++++++++++++++++++---
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 64f927f6479d..1011ccc2836b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2705,10 +2705,33 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
 	}
 
 	if (i915->display.vbt.ports[port]) {
-		drm_dbg_kms(&i915->drm,
-			    "More than one child device for port %c in VBT, using the first.\n",
-			    port_name(port));
-		return;
+		const struct child_device_config *other_child =
+			&i915->display.vbt.ports[port]->child;
+
+		/*
+		 * FIXME: Temporary hack for many ADL machines where
+		 * the VBT declares two eDPs, the second of which
+		 * conflicts with an external HDMI port. Ideally
+		 * we should fall back to consulting the HDMI port
+		 * child device after the eDP init fails, but that
+		 * does not work with the current port based
+		 * i915->display.vbt.ports[] stuff.
+		 *
+		 * Hopefully this does not conflict with any other
+		 * bogus VBT case...
+		 */
+		if (other_child->handle == DEVICE_HANDLE_LFP2 &&
+		    child->handle != DEVICE_HANDLE_LFP2) {
+			drm_dbg_kms(&i915->drm,
+				    "More than one child device for port %c in VBT, using the last.\n",
+				    port_name(port));
+			i915->display.vbt.ports[port] = NULL;
+		} else {
+			drm_dbg_kms(&i915->drm,
+				    "More than one child device for port %c in VBT, using the first.\n",
+				    port_name(port));
+			return;
+		}
 	}
 
 	sanitize_device_type(devdata, port);
-- 
2.37.4

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Ignore LFP2 for now

[Ville Syrjälä]

On Wed, Nov 09, 2022 at 01:16:49PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> There are tons of ADL machines in the wild where the VBT has
> two child devices (eDP and HDMI) for port B. Our code can't
> handle that as the whole parse_ddi_port() stuff assumes a
> single child device per port. So even if we fix the PPS issues
> around the (typically) non-present second eDP port we still
> won't be able to use the HDMI port after the eDP init fails.
> 
> The easiest way to get the HDMI port operational is to just
> ignore the second eDP child device entirely. Dual eDP systems
> should be exceedingly rare anyway.

One thing I just realized when staring at the logs is that
the BIOS seems to leave the VDD on for the second PPS. So
with this patch we'll never actually turn it off :/

> 
> Cc: Animesh Manna <animesh.manna@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 31 ++++++++++++++++++++---
>  1 file changed, 27 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 64f927f6479d..1011ccc2836b 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2705,10 +2705,33 @@ static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
>  	}
>  
>  	if (i915->display.vbt.ports[port]) {
> -		drm_dbg_kms(&i915->drm,
> -			    "More than one child device for port %c in VBT, using the first.\n",
> -			    port_name(port));
> -		return;
> +		const struct child_device_config *other_child =
> +			&i915->display.vbt.ports[port]->child;
> +
> +		/*
> +		 * FIXME: Temporary hack for many ADL machines where
> +		 * the VBT declares two eDPs, the second of which
> +		 * conflicts with an external HDMI port. Ideally
> +		 * we should fall back to consulting the HDMI port
> +		 * child device after the eDP init fails, but that
> +		 * does not work with the current port based
> +		 * i915->display.vbt.ports[] stuff.
> +		 *
> +		 * Hopefully this does not conflict with any other
> +		 * bogus VBT case...
> +		 */
> +		if (other_child->handle == DEVICE_HANDLE_LFP2 &&
> +		    child->handle != DEVICE_HANDLE_LFP2) {
> +			drm_dbg_kms(&i915->drm,
> +				    "More than one child device for port %c in VBT, using the last.\n",
> +				    port_name(port));
> +			i915->display.vbt.ports[port] = NULL;
> +		} else {
> +			drm_dbg_kms(&i915->drm,
> +				    "More than one child device for port %c in VBT, using the first.\n",
> +				    port_name(port));
> +			return;
> +		}
>  	}
>  
>  	sanitize_device_type(devdata, port);
> -- 
> 2.37.4

-- 
Ville Syrjälä
Intel

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fake dual eDP VBT fixes

[Patchwork]

== Series Details ==

Series: drm/i915: Fake dual eDP VBT fixes
URL   : https://patchwork.freedesktop.org/series/110693/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fake dual eDP VBT fixes

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6712 bytes --]

== Series Details ==

Series: drm/i915: Fake dual eDP VBT fixes
URL   : https://patchwork.freedesktop.org/series/110693/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12360 -> Patchwork_110693v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/index.html

Participating hosts (42 -> 39)
------------------------------

  Additional (1): fi-tgl-dsi 
  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus fi-apl-guc 

Known issues
------------

  Here are the changes found in Patchwork_110693v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-hsw-4770:        NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#111827])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
    - bat-adlp-4:         NOTRUN -> [SKIP][2] ([fdo#111827])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/bat-adlp-4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
    - fi-bsw-kefka:       [PASS][3] -> [FAIL][4] ([i915#6298])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html

  
#### Possible fixes ####

  * igt@gem_tiled_blits@basic:
    - fi-pnv-d510:        [SKIP][5] ([fdo#109271]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-pnv-d510/igt@gem_tiled_blits@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/fi-pnv-d510/igt@gem_tiled_blits@basic.html

  * igt@i915_module_load@reload:
    - {bat-rpls-2}:       [DMESG-WARN][7] ([i915#6434]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-rpls-2/igt@i915_module_load@reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/bat-rpls-2/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][9] ([i915#4785]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@migrate:
    - {bat-adlp-6}:       [INCOMPLETE][11] ([i915#7348]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adlp-6/igt@i915_selftest@live@migrate.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/bat-adlp-6/igt@i915_selftest@live@migrate.html
    - bat-adlp-4:         [INCOMPLETE][13] ([i915#7308] / [i915#7348]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-adlp-4/igt@i915_selftest@live@migrate.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/bat-adlp-4/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@reset:
    - {bat-rpls-1}:       [DMESG-FAIL][15] ([i915#4983]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/bat-rpls-1/igt@i915_selftest@live@reset.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/bat-rpls-1/igt@i915_selftest@live@reset.html

  
#### Warnings ####

  * igt@gem_exec_gttfill@basic:
    - fi-pnv-d510:        [SKIP][17] ([fdo#109271]) -> [FAIL][18] ([i915#7229])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/fi-pnv-d510/igt@gem_exec_gttfill@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6434]: https://gitlab.freedesktop.org/drm/intel/issues/6434
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#6856]: https://gitlab.freedesktop.org/drm/intel/issues/6856
  [i915#7125]: https://gitlab.freedesktop.org/drm/intel/issues/7125
  [i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
  [i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308
  [i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456


Build changes
-------------

  * Linux: CI_DRM_12360 -> Patchwork_110693v1

  CI-20190529: 20190529
  CI_DRM_12360: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7048: 5edd5c539f1fdf1c02157bf43fa1fd22d4ad2c75 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110693v1: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

31b80320b0c1 drm/i915: Ignore LFP2 for now
5b8df99258c7 drm/915: Extend dual PPS handlind for ICP+
53a85aea5b55 drm/i915: Try to use the correct power sequencer intiially on bxt/glk
b278f0ade3bf drm/i915: Generalize the PPS vlv_pipe_check() stuff
2295215b8df6 drm/i915: Do panel VBT init early if the VBT declares an explicit panel type
7026e695eac7 drm/i915: Introduce intel_panel_init_alloc()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/index.html

[-- Attachment #2: Type: text/html, Size: 6832 bytes --]

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fake dual eDP VBT fixes

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 34006 bytes --]

== Series Details ==

Series: drm/i915: Fake dual eDP VBT fixes
URL   : https://patchwork.freedesktop.org/series/110693/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12360_full -> Patchwork_110693v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_110693v1_full that come from known issues:

### CI changes ###

#### Possible fixes ####

  * boot:
    - shard-apl:          ([FAIL][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) ([i915#4386]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl2/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl7/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl8/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl7/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl7/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl7/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl8/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl8/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl8/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl8/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl3/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl3/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl3/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl3/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-tglb:         [PASS][51] -> [FAIL][52] ([i915#6268])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb3/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_eio@reset-stress:
    - shard-tglb:         [PASS][53] -> [FAIL][54] ([i915#5784])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb5/igt@gem_eio@reset-stress.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb2/igt@gem_eio@reset-stress.html

  * igt@gem_exec_endless@dispatch@vcs0:
    - shard-tglb:         [PASS][55] -> [INCOMPLETE][56] ([i915#3778])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb1/igt@gem_exec_endless@dispatch@vcs0.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb7/igt@gem_exec_endless@dispatch@vcs0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [PASS][57] -> [FAIL][58] ([i915#2842])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_softpin@evict-single-offset:
    - shard-tglb:         [PASS][59] -> [FAIL][60] ([i915#4171])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb7/igt@gem_softpin@evict-single-offset.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb8/igt@gem_softpin@evict-single-offset.html

  * igt@i915_module_load@load:
    - shard-skl:          NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#6227])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@i915_module_load@load.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#3989] / [i915#454])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl10/igt@i915_pm_dc@dc6-psr.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@i915_pm_dc@dc6-psr.html
    - shard-iclb:         [PASS][64] -> [FAIL][65] ([i915#3989] / [i915#454])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb7/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rc6_residency@rc6-idle@rcs0:
    - shard-tglb:         NOTRUN -> [WARN][66] ([i915#2681]) +3 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb5/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1:
    - shard-skl:          [PASS][67] -> [FAIL][68] ([i915#7230])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl9/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-edp-1.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-tglb:         NOTRUN -> [SKIP][69] ([fdo#111614])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
    - shard-iclb:         NOTRUN -> [SKIP][70] ([fdo#110725] / [fdo#111614])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#3886]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
    - shard-apl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#3886])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#3886])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][74] ([fdo#109271]) +10 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk2/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html

  * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][75] ([fdo#109271]) +31 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd:
    - shard-skl:          NOTRUN -> [SKIP][76] ([fdo#109271] / [fdo#111827]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl7/igt@kms_chamelium@dp-hpd.html

  * igt@kms_color_chamelium@ctm-green-to-red:
    - shard-apl:          NOTRUN -> [SKIP][77] ([fdo#109271] / [fdo#111827])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/igt@kms_color_chamelium@ctm-green-to-red.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1:
    - shard-apl:          [PASS][78] -> [DMESG-WARN][79] ([i915#180]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
    - shard-skl:          NOTRUN -> [FAIL][80] ([i915#2346]) +1 similar issue
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-skl:          NOTRUN -> [SKIP][81] ([fdo#109271]) +25 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
    - shard-iclb:         [PASS][82] -> [DMESG-WARN][83] ([i915#2867])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb5/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb3/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
    - shard-skl:          [PASS][84] -> [FAIL][85] ([i915#2122])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl4/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl6/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][86] ([i915#2587] / [i915#2672])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][87] ([i915#2672]) +1 similar issue
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][88] ([i915#2672] / [i915#3555]) +1 similar issue
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#6497])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-tglb:         NOTRUN -> [SKIP][90] ([fdo#109280] / [fdo#111825])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@perf_pmu@rc6-suspend:
    - shard-apl:          NOTRUN -> [DMESG-WARN][91] ([i915#180])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/igt@perf_pmu@rc6-suspend.html

  * igt@sysfs_clients@fair-3:
    - shard-apl:          NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/igt@sysfs_clients@fair-3.html
    - shard-skl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@sysfs_clients@fair-3.html

  
#### Possible fixes ####

  * igt@gem_ctx_exec@basic-nohangcheck:
    - {shard-rkl}:        [FAIL][94] ([i915#6268]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-6/igt@gem_ctx_exec@basic-nohangcheck.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-4/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_eio@in-flight-suspend:
    - {shard-rkl}:        [FAIL][96] ([fdo#103375]) -> [PASS][97] +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-iclb:         [SKIP][98] ([i915#4525]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb7/igt@gem_exec_balancer@parallel-out-fence.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb1/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          [FAIL][100] ([i915#2842]) -> [PASS][101] +1 similar issue
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
    - {shard-rkl}:        [SKIP][102] ([i915#3281]) -> [PASS][103] +6 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - {shard-rkl}:        [SKIP][104] ([i915#3282]) -> [PASS][105] +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-skl:          [INCOMPLETE][106] ([i915#7231]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-skl10/igt@gem_workarounds@suspend-resume-fd.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-skl4/igt@gem_workarounds@suspend-resume-fd.html

  * igt@gen9_exec_parse@allowed-single:
    - {shard-rkl}:        [SKIP][108] ([i915#2527]) -> [PASS][109] +1 similar issue
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@gen9_exec_parse@allowed-single.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-5/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_backlight@fade_with_dpms:
    - {shard-rkl}:        [SKIP][110] ([i915#3012]) -> [PASS][111] +1 similar issue
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@i915_pm_backlight@fade_with_dpms.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@i915_pm_backlight@fade_with_dpms.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - {shard-rkl}:        [SKIP][112] ([i915#1397]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@i915_pm_rpm@modeset-lpsp-stress.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_atomic@atomic_plane_damage:
    - {shard-rkl}:        [SKIP][114] ([i915#4098]) -> [PASS][115] +1 similar issue
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@kms_atomic@atomic_plane_damage.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_atomic@atomic_plane_damage.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - {shard-rkl}:        [SKIP][116] ([i915#1845] / [i915#4098]) -> [PASS][117] +24 similar issues
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1:
    - shard-apl:          [DMESG-WARN][118] ([i915#180]) -> [PASS][119] +2 similar issues
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/igt@kms_cursor_crc@cursor-suspend@pipe-c-dp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
    - shard-iclb:         [FAIL][120] ([i915#2346]) -> [PASS][121] +2 similar issues
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb1/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1:
    - shard-glk:          [FAIL][122] ([i915#2122]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk9/igt@kms_flip@wf_vblank-ts-check-interruptible@a-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
    - {shard-rkl}:        [SKIP][124] ([i915#1849] / [i915#4098]) -> [PASS][125] +13 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html

  * igt@kms_plane@pixel-format-source-clamping@pipe-b-planes:
    - {shard-rkl}:        [SKIP][126] ([i915#3558]) -> [PASS][127] +1 similar issue
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-4/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html

  * igt@kms_plane@pixel-format@pipe-b-planes:
    - {shard-rkl}:        [SKIP][128] ([i915#1849] / [i915#3558]) -> [PASS][129] +1 similar issue
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@kms_plane@pixel-format@pipe-b-planes.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_plane@pixel-format@pipe-b-planes.html

  * igt@kms_psr@sprite_plane_onoff:
    - {shard-rkl}:        [SKIP][130] ([i915#1072]) -> [PASS][131] +2 similar issues
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-rkl-5/igt@kms_psr@sprite_plane_onoff.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-rkl-6/igt@kms_psr@sprite_plane_onoff.html

  * igt@perf@stress-open-close:
    - shard-glk:          [INCOMPLETE][132] ([i915#5213]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/igt@perf@stress-open-close.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk3/igt@perf@stress-open-close.html

  
#### Warnings ####

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         [FAIL][134] ([i915#6117]) -> [SKIP][135] ([i915#4525])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-iclb5/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-tglb:         [WARN][136] ([i915#2658]) -> [INCOMPLETE][137] ([i915#7248])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-tglb1/igt@gem_pwrite@basic-exhaustion.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-tglb7/igt@gem_pwrite@basic-exhaustion.html
    - shard-glk:          [INCOMPLETE][138] ([i915#7248]) -> [WARN][139] ([i915#2658])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-glk5/igt@gem_pwrite@basic-exhaustion.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-glk6/igt@gem_pwrite@basic-exhaustion.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312]) -> ([FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148]) ([i915#180] / [i915#3002] / [i915#4312])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/igt@runner@aborted.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl1/igt@runner@aborted.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl3/igt@runner@aborted.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12360/shard-apl6/igt@runner@aborted.html
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/igt@runner@aborted.html
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl8/igt@runner@aborted.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl1/igt@runner@aborted.html
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl2/igt@runner@aborted.html
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/shard-apl6/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4778]: https://gitlab.freedesktop.org/drm/intel/issues/4778
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#6032]: https://gitlab.freedesktop.org/drm/intel/issues/6032
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
  [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
  [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
  [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7134]: https://gitlab.freedesktop.org/drm/intel/issues/7134
  [i915#7230]: https://gitlab.freedesktop.org/drm/intel/issues/7230
  [i915#7231]: https://gitlab.freedesktop.org/drm/intel/issues/7231
  [i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248


Build changes
-------------

  * Linux: CI_DRM_12360 -> Patchwork_110693v1

  CI-20190529: 20190529
  CI_DRM_12360: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7048: 5edd5c539f1fdf1c02157bf43fa1fd22d4ad2c75 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110693v1: 83ef9bf841a2427c464cc3a9f5a6e57948a12963 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110693v1/index.html

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