From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 00/20] drm/i915: Finish (de)gamma readout
Date: Mon, 14 Nov 2022 17:37:12 +0200 [thread overview]
Message-ID: <20221114153732.11773-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The gamma readout stuff was left half finished. No degamma
readout, and no readout whatsoever on ivb/bdw/skl/bxt.
Let's finish it.
Since we have the {pre,post}_csc_lut stuff this is fairly
easy to do now. The implementation of the LUT checker is
a bit more repetitive than I'd like but we an work on
shrinking it later.
There are some fixes/cleanups at the start, and while we're
in there let's also throw in the 10bit gamma mode for gen2/3.
At the end I also added a few patches to fix existing issues
with gamma vs. YCbCr/RGB limited range output.
v2: Mostly redone, only some of the readout implementations
remain more or less unchange
v3: More work towards C8 palette readout, but disable the
state checker for it now since we lack c8_planes readout
Ville Syrjälä (20):
drm/i915: Clean up legacy palette defines
drm/i915: Clean up 10bit precision palette defines
drm/i915: Clean up 12.4bit precision palette defines
drm/i915: Clean up chv CGM (de)gamma defines
drm/i915: Reorder 12.4 lut udw vs. ldw functions
drm/i915: Fix adl+ degamma LUT size
drm/i915: s/gamma/post_csc_lut/
drm/i915: Add glk+ degamma readout
drm/i915: Read out CHV CGM degamma
drm/i915: Add gamma/degamma readout for bdw+
drm/i915: Add gamma/degamma readout for ivb/hsw
drm/i915: Make ilk_read_luts() capable of degamma readout
drm/i915: Prep for C8 palette readout
drm/i915: Make .read_luts() mandatory
drm/i915: Finish the LUT state checker
drm/i915: Rework legacy LUT handling
drm/i915: Use hw degamma LUT for sw gamma on glk with YCbCr output
drm/i915: Use gamma LUT for RGB limited range compression
drm/i915: Add 10bit gamma mode for gen2/3
drm/i915: Do state check for color management changes
drivers/gpu/drm/i915/display/intel_color.c | 1137 ++++++++++++++---
drivers/gpu/drm/i915/display/intel_color.h | 8 +-
drivers/gpu/drm/i915/display/intel_display.c | 33 +-
.../drm/i915/display/intel_modeset_verify.c | 2 +
drivers/gpu/drm/i915/i915_pci.c | 12 +-
drivers/gpu/drm/i915/i915_reg.h | 67 +-
6 files changed, 1008 insertions(+), 251 deletions(-)
--
2.37.4
next reply other threads:[~2022-11-14 15:37 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-14 15:37 Ville Syrjala [this message]
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 01/20] drm/i915: Clean up legacy palette defines Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 02/20] drm/i915: Clean up 10bit precision " Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 03/20] drm/i915: Clean up 12.4bit " Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 04/20] drm/i915: Clean up chv CGM (de)gamma defines Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 05/20] drm/i915: Reorder 12.4 lut udw vs. ldw functions Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 06/20] drm/i915: Fix adl+ degamma LUT size Ville Syrjala
2022-11-18 8:17 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 07/20] drm/i915: s/gamma/post_csc_lut/ Ville Syrjala
2022-11-18 8:20 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 08/20] drm/i915: Add glk+ degamma readout Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 09/20] drm/i915: Read out CHV CGM degamma Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 10/20] drm/i915: Add gamma/degamma readout for bdw+ Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 11/20] drm/i915: Add gamma/degamma readout for ivb/hsw Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 12/20] drm/i915: Make ilk_read_luts() capable of degamma readout Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 13/20] drm/i915: Prep for C8 palette readout Ville Syrjala
2022-11-18 17:51 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 14/20] drm/i915: Make .read_luts() mandatory Ville Syrjala
2022-11-18 17:53 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 15/20] drm/i915: Finish the LUT state checker Ville Syrjala
2022-11-18 18:11 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 16/20] drm/i915: Rework legacy LUT handling Ville Syrjala
2022-11-18 18:17 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 17/20] drm/i915: Use hw degamma LUT for sw gamma on glk with YCbCr output Ville Syrjala
2022-11-18 18:29 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 18/20] drm/i915: Use gamma LUT for RGB limited range compression Ville Syrjala
2022-11-18 18:37 ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 19/20] drm/i915: Add 10bit gamma mode for gen2/3 Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 20/20] drm/i915: Do state check for color management changes Ville Syrjala
2022-11-18 18:45 ` Shankar, Uma
2022-11-14 23:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish (de)gamma readout (rev8) Patchwork
2022-11-14 23:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-15 0:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-11-16 22:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish (de)gamma readout (rev9) Patchwork
2022-11-16 22:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-17 0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-17 10:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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