All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 12/20] drm/i915: Make ilk_read_luts() capable of degamma readout
Date: Mon, 14 Nov 2022 17:37:24 +0200	[thread overview]
Message-ID: <20221114153732.11773-13-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20221114153732.11773-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Just like ivb+, ilk/snb can select whether the hw lut acts as
gamma or degamma. Make the readout cognizant of that fact.

v2: deal with pre_csc_lut
v3: use ilk_has_post_csc_lut() helper

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 583a93351c97..ef171837ef45 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -2176,19 +2176,19 @@ static struct drm_property_blob *ilk_read_lut_10(struct intel_crtc *crtc)
 static void ilk_read_luts(struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_property_blob **blob =
+		ilk_has_post_csc_lut(crtc_state) ?
+		&crtc_state->post_csc_lut : &crtc_state->pre_csc_lut;
 
 	if (!crtc_state->gamma_enable)
 		return;
 
-	if ((crtc_state->csc_mode & CSC_POSITION_BEFORE_GAMMA) == 0)
-		return;
-
 	switch (crtc_state->gamma_mode) {
 	case GAMMA_MODE_MODE_8BIT:
-		crtc_state->post_csc_lut = ilk_read_lut_8(crtc);
+		*blob = ilk_read_lut_8(crtc);
 		break;
 	case GAMMA_MODE_MODE_10BIT:
-		crtc_state->post_csc_lut = ilk_read_lut_10(crtc);
+		*blob = ilk_read_lut_10(crtc);
 		break;
 	default:
 		MISSING_CASE(crtc_state->gamma_mode);
-- 
2.37.4


  parent reply	other threads:[~2022-11-14 15:38 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-14 15:37 [Intel-gfx] [PATCH v3 00/20] drm/i915: Finish (de)gamma readout Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 01/20] drm/i915: Clean up legacy palette defines Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 02/20] drm/i915: Clean up 10bit precision " Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 03/20] drm/i915: Clean up 12.4bit " Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 04/20] drm/i915: Clean up chv CGM (de)gamma defines Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 05/20] drm/i915: Reorder 12.4 lut udw vs. ldw functions Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 06/20] drm/i915: Fix adl+ degamma LUT size Ville Syrjala
2022-11-18  8:17   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 07/20] drm/i915: s/gamma/post_csc_lut/ Ville Syrjala
2022-11-18  8:20   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 08/20] drm/i915: Add glk+ degamma readout Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 09/20] drm/i915: Read out CHV CGM degamma Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 10/20] drm/i915: Add gamma/degamma readout for bdw+ Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 11/20] drm/i915: Add gamma/degamma readout for ivb/hsw Ville Syrjala
2022-11-14 15:37 ` Ville Syrjala [this message]
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 13/20] drm/i915: Prep for C8 palette readout Ville Syrjala
2022-11-18 17:51   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 14/20] drm/i915: Make .read_luts() mandatory Ville Syrjala
2022-11-18 17:53   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 15/20] drm/i915: Finish the LUT state checker Ville Syrjala
2022-11-18 18:11   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 16/20] drm/i915: Rework legacy LUT handling Ville Syrjala
2022-11-18 18:17   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 17/20] drm/i915: Use hw degamma LUT for sw gamma on glk with YCbCr output Ville Syrjala
2022-11-18 18:29   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 18/20] drm/i915: Use gamma LUT for RGB limited range compression Ville Syrjala
2022-11-18 18:37   ` Shankar, Uma
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 19/20] drm/i915: Add 10bit gamma mode for gen2/3 Ville Syrjala
2022-11-14 15:37 ` [Intel-gfx] [PATCH v3 20/20] drm/i915: Do state check for color management changes Ville Syrjala
2022-11-18 18:45   ` Shankar, Uma
2022-11-14 23:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish (de)gamma readout (rev8) Patchwork
2022-11-14 23:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-15  0:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-11-16 22:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Finish (de)gamma readout (rev9) Patchwork
2022-11-16 22:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-17  0:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-11-17 10:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221114153732.11773-13-ville.syrjala@linux.intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.