* [PATCH 1/7] arm64: dts: renesas: r9a07g044: Add fcpvd node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 8:39 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 2/7] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das
` (5 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add fcpvd node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Note:
This patch depen upon binding patch [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-2-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 487536696d90..e90c517077ab 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -618,6 +618,18 @@ sbc: spi@10060000 {
status = "disabled";
};
+ fcpvd: fcp@10880000 {
+ compatible = "renesas,r9a07g044-fcpvd",
+ "renesas,fcpv";
+ reg = <0 0x10880000 0 0x10000>;
+ clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G044_LCDC_RESET_N>;
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g044-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 1/7] arm64: dts: renesas: r9a07g044: Add fcpvd node
2022-11-22 21:35 ` [PATCH 1/7] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das
@ 2022-12-02 8:39 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 8:39 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add fcpvd node to RZ/G2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> Note:
> This patch depen upon binding patch [1]
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-2-biju.das.jz@bp.renesas.com/
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/7] arm64: dts: renesas: r9a07g044: Add vspd node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
2022-11-22 21:35 ` [PATCH 1/7] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 8:44 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 3/7] arm64: dts: renesas: r9a07g044: Add DSI node Biju Das
` (4 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add vspd node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index e90c517077ab..7698752742df 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -618,6 +618,19 @@ sbc: spi@10060000 {
status = "disabled";
};
+ vspd: vsp@10870000 {
+ compatible = "renesas,r9a07g044-vsp2";
+ reg = <0 0x10870000 0 0x10000>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G044_LCDC_RESET_N>;
+ renesas,fcp = <&fcpvd>;
+ };
+
fcpvd: fcp@10880000 {
compatible = "renesas,r9a07g044-fcpvd",
"renesas,fcpv";
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 2/7] arm64: dts: renesas: r9a07g044: Add vspd node
2022-11-22 21:35 ` [PATCH 2/7] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das
@ 2022-12-02 8:44 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 8:44 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add vspd node to RZ/G2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/7] arm64: dts: renesas: r9a07g044: Add DSI node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
2022-11-22 21:35 ` [PATCH 1/7] arm64: dts: renesas: r9a07g044: Add fcpvd node Biju Das
2022-11-22 21:35 ` [PATCH 2/7] arm64: dts: renesas: r9a07g044: Add vspd node Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 8:47 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 4/7] arm64: dts: renesas: r9a07g054: " Biju Das
` (3 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add DSI node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 7698752742df..23bd28dd4d95 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -618,6 +618,34 @@ sbc: spi@10060000 {
status = "disabled";
};
+ dsi: dsi@10850000 {
+ compatible = "renesas,r9a07g044-mipi-dsi",
+ "renesas,rzg2l-mipi-dsi";
+ reg = <0 0x10850000 0 0x20000>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "seq0", "seq1", "vin1", "rcv",
+ "ferr", "ppi", "debug";
+ clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,
+ <&cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK>,
+ <&cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK>,
+ <&cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK>,
+ <&cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK>,
+ <&cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK>;
+ clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
+ resets = <&cpg R9A07G044_MIPI_DSI_CMN_RSTB>,
+ <&cpg R9A07G044_MIPI_DSI_ARESET_N>,
+ <&cpg R9A07G044_MIPI_DSI_PRESET_N>;
+ reset-names = "rst", "arst", "prst";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
vspd: vsp@10870000 {
compatible = "renesas,r9a07g044-vsp2";
reg = <0 0x10870000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 3/7] arm64: dts: renesas: r9a07g044: Add DSI node
2022-11-22 21:35 ` [PATCH 3/7] arm64: dts: renesas: r9a07g044: Add DSI node Biju Das
@ 2022-12-02 8:47 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 8:47 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add DSI node to RZ/G2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 4/7] arm64: dts: renesas: r9a07g054: Add DSI node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
` (2 preceding siblings ...)
2022-11-22 21:35 ` [PATCH 3/7] arm64: dts: renesas: r9a07g044: Add DSI node Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 9:02 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 5/7] arm64: dts: renesas: r9a07g054: Add fcpvd node Biju Das
` (2 subsequent siblings)
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add DSI node to RZ/V2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
This patch depend upon bingings [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122195413.1882486-1-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 304ade54425b..8d0b84ea389c 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -623,6 +623,34 @@ sbc: spi@10060000 {
status = "disabled";
};
+ dsi: dsi@10850000 {
+ compatible = "renesas,r9a07g054-mipi-dsi",
+ "renesas,rzg2l-mipi-dsi";
+ reg = <0 0x10850000 0 0x20000>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "seq0", "seq1", "vin1", "rcv",
+ "ferr", "ppi", "debug";
+ clocks = <&cpg CPG_MOD R9A07G054_MIPI_DSI_PLLCLK>,
+ <&cpg CPG_MOD R9A07G054_MIPI_DSI_SYSCLK>,
+ <&cpg CPG_MOD R9A07G054_MIPI_DSI_ACLK>,
+ <&cpg CPG_MOD R9A07G054_MIPI_DSI_PCLK>,
+ <&cpg CPG_MOD R9A07G054_MIPI_DSI_VCLK>,
+ <&cpg CPG_MOD R9A07G054_MIPI_DSI_LPCLK>;
+ clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
+ resets = <&cpg R9A07G054_MIPI_DSI_CMN_RSTB>,
+ <&cpg R9A07G054_MIPI_DSI_ARESET_N>,
+ <&cpg R9A07G054_MIPI_DSI_PRESET_N>;
+ reset-names = "rst", "arst", "prst";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g054-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 4/7] arm64: dts: renesas: r9a07g054: Add DSI node
2022-11-22 21:35 ` [PATCH 4/7] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2022-12-02 9:02 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 9:02 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Geert Uytterhoeven,
Magnus Damm, Laurent Pinchart, linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add DSI node to RZ/V2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> This patch depend upon bingings [1]
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122195413.1882486-1-biju.das.jz@bp.renesas.com/
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 5/7] arm64: dts: renesas: r9a07g054: Add fcpvd node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
` (3 preceding siblings ...)
2022-11-22 21:35 ` [PATCH 4/7] arm64: dts: renesas: r9a07g054: " Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 9:03 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 6/7] arm64: dts: renesas: r9a07g054: Add vspd node Biju Das
2022-11-22 21:35 ` [PATCH 7/7] arm64: dts: renesas: rzg2l-smarc: Enable DSI and link with ADV7535 Biju Das
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add fcpvd node to RZ/V2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Note:
This patch depen upon binding patch [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-2-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 8d0b84ea389c..29b63589209f 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -651,6 +651,18 @@ dsi: dsi@10850000 {
status = "disabled";
};
+ fcpvd: fcp@10880000 {
+ compatible = "renesas,r9a07g054-fcpvd",
+ "renesas,fcpv";
+ reg = <0 0x10880000 0 0x10000>;
+ clocks = <&cpg CPG_MOD R9A07G054_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G054_LCDC_RESET_N>;
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a07g054-cpg";
reg = <0 0x11010000 0 0x10000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 5/7] arm64: dts: renesas: r9a07g054: Add fcpvd node
2022-11-22 21:35 ` [PATCH 5/7] arm64: dts: renesas: r9a07g054: Add fcpvd node Biju Das
@ 2022-12-02 9:03 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 9:03 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add fcpvd node to RZ/V2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> Note:
> This patch depen upon binding patch [1]
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-2-biju.das.jz@bp.renesas.com/
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 6/7] arm64: dts: renesas: r9a07g054: Add vspd node
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
` (4 preceding siblings ...)
2022-11-22 21:35 ` [PATCH 5/7] arm64: dts: renesas: r9a07g054: Add fcpvd node Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 9:04 ` Geert Uytterhoeven
2022-11-22 21:35 ` [PATCH 7/7] arm64: dts: renesas: rzg2l-smarc: Enable DSI and link with ADV7535 Biju Das
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Add vspd node to RZ/V2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Note:
This patch depen upon binding patch [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-1-biju.das.jz@bp.renesas.com/
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 29b63589209f..244934ce5991 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -651,6 +651,20 @@ dsi: dsi@10850000 {
status = "disabled";
};
+ vspd: vsp@10870000 {
+ compatible = "renesas,r9a07g054-vsp2",
+ "renesas,r9a07g044-vsp2";
+ reg = <0 0x10870000 0 0x10000>;
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G054_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G054_LCDC_RESET_N>;
+ renesas,fcp = <&fcpvd>;
+ };
+
fcpvd: fcp@10880000 {
compatible = "renesas,r9a07g054-fcpvd",
"renesas,fcpv";
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 6/7] arm64: dts: renesas: r9a07g054: Add vspd node
2022-11-22 21:35 ` [PATCH 6/7] arm64: dts: renesas: r9a07g054: Add vspd node Biju Das
@ 2022-12-02 9:04 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 9:04 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:35 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add vspd node to RZ/V2L SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> Note:
> This patch depen upon binding patch [1]
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122193415.1873179-1-biju.das.jz@bp.renesas.com/
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 7/7] arm64: dts: renesas: rzg2l-smarc: Enable DSI and link with ADV7535
2022-11-22 21:35 [PATCH 0/7] Enable DSI and ADV7535 on RZ/G2{L, LC} and RZ/V2L platforms Biju Das
` (5 preceding siblings ...)
2022-11-22 21:35 ` [PATCH 6/7] arm64: dts: renesas: r9a07g054: Add vspd node Biju Das
@ 2022-11-22 21:35 ` Biju Das
2022-12-02 9:07 ` Geert Uytterhoeven
6 siblings, 1 reply; 15+ messages in thread
From: Biju Das @ 2022-11-22 21:35 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Biju Das, Geert Uytterhoeven, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
Enable DSI and link with ADV7535 on RZ/G2L SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Note:
This patch depen upon patch [1]
[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122185802.1853648-1-biju.das.jz@bp.renesas.com/
Will link DSI port@0 with DU, once we have DU node is ready.
---
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 30 ++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
index 01ea8759c192..6e1aa077b77a 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi
@@ -33,6 +33,29 @@ &cpu_dai {
sound-dai = <&ssi0>;
};
+&dsi {
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi0_in: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi0_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&adv7535_in>;
+ };
+ };
+ };
+};
+
&i2c1 {
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
@@ -56,6 +79,13 @@ ports {
#address-cells = <1>;
#size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ adv7535_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
port@1 {
reg = <1>;
adv7535_out: endpoint {
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH 7/7] arm64: dts: renesas: rzg2l-smarc: Enable DSI and link with ADV7535
2022-11-22 21:35 ` [PATCH 7/7] arm64: dts: renesas: rzg2l-smarc: Enable DSI and link with ADV7535 Biju Das
@ 2022-12-02 9:07 ` Geert Uytterhoeven
0 siblings, 0 replies; 15+ messages in thread
From: Geert Uytterhoeven @ 2022-12-02 9:07 UTC (permalink / raw)
To: Biju Das
Cc: Rob Herring, Krzysztof Kozlowski, Magnus Damm, Laurent Pinchart,
linux-renesas-soc, devicetree
On Tue, Nov 22, 2022 at 10:36 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Enable DSI and link with ADV7535 on RZ/G2L SMARC EVK.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> Note:
> This patch depen upon patch [1]
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20221122185802.1853648-1-biju.das.jz@bp.renesas.com/
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Will link DSI port@0 with DU, once we have DU node is ready.
Looking forward to that.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 15+ messages in thread