* [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy, devicetree
Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
be used as GCC clock parents).
Changes since v8:
- Send proper patchset this time.
Changes since v7:
- Rebased on top of phy/next
- Renamed the clock registration function (Johan)
- Dropped rogue qcom_qmp_ufs_ops (Johan)
- Fixed the comment following Johan's suggestion.
Changes since v6:
- Added bindings change (Johan, thanks for the reminder)
- Added corresponding dts changes for msm8996 and sm8350/sm8450.
Changes since v5:
- Rebased on top of phy/next
Changes since v4:
- Rebased, dropping merged clk patches
- Fixed whitespace errors
- Added linebreaks to fit into 100 chars limit
Changes since v3:
- Rewrote asm9260 clk driver to fix the TODO item by using parent index
rather than calling of_clk_get_parent_name().
Changes since v2:
- Added error handling to phy_symbols_clk_register() (requested by
Johan).
Changes since v1:
- Added a macro used by clk-asm9260, so that the clk-fixed-rate changes
do not affect the driver
- Changed registered clock names to be unique (as e.g. SC8280XP will
have two UFS PHYs).
Dmitry Baryshkov (4):
dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
phy: qcom-qmp-ufs: provide symbol clocks
arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
arm64: dts: qcom: use UFS symbol clocks provided by PHY
Dmitry Baryshkov (4):
dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
phy: qcom-qmp-ufs: provide symbol clocks
arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
arm64: dts: qcom: use UFS symbol clocks provided by PHY
.../phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +
.../phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 3 +
arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 ++------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 ++++-
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 57 +++++++++++++++++++
6 files changed, 84 insertions(+), 24 deletions(-)
--
2.35.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy, devicetree
Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
be used as GCC clock parents).
Changes since v8:
- Send proper patchset this time.
Changes since v7:
- Rebased on top of phy/next
- Renamed the clock registration function (Johan)
- Dropped rogue qcom_qmp_ufs_ops (Johan)
- Fixed the comment following Johan's suggestion.
Changes since v6:
- Added bindings change (Johan, thanks for the reminder)
- Added corresponding dts changes for msm8996 and sm8350/sm8450.
Changes since v5:
- Rebased on top of phy/next
Changes since v4:
- Rebased, dropping merged clk patches
- Fixed whitespace errors
- Added linebreaks to fit into 100 chars limit
Changes since v3:
- Rewrote asm9260 clk driver to fix the TODO item by using parent index
rather than calling of_clk_get_parent_name().
Changes since v2:
- Added error handling to phy_symbols_clk_register() (requested by
Johan).
Changes since v1:
- Added a macro used by clk-asm9260, so that the clk-fixed-rate changes
do not affect the driver
- Changed registered clock names to be unique (as e.g. SC8280XP will
have two UFS PHYs).
Dmitry Baryshkov (4):
dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
phy: qcom-qmp-ufs: provide symbol clocks
arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
arm64: dts: qcom: use UFS symbol clocks provided by PHY
Dmitry Baryshkov (4):
dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
phy: qcom-qmp-ufs: provide symbol clocks
arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
arm64: dts: qcom: use UFS symbol clocks provided by PHY
.../phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +
.../phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 3 +
arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 +-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 ++------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 ++++-
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 57 +++++++++++++++++++
6 files changed, 84 insertions(+), 24 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v9 1/4] dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2022-11-23 10:44 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Krzysztof Kozlowski
Add #clock-cells property to the QMP UFS PHYs to describe them as clock
providers. The QMP PHY provides rx and tx symbol clocks for the GCC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +++
.../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 3 +++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
index be41acbd3b6c..80a5348dbfde 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
@@ -75,6 +75,9 @@ patternProperties:
minItems: 3
maxItems: 6
+ "#clock-cells":
+ const: 1
+
"#phy-cells":
const: 0
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index dde86a19f792..32ed1886fbae 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
@@ -43,6 +43,9 @@ properties:
vdda-pll-supply: true
+ "#clock-cells":
+ const: 1
+
"#phy-cells":
const: 0
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 1/4] dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Krzysztof Kozlowski
Add #clock-cells property to the QMP UFS PHYs to describe them as clock
providers. The QMP PHY provides rx and tx symbol clocks for the GCC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml | 3 +++
.../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml | 3 +++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
index be41acbd3b6c..80a5348dbfde 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml
@@ -75,6 +75,9 @@ patternProperties:
minItems: 3
maxItems: 6
+ "#clock-cells":
+ const: 1
+
"#phy-cells":
const: 0
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index dde86a19f792..32ed1886fbae 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
@@ -43,6 +43,9 @@ properties:
vdda-pll-supply: true
+ "#clock-cells":
+ const: 1
+
"#phy-cells":
const: 0
--
2.35.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 2/4] phy: qcom-qmp-ufs: provide symbol clocks
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2022-11-23 10:44 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy, devicetree
Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
provider to let other devices link these clocks through the DT.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 57 +++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 189103d1bd18..ce50eabccb9d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1023,6 +1023,59 @@ static int qmp_ufs_clk_init(struct qmp_ufs *qmp)
return devm_clk_bulk_get(dev, num, qmp->clks);
}
+static void qmp_ufs_clk_release_provider(void *res)
+{
+ of_clk_del_provider(res);
+}
+
+#define UFS_SYMBOL_CLOCKS 3
+
+static int qmp_ufs_register_clocks(struct qmp_ufs *qmp, struct device_node *np)
+{
+ struct clk_hw_onecell_data *clk_data;
+ struct clk_hw *hw;
+ char name[64];
+ int ret;
+
+ clk_data = devm_kzalloc(qmp->dev,
+ struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
+ GFP_KERNEL);
+ if (!clk_data)
+ return -ENOMEM;
+
+ clk_data->num = UFS_SYMBOL_CLOCKS;
+
+ snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[0] = hw;
+
+ snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[1] = hw;
+
+ snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[2] = hw;
+
+ ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
+ if (ret)
+ return ret;
+
+ /*
+ * Roll a devm action because the clock provider can be a child node.
+ */
+ return devm_add_action_or_reset(qmp->dev, qmp_ufs_clk_release_provider, np);
+}
+
static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np)
{
struct platform_device *pdev = to_platform_device(qmp->dev);
@@ -1135,6 +1188,10 @@ static int qmp_ufs_probe(struct platform_device *pdev)
if (ret)
goto err_node_put;
+ ret = qmp_ufs_register_clocks(qmp, np);
+ if (ret)
+ goto err_node_put;
+
qmp->phy = devm_phy_create(dev, np, &qcom_qmp_ufs_phy_ops);
if (IS_ERR(qmp->phy)) {
ret = PTR_ERR(qmp->phy);
--
2.35.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 2/4] phy: qcom-qmp-ufs: provide symbol clocks
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy, devicetree
Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
provider to let other devices link these clocks through the DT.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 57 +++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index 189103d1bd18..ce50eabccb9d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1023,6 +1023,59 @@ static int qmp_ufs_clk_init(struct qmp_ufs *qmp)
return devm_clk_bulk_get(dev, num, qmp->clks);
}
+static void qmp_ufs_clk_release_provider(void *res)
+{
+ of_clk_del_provider(res);
+}
+
+#define UFS_SYMBOL_CLOCKS 3
+
+static int qmp_ufs_register_clocks(struct qmp_ufs *qmp, struct device_node *np)
+{
+ struct clk_hw_onecell_data *clk_data;
+ struct clk_hw *hw;
+ char name[64];
+ int ret;
+
+ clk_data = devm_kzalloc(qmp->dev,
+ struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
+ GFP_KERNEL);
+ if (!clk_data)
+ return -ENOMEM;
+
+ clk_data->num = UFS_SYMBOL_CLOCKS;
+
+ snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[0] = hw;
+
+ snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[1] = hw;
+
+ snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev));
+ hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ clk_data->hws[2] = hw;
+
+ ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
+ if (ret)
+ return ret;
+
+ /*
+ * Roll a devm action because the clock provider can be a child node.
+ */
+ return devm_add_action_or_reset(qmp->dev, qmp_ufs_clk_release_provider, np);
+}
+
static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np)
{
struct platform_device *pdev = to_platform_device(qmp->dev);
@@ -1135,6 +1188,10 @@ static int qmp_ufs_probe(struct platform_device *pdev)
if (ret)
goto err_node_put;
+ ret = qmp_ufs_register_clocks(qmp, np);
+ if (ret)
+ goto err_node_put;
+
qmp->phy = devm_phy_create(dev, np, &qcom_qmp_ufs_phy_ops);
if (IS_ERR(qmp->phy)) {
ret = PTR_ERR(qmp->phy);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 3/4] arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2022-11-23 10:44 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Konrad Dybcio
Move the sleep_clk to make sure the gcc device node follows the schema.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index d32f08df743d..efb01fefe9c7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -720,13 +720,13 @@ gcc: clock-controller@100000 {
#reset-cells = <1>;
#power-domain-cells = <1>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>,
<&pcie0_lane>,
- <&pcie1_lane>,
- <&sleep_clk>;
+ <&pcie1_lane>;
clock-names = "bi_tcxo",
+ "sleep_clk",
"pcie_0_pipe_clk",
- "pcie_1_pipe_clk",
- "sleep_clk";
+ "pcie_1_pipe_clk";
};
gpi_dma2: dma-controller@800000 {
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 3/4] arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Konrad Dybcio
Move the sleep_clk to make sure the gcc device node follows the schema.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index d32f08df743d..efb01fefe9c7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -720,13 +720,13 @@ gcc: clock-controller@100000 {
#reset-cells = <1>;
#power-domain-cells = <1>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>,
<&pcie0_lane>,
- <&pcie1_lane>,
- <&sleep_clk>;
+ <&pcie1_lane>;
clock-names = "bi_tcxo",
+ "sleep_clk",
"pcie_0_pipe_clk",
- "pcie_1_pipe_clk",
- "sleep_clk";
+ "pcie_1_pipe_clk";
};
gpi_dma2: dma-controller@800000 {
--
2.35.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2022-11-23 10:44 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Konrad Dybcio
Remove manually created symbol clocks and replace them with clocks
provided by PHY.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 ++++-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 ++++---------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 +++++++++++++--
3 files changed, 21 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index c0a2baffa49d..935ba6e6bc15 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -699,7 +699,9 @@ gcc: clock-controller@300000 {
<&pciephy_1>,
<&pciephy_2>,
<&ssusb_phy_0>,
- <0>, <0>, <0>;
+ <&ufsphy_lane 0>,
+ <&ufsphy_lane 1>,
+ <&ufsphy_lane 2>;
clock-names = "cxo",
"cxo2",
"sleep_clk",
@@ -2019,6 +2021,7 @@ ufsphy_lane: phy@627400 {
reg = <0x627400 0x12c>,
<0x627600 0x200>,
<0x627c00 0x1b4>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index a86d9ea93b9d..553cf451f283 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -37,24 +37,6 @@ sleep_clk: sleep-clk {
clock-frequency = <32000>;
#clock-cells = <0>;
};
-
- ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
-
- ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
-
- ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
};
cpus {
@@ -661,9 +643,9 @@ gcc: clock-controller@100000 {
<0>,
<0>,
<0>,
- <&ufs_phy_rx_symbol_0_clk>,
- <&ufs_phy_rx_symbol_1_clk>,
- <&ufs_phy_tx_symbol_0_clk>,
+ <&ufs_mem_phy_lanes 0>,
+ <&ufs_mem_phy_lanes 1>,
+ <&ufs_mem_phy_lanes 2>,
<0>,
<0>;
};
@@ -2147,6 +2129,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
<0 0x01d87c00 0 0x1dc>,
<0 0x01d87800 0 0x108>,
<0 0x01d87a00 0 0x1e0>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index efb01fefe9c7..95c01391972a 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -722,11 +722,21 @@ gcc: clock-controller@100000 {
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&sleep_clk>,
<&pcie0_lane>,
- <&pcie1_lane>;
+ <&pcie1_lane>,
+ <0>,
+ <&ufs_mem_phy_lanes 0>,
+ <&ufs_mem_phy_lanes 1>,
+ <&ufs_mem_phy_lanes 2>,
+ <0>;
clock-names = "bi_tcxo",
"sleep_clk",
"pcie_0_pipe_clk",
- "pcie_1_pipe_clk";
+ "pcie_1_pipe_clk",
+ "pcie_1_phy_aux_clk",
+ "ufs_phy_rx_symbol_0_clk",
+ "ufs_phy_rx_symbol_1_clk",
+ "ufs_phy_tx_symbol_0_clk",
+ "usb3_phy_wrapper_gcc_usb30_pipe_clk";
};
gpi_dma2: dma-controller@800000 {
@@ -3166,6 +3176,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
<0 0x01d87c00 0 0x1dc>,
<0 0x01d87800 0 0x108>,
<0 0x01d87a00 0 0x1e0>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v9 4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY
@ 2022-11-23 10:44 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-11-23 10:44 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski
Cc: Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree, Konrad Dybcio
Remove manually created symbol clocks and replace them with clocks
provided by PHY.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 ++++-
arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 ++++---------------------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 +++++++++++++--
3 files changed, 21 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index c0a2baffa49d..935ba6e6bc15 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -699,7 +699,9 @@ gcc: clock-controller@300000 {
<&pciephy_1>,
<&pciephy_2>,
<&ssusb_phy_0>,
- <0>, <0>, <0>;
+ <&ufsphy_lane 0>,
+ <&ufsphy_lane 1>,
+ <&ufsphy_lane 2>;
clock-names = "cxo",
"cxo2",
"sleep_clk",
@@ -2019,6 +2021,7 @@ ufsphy_lane: phy@627400 {
reg = <0x627400 0x12c>,
<0x627600 0x200>,
<0x627c00 0x1b4>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index a86d9ea93b9d..553cf451f283 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -37,24 +37,6 @@ sleep_clk: sleep-clk {
clock-frequency = <32000>;
#clock-cells = <0>;
};
-
- ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
-
- ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
-
- ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 {
- compatible = "fixed-clock";
- clock-frequency = <1000>;
- #clock-cells = <0>;
- };
};
cpus {
@@ -661,9 +643,9 @@ gcc: clock-controller@100000 {
<0>,
<0>,
<0>,
- <&ufs_phy_rx_symbol_0_clk>,
- <&ufs_phy_rx_symbol_1_clk>,
- <&ufs_phy_tx_symbol_0_clk>,
+ <&ufs_mem_phy_lanes 0>,
+ <&ufs_mem_phy_lanes 1>,
+ <&ufs_mem_phy_lanes 2>,
<0>,
<0>;
};
@@ -2147,6 +2129,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
<0 0x01d87c00 0 0x1dc>,
<0 0x01d87800 0 0x108>,
<0 0x01d87a00 0 0x1e0>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index efb01fefe9c7..95c01391972a 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -722,11 +722,21 @@ gcc: clock-controller@100000 {
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&sleep_clk>,
<&pcie0_lane>,
- <&pcie1_lane>;
+ <&pcie1_lane>,
+ <0>,
+ <&ufs_mem_phy_lanes 0>,
+ <&ufs_mem_phy_lanes 1>,
+ <&ufs_mem_phy_lanes 2>,
+ <0>;
clock-names = "bi_tcxo",
"sleep_clk",
"pcie_0_pipe_clk",
- "pcie_1_pipe_clk";
+ "pcie_1_pipe_clk",
+ "pcie_1_phy_aux_clk",
+ "ufs_phy_rx_symbol_0_clk",
+ "ufs_phy_rx_symbol_1_clk",
+ "ufs_phy_tx_symbol_0_clk",
+ "usb3_phy_wrapper_gcc_usb30_pipe_clk";
};
gpi_dma2: dma-controller@800000 {
@@ -3166,6 +3176,7 @@ ufs_mem_phy_lanes: phy@1d87400 {
<0 0x01d87c00 0 0x1dc>,
<0 0x01d87800 0 0x108>,
<0 0x01d87a00 0 0x1e0>;
+ #clock-cells = <1>;
#phy-cells = <0>;
};
};
--
2.35.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2023-01-12 17:16 ` Vinod Koul
-1 siblings, 0 replies; 14+ messages in thread
From: Vinod Koul @ 2023-01-12 17:16 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree
On 23-11-22, 12:44, Dmitry Baryshkov wrote:
> Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
> platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
> be used as GCC clock parents).
Applied 1-2, thanks
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
@ 2023-01-12 17:16 ` Vinod Koul
0 siblings, 0 replies; 14+ messages in thread
From: Vinod Koul @ 2023-01-12 17:16 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Johan Hovold, Philipp Zabel, linux-arm-msm, linux-phy,
devicetree
On 23-11-22, 12:44, Dmitry Baryshkov wrote:
> Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
> platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
> be used as GCC clock parents).
Applied 1-2, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: (subset) [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
2022-11-23 10:44 ` Dmitry Baryshkov
@ 2023-01-17 18:24 ` Bjorn Andersson
-1 siblings, 0 replies; 14+ messages in thread
From: Bjorn Andersson @ 2023-01-17 18:24 UTC (permalink / raw)
To: dmitry.baryshkov, kishon, robh+dt, konrad.dybcio, agross, vkoul,
krzysztof.kozlowski+dt
Cc: devicetree, linux-arm-msm, linux-phy, p.zabel, johan
On Wed, 23 Nov 2022 12:44:39 +0200, Dmitry Baryshkov wrote:
> Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
> platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
> be used as GCC clock parents).
>
> Changes since v8:
> - Send proper patchset this time.
>
> [...]
Applied, thanks!
[4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY
commit: 86543bc6eec499f7fd12e1628a29838aa90c288a
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: (subset) [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support
@ 2023-01-17 18:24 ` Bjorn Andersson
0 siblings, 0 replies; 14+ messages in thread
From: Bjorn Andersson @ 2023-01-17 18:24 UTC (permalink / raw)
To: dmitry.baryshkov, kishon, robh+dt, konrad.dybcio, agross, vkoul,
krzysztof.kozlowski+dt
Cc: devicetree, linux-arm-msm, linux-phy, p.zabel, johan
On Wed, 23 Nov 2022 12:44:39 +0200, Dmitry Baryshkov wrote:
> Register UFS symbol clocks in the Qualcomm QMP PHY driver. Some of the
> platforms (msm8996, sc7280, sm8350/sm8450) expect them to be defined (to
> be used as GCC clock parents).
>
> Changes since v8:
> - Send proper patchset this time.
>
> [...]
Applied, thanks!
[4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY
commit: 86543bc6eec499f7fd12e1628a29838aa90c288a
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-01-17 19:13 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-23 10:44 [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support Dmitry Baryshkov
2022-11-23 10:44 ` Dmitry Baryshkov
2022-11-23 10:44 ` [PATCH v9 1/4] dt-bindings: phy: qcom,*-qmp-ufs-phy: add clock-cells property Dmitry Baryshkov
2022-11-23 10:44 ` Dmitry Baryshkov
2022-11-23 10:44 ` [PATCH v9 2/4] phy: qcom-qmp-ufs: provide symbol clocks Dmitry Baryshkov
2022-11-23 10:44 ` Dmitry Baryshkov
2022-11-23 10:44 ` [PATCH v9 3/4] arm64: dts: qcom: sm8450: fix gcc clocks order to follow the schema Dmitry Baryshkov
2022-11-23 10:44 ` Dmitry Baryshkov
2022-11-23 10:44 ` [PATCH v9 4/4] arm64: dts: qcom: use UFS symbol clocks provided by PHY Dmitry Baryshkov
2022-11-23 10:44 ` Dmitry Baryshkov
2023-01-12 17:16 ` [PATCH v9 0/4] phy: qcom-qmp-ufs: add symbol clocks support Vinod Koul
2023-01-12 17:16 ` Vinod Koul
2023-01-17 18:24 ` (subset) " Bjorn Andersson
2023-01-17 18:24 ` Bjorn Andersson
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