From: Anup Patel <apatel@ventanamicro.com> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Atish Patra <atishp@atishpatra.org>, Alistair Francis <Alistair.Francis@wdc.com>, Anup Patel <anup@brainfault.org>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel <apatel@ventanamicro.com> Subject: [PATCH v14 8/8] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers Date: Thu, 1 Dec 2022 18:31:35 +0530 [thread overview] Message-ID: <20221201130135.1115380-9-apatel@ventanamicro.com> (raw) In-Reply-To: <20221201130135.1115380-1-apatel@ventanamicro.com> We add empty irq_eoi() in RISC-V INTC driver for child irqchip drivers (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) which implement chained handlers for parent per-HART local interrupts. This hels us avoid unnecessary mask/unmask of per-HART local interrupts at the time of handling interrupts. Signed-off-by: Anup Patel <apatel@ventanamicro.com> --- drivers/irqchip/irq-riscv-intc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 784d25645704..f229e3e66387 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -46,10 +46,27 @@ static void riscv_intc_irq_unmask(struct irq_data *d) csr_set(CSR_IE, BIT(d->hwirq)); } +static void riscv_intc_irq_eoi(struct irq_data *d) +{ + /* + * The RISC-V INTC driver uses handle_percpu_devid_irq() flow + * for the per-HART local interrupts and child irqchip drivers + * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement + * chained handlers for the per-HART local interrupts. + * + * In the absence of irq_eoi(), the chained_irq_enter() and + * chained_irq_exit() functions (used by child irqchip drivers) + * will do unnecessary mask/unmask of per-HART local interrupts + * at the time of handling interrupts. To avoid this, we provide + * an empty irq_eoi() callback for RISC-V INTC irqchip. + */ +} + static struct irq_chip riscv_intc_chip = { .name = "RISC-V INTC", .irq_mask = riscv_intc_irq_mask, .irq_unmask = riscv_intc_irq_unmask, + .irq_eoi = riscv_intc_irq_eoi, }; static int riscv_intc_domain_map(struct irq_domain *d, unsigned int irq, -- 2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Atish Patra <atishp@atishpatra.org>, Alistair Francis <Alistair.Francis@wdc.com>, Anup Patel <anup@brainfault.org>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Anup Patel <apatel@ventanamicro.com> Subject: [PATCH v14 8/8] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers Date: Thu, 1 Dec 2022 18:31:35 +0530 [thread overview] Message-ID: <20221201130135.1115380-9-apatel@ventanamicro.com> (raw) In-Reply-To: <20221201130135.1115380-1-apatel@ventanamicro.com> We add empty irq_eoi() in RISC-V INTC driver for child irqchip drivers (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) which implement chained handlers for parent per-HART local interrupts. This hels us avoid unnecessary mask/unmask of per-HART local interrupts at the time of handling interrupts. Signed-off-by: Anup Patel <apatel@ventanamicro.com> --- drivers/irqchip/irq-riscv-intc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 784d25645704..f229e3e66387 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -46,10 +46,27 @@ static void riscv_intc_irq_unmask(struct irq_data *d) csr_set(CSR_IE, BIT(d->hwirq)); } +static void riscv_intc_irq_eoi(struct irq_data *d) +{ + /* + * The RISC-V INTC driver uses handle_percpu_devid_irq() flow + * for the per-HART local interrupts and child irqchip drivers + * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement + * chained handlers for the per-HART local interrupts. + * + * In the absence of irq_eoi(), the chained_irq_enter() and + * chained_irq_exit() functions (used by child irqchip drivers) + * will do unnecessary mask/unmask of per-HART local interrupts + * at the time of handling interrupts. To avoid this, we provide + * an empty irq_eoi() callback for RISC-V INTC irqchip. + */ +} + static struct irq_chip riscv_intc_chip = { .name = "RISC-V INTC", .irq_mask = riscv_intc_irq_mask, .irq_unmask = riscv_intc_irq_unmask, + .irq_eoi = riscv_intc_irq_eoi, }; static int riscv_intc_domain_map(struct irq_domain *d, unsigned int irq, -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-12-01 13:02 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-01 13:01 [PATCH v14 0/8] RISC-V IPI Improvements Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 1/8] RISC-V: Clear SIP bit only when using SBI IPI operations Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 2/8] irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 3/8] genirq: Add mechanism to multiplex a single HW IPI Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 17:20 ` Thomas Gleixner 2022-12-01 17:20 ` Thomas Gleixner 2022-12-01 18:00 ` Anup Patel 2022-12-01 18:00 ` Anup Patel 2022-12-02 2:09 ` Thomas Gleixner 2022-12-02 2:09 ` Thomas Gleixner 2022-12-02 5:04 ` Anup Patel 2022-12-02 5:04 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 4/8] RISC-V: Treat IPIs as normal Linux IRQs Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 5/8] RISC-V: Allow marking IPIs as suitable for remote FENCEs Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 6/8] RISC-V: Use IPIs for remote TLB flush when possible Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` [PATCH v14 7/8] RISC-V: Use IPIs for remote icache " Anup Patel 2022-12-01 13:01 ` Anup Patel 2022-12-01 13:01 ` Anup Patel [this message] 2022-12-01 13:01 ` [PATCH v14 8/8] irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers Anup Patel
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