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* [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
@ 2022-12-01 11:37 Andrew Jones
  2022-12-01 11:55 ` Heiko Stübner
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Andrew Jones @ 2022-12-01 11:37 UTC (permalink / raw)
  To: linux-riscv
  Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Heiko Stuebner,
	Conor Dooley, Jisheng Zhang

Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
created with a value >= RISCV_ISA_EXT_MAX. We can do this by
putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
redundant with RISCV_ISA_EXT_MAX and hence only used to
document the limit. Now it grows with the enum and is used to
check the limit.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/include/asm/hwcap.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index b22525290073..86328e3acb02 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
 	RISCV_ISA_EXT_ZIHINTPAUSE,
 	RISCV_ISA_EXT_SSTC,
 	RISCV_ISA_EXT_SVINVAL,
-	RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX,
+	RISCV_ISA_EXT_ID_MAX
 };
+static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);
 
 /*
  * This enum represents the logical ID for each RISC-V ISA extension static
-- 
2.38.1


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^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
  2022-12-01 11:37 [PATCH] riscv: Apply a static assert to riscv_isa_ext_id Andrew Jones
@ 2022-12-01 11:55 ` Heiko Stübner
  2022-12-01 17:24 ` Conor Dooley
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Heiko Stübner @ 2022-12-01 11:55 UTC (permalink / raw)
  To: linux-riscv, Andrew Jones
  Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Conor Dooley, Jisheng Zhang

Am Donnerstag, 1. Dezember 2022, 12:37:50 CET schrieb Andrew Jones:
> Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> redundant with RISCV_ISA_EXT_MAX and hence only used to
> document the limit. Now it grows with the enum and is used to
> check the limit.
> 
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>

Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>

> ---
>  arch/riscv/include/asm/hwcap.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index b22525290073..86328e3acb02 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
>  	RISCV_ISA_EXT_ZIHINTPAUSE,
>  	RISCV_ISA_EXT_SSTC,
>  	RISCV_ISA_EXT_SVINVAL,
> -	RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX,
> +	RISCV_ISA_EXT_ID_MAX
>  };
> +static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);
>  
>  /*
>   * This enum represents the logical ID for each RISC-V ISA extension static
> 





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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
  2022-12-01 11:37 [PATCH] riscv: Apply a static assert to riscv_isa_ext_id Andrew Jones
  2022-12-01 11:55 ` Heiko Stübner
@ 2022-12-01 17:24 ` Conor Dooley
  2022-12-01 17:38   ` Andrew Jones
  2022-12-13 16:21 ` Palmer Dabbelt
  2022-12-13 16:30 ` patchwork-bot+linux-riscv
  3 siblings, 1 reply; 6+ messages in thread
From: Conor Dooley @ 2022-12-01 17:24 UTC (permalink / raw)
  To: Andrew Jones
  Cc: linux-riscv, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Heiko Stuebner, Conor Dooley, Jisheng Zhang

On Thu, Dec 01, 2022 at 12:37:50PM +0100, Andrew Jones wrote:
> Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> redundant with RISCV_ISA_EXT_MAX and hence only used to
> document the limit. Now it grows with the enum and is used to
> check the limit.
> 
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>  arch/riscv/include/asm/hwcap.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> index b22525290073..86328e3acb02 100644
> --- a/arch/riscv/include/asm/hwcap.h
> +++ b/arch/riscv/include/asm/hwcap.h
> @@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
>  	RISCV_ISA_EXT_ZIHINTPAUSE,
>  	RISCV_ISA_EXT_SSTC,
>  	RISCV_ISA_EXT_SVINVAL,
> -	RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX,
> +	RISCV_ISA_EXT_ID_MAX
>  };
> +static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);

FWIW checkpatch complains about the lack of a blank line prior to the
static_assert, but dunno how much anyone cares about that. Lack of a
blank line here makes the purpose more obvious to me /shrug

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

>  
>  /*
>   * This enum represents the logical ID for each RISC-V ISA extension static
> -- 
> 2.38.1
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
  2022-12-01 17:24 ` Conor Dooley
@ 2022-12-01 17:38   ` Andrew Jones
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Jones @ 2022-12-01 17:38 UTC (permalink / raw)
  To: Conor Dooley
  Cc: linux-riscv, Paul Walmsley, Palmer Dabbelt, Albert Ou,
	Heiko Stuebner, Conor Dooley, Jisheng Zhang

On Thu, Dec 01, 2022 at 05:24:17PM +0000, Conor Dooley wrote:
> On Thu, Dec 01, 2022 at 12:37:50PM +0100, Andrew Jones wrote:
> > Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> > created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> > putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> > redundant with RISCV_ISA_EXT_MAX and hence only used to
> > document the limit. Now it grows with the enum and is used to
> > check the limit.
> > 
> > Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> > ---
> >  arch/riscv/include/asm/hwcap.h | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
> > index b22525290073..86328e3acb02 100644
> > --- a/arch/riscv/include/asm/hwcap.h
> > +++ b/arch/riscv/include/asm/hwcap.h
> > @@ -59,8 +59,9 @@ enum riscv_isa_ext_id {
> >  	RISCV_ISA_EXT_ZIHINTPAUSE,
> >  	RISCV_ISA_EXT_SSTC,
> >  	RISCV_ISA_EXT_SVINVAL,
> > -	RISCV_ISA_EXT_ID_MAX = RISCV_ISA_EXT_MAX,
> > +	RISCV_ISA_EXT_ID_MAX
> >  };
> > +static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);
> 
> FWIW checkpatch complains about the lack of a blank line prior to the
> static_assert, but dunno how much anyone cares about that. Lack of a
> blank line here makes the purpose more obvious to me /shrug

To me too. Hopefully checkpatch robots will feel the same.

> 
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
drew

> 
> >  
> >  /*
> >   * This enum represents the logical ID for each RISC-V ISA extension static
> > -- 
> > 2.38.1
> > 
> > 
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
  2022-12-01 11:37 [PATCH] riscv: Apply a static assert to riscv_isa_ext_id Andrew Jones
  2022-12-01 11:55 ` Heiko Stübner
  2022-12-01 17:24 ` Conor Dooley
@ 2022-12-13 16:21 ` Palmer Dabbelt
  2022-12-13 16:30 ` patchwork-bot+linux-riscv
  3 siblings, 0 replies; 6+ messages in thread
From: Palmer Dabbelt @ 2022-12-13 16:21 UTC (permalink / raw)
  To: Andrew Jones, linux-riscv
  Cc: Jisheng Zhang, Paul Walmsley, Conor Dooley, Albert Ou,
	Heiko Stuebner, Palmer Dabbelt

On Thu, 1 Dec 2022 12:37:50 +0100, Andrew Jones wrote:
> Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> redundant with RISCV_ISA_EXT_MAX and hence only used to
> document the limit. Now it grows with the enum and is used to
> check the limit.
> 
> [...]

Applied, thanks!

[1/1] riscv: Apply a static assert to riscv_isa_ext_id
      https://git.kernel.org/palmer/c/e923f4625ed3

Best regards,
-- 
Palmer Dabbelt <palmer@rivosinc.com>

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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] riscv: Apply a static assert to riscv_isa_ext_id
  2022-12-01 11:37 [PATCH] riscv: Apply a static assert to riscv_isa_ext_id Andrew Jones
                   ` (2 preceding siblings ...)
  2022-12-13 16:21 ` Palmer Dabbelt
@ 2022-12-13 16:30 ` patchwork-bot+linux-riscv
  3 siblings, 0 replies; 6+ messages in thread
From: patchwork-bot+linux-riscv @ 2022-12-13 16:30 UTC (permalink / raw)
  To: Andrew Jones
  Cc: linux-riscv, paul.walmsley, palmer, aou, heiko, conor.dooley, jszhang

Hello:

This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Thu,  1 Dec 2022 12:37:50 +0100 you wrote:
> Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
> created with a value >= RISCV_ISA_EXT_MAX. We can do this by
> putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
> redundant with RISCV_ISA_EXT_MAX and hence only used to
> document the limit. Now it grows with the enum and is used to
> check the limit.
> 
> [...]

Here is the summary with links:
  - riscv: Apply a static assert to riscv_isa_ext_id
    https://git.kernel.org/riscv/c/e923f4625ed3

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-12-13 16:30 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-01 11:37 [PATCH] riscv: Apply a static assert to riscv_isa_ext_id Andrew Jones
2022-12-01 11:55 ` Heiko Stübner
2022-12-01 17:24 ` Conor Dooley
2022-12-01 17:38   ` Andrew Jones
2022-12-13 16:21 ` Palmer Dabbelt
2022-12-13 16:30 ` patchwork-bot+linux-riscv

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