* [PATCH 0/3] mtd: spi-nor: Extend SFDP to support additional octal modes as per latest JEDEC standard
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
0 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
In the latest JEDEC standard (JESD216F), there are now bitfields in the
4 byte address instruction table for 1S-1S-8S and 1S-8S-8S modes
This patchset adds support for checking the 4BAIT for these modes,
along with additional NO_SFDP_FLAGS to support enabling these new modes
Nathan Barrett-Morrison (3):
mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with
new octal modes as per JEDEC JESD216F
mtd: spi-nor: Add additional octal-mode flags to be checked during
SFDP
mtd: spi-nor: Add support for IS25LX256 operating in 1S-1S-8S mode
drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++-
drivers/mtd/spi-nor/core.h | 9 ++++++---
drivers/mtd/spi-nor/issi.c | 3 +++
drivers/mtd/spi-nor/sfdp.c | 5 +++++
4 files changed, 34 insertions(+), 4 deletions(-)
--
2.30.2
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/3] mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with new octal modes as per JEDEC JESD216F
2022-12-01 18:15 ` Nathan Barrett-Morrison
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
-1 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds the new bit fields for
reading: 1S-1S-8S, 1S-8S-8S, 1D-8D-8D
programming: 1S-1S-8S, 1S-8S-8S
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/sfdp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index 2257f1b4c2e2..e4e87815ba94 100644
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -953,11 +953,16 @@ static int spi_nor_parse_4bait(struct spi_nor *nor,
{ SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
{ SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
{ SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
+ { SNOR_HWCAPS_READ_1_1_8, BIT(20) },
+ { SNOR_HWCAPS_READ_1_8_8, BIT(21) },
+ { SNOR_HWCAPS_READ_1_8_8_DTR, BIT(22) },
};
static const struct sfdp_4bait programs[] = {
{ SNOR_HWCAPS_PP, BIT(6) },
{ SNOR_HWCAPS_PP_1_1_4, BIT(7) },
{ SNOR_HWCAPS_PP_1_4_4, BIT(8) },
+ { SNOR_HWCAPS_PP_1_1_8, BIT(23) },
+ { SNOR_HWCAPS_PP_1_8_8, BIT(24) },
};
static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
{ 0u /* not used */, BIT(9) },
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 1/3] mtd: spi-nor: Extend SFDP 4byte address instruction lookup table with new octal modes as per JEDEC JESD216F
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
0 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds the new bit fields for
reading: 1S-1S-8S, 1S-8S-8S, 1D-8D-8D
programming: 1S-1S-8S, 1S-8S-8S
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/sfdp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index 2257f1b4c2e2..e4e87815ba94 100644
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -953,11 +953,16 @@ static int spi_nor_parse_4bait(struct spi_nor *nor,
{ SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
{ SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
{ SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
+ { SNOR_HWCAPS_READ_1_1_8, BIT(20) },
+ { SNOR_HWCAPS_READ_1_8_8, BIT(21) },
+ { SNOR_HWCAPS_READ_1_8_8_DTR, BIT(22) },
};
static const struct sfdp_4bait programs[] = {
{ SNOR_HWCAPS_PP, BIT(6) },
{ SNOR_HWCAPS_PP_1_1_4, BIT(7) },
{ SNOR_HWCAPS_PP_1_4_4, BIT(8) },
+ { SNOR_HWCAPS_PP_1_1_8, BIT(23) },
+ { SNOR_HWCAPS_PP_1_8_8, BIT(24) },
};
static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
{ 0u /* not used */, BIT(9) },
--
2.30.2
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] mtd: spi-nor: Add additional octal-mode flags to be checked during SFDP
2022-12-01 18:15 ` Nathan Barrett-Morrison
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
-1 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds some support for searching a chips SFDP table for:
read commands: 1S-8S-8S
program commands: 1S-1S-8S, 1S-8S-8S
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++-
drivers/mtd/spi-nor/core.h | 9 ++++++---
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index bee8fc4c9f07..7475a9a22881 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2335,7 +2335,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
{
struct spi_nor_flash_parameter *params = nor->params;
struct spi_nor_erase_map *map = ¶ms->erase_map;
- const u8 no_sfdp_flags = nor->info->no_sfdp_flags;
+ const u16 no_sfdp_flags = nor->info->no_sfdp_flags;
u8 i, erase_mask;
if (no_sfdp_flags & SPI_NOR_DUAL_READ) {
@@ -2359,6 +2359,25 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
SNOR_PROTO_1_1_8);
}
+ if (no_sfdp_flags & SPI_NOR_OCTAL_READ_1_8_8) {
+ params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8;
+ spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8],
+ 0, 16, SPINOR_OP_READ_1_8_8,
+ SNOR_PROTO_1_8_8);
+ }
+
+ if (no_sfdp_flags & SPI_NOR_OCTAL_PP) {
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_8;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_8],
+ SPINOR_OP_PP_1_1_8, SNOR_PROTO_1_1_8);
+ }
+
+ if (no_sfdp_flags & SPI_NOR_OCTAL_PP_1_8_8) {
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_8_8;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_8_8_8],
+ SPINOR_OP_PP_1_8_8, SNOR_PROTO_1_8_8);
+ }
+
if (no_sfdp_flags & SPI_NOR_OCTAL_DTR_READ) {
params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR],
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 85b0cf254e97..25a0d4f1850b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -508,14 +508,17 @@ struct flash_info {
#define NO_CHIP_ERASE BIT(7)
#define SPI_NOR_NO_FR BIT(8)
- u8 no_sfdp_flags;
+ u16 no_sfdp_flags;
#define SPI_NOR_SKIP_SFDP BIT(0)
#define SECT_4K BIT(1)
#define SPI_NOR_DUAL_READ BIT(3)
#define SPI_NOR_QUAD_READ BIT(4)
#define SPI_NOR_OCTAL_READ BIT(5)
-#define SPI_NOR_OCTAL_DTR_READ BIT(6)
-#define SPI_NOR_OCTAL_DTR_PP BIT(7)
+#define SPI_NOR_OCTAL_READ_1_8_8 BIT(6)
+#define SPI_NOR_OCTAL_PP BIT(7)
+#define SPI_NOR_OCTAL_PP_1_8_8 BIT(8)
+#define SPI_NOR_OCTAL_DTR_READ BIT(9)
+#define SPI_NOR_OCTAL_DTR_PP BIT(10)
u8 fixup_flags;
#define SPI_NOR_4B_OPCODES BIT(0)
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/3] mtd: spi-nor: Add additional octal-mode flags to be checked during SFDP
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
0 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds some support for searching a chips SFDP table for:
read commands: 1S-8S-8S
program commands: 1S-1S-8S, 1S-8S-8S
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++-
drivers/mtd/spi-nor/core.h | 9 ++++++---
2 files changed, 26 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index bee8fc4c9f07..7475a9a22881 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2335,7 +2335,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
{
struct spi_nor_flash_parameter *params = nor->params;
struct spi_nor_erase_map *map = ¶ms->erase_map;
- const u8 no_sfdp_flags = nor->info->no_sfdp_flags;
+ const u16 no_sfdp_flags = nor->info->no_sfdp_flags;
u8 i, erase_mask;
if (no_sfdp_flags & SPI_NOR_DUAL_READ) {
@@ -2359,6 +2359,25 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
SNOR_PROTO_1_1_8);
}
+ if (no_sfdp_flags & SPI_NOR_OCTAL_READ_1_8_8) {
+ params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8;
+ spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8],
+ 0, 16, SPINOR_OP_READ_1_8_8,
+ SNOR_PROTO_1_8_8);
+ }
+
+ if (no_sfdp_flags & SPI_NOR_OCTAL_PP) {
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_8;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_8],
+ SPINOR_OP_PP_1_1_8, SNOR_PROTO_1_1_8);
+ }
+
+ if (no_sfdp_flags & SPI_NOR_OCTAL_PP_1_8_8) {
+ params->hwcaps.mask |= SNOR_HWCAPS_PP_1_8_8;
+ spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_8_8_8],
+ SPINOR_OP_PP_1_8_8, SNOR_PROTO_1_8_8);
+ }
+
if (no_sfdp_flags & SPI_NOR_OCTAL_DTR_READ) {
params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;
spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR],
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 85b0cf254e97..25a0d4f1850b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -508,14 +508,17 @@ struct flash_info {
#define NO_CHIP_ERASE BIT(7)
#define SPI_NOR_NO_FR BIT(8)
- u8 no_sfdp_flags;
+ u16 no_sfdp_flags;
#define SPI_NOR_SKIP_SFDP BIT(0)
#define SECT_4K BIT(1)
#define SPI_NOR_DUAL_READ BIT(3)
#define SPI_NOR_QUAD_READ BIT(4)
#define SPI_NOR_OCTAL_READ BIT(5)
-#define SPI_NOR_OCTAL_DTR_READ BIT(6)
-#define SPI_NOR_OCTAL_DTR_PP BIT(7)
+#define SPI_NOR_OCTAL_READ_1_8_8 BIT(6)
+#define SPI_NOR_OCTAL_PP BIT(7)
+#define SPI_NOR_OCTAL_PP_1_8_8 BIT(8)
+#define SPI_NOR_OCTAL_DTR_READ BIT(9)
+#define SPI_NOR_OCTAL_DTR_PP BIT(10)
u8 fixup_flags;
#define SPI_NOR_4B_OPCODES BIT(0)
--
2.30.2
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] mtd: spi-nor: Add support for IS25LX256 operating in 1S-1S-8S mode
2022-12-01 18:15 ` Nathan Barrett-Morrison
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
-1 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds the IS25LX256 chip into the ISSI flash_info parts table
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/issi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..b4412a9afc4e 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -74,6 +74,9 @@ static const struct flash_info issi_nor_parts[] = {
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &is25lp256_fixups },
+ { "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)
+ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES |
+ SPI_NOR_OCTAL_PP | SPI_NOR_OCTAL_READ) },
/* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2)
--
2.30.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 3/3] mtd: spi-nor: Add support for IS25LX256 operating in 1S-1S-8S mode
@ 2022-12-01 18:15 ` Nathan Barrett-Morrison
0 siblings, 0 replies; 8+ messages in thread
From: Nathan Barrett-Morrison @ 2022-12-01 18:15 UTC (permalink / raw)
Cc: nathan.morrison, greg.malysa, Tudor Ambarus, Pratyush Yadav,
Michael Walle, Miquel Raynal, Richard Weinberger,
Vignesh Raghavendra, open list:SPI NOR SUBSYSTEM, open list
This adds the IS25LX256 chip into the ISSI flash_info parts table
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
---
drivers/mtd/spi-nor/issi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi-nor/issi.c b/drivers/mtd/spi-nor/issi.c
index 89a66a19d754..b4412a9afc4e 100644
--- a/drivers/mtd/spi-nor/issi.c
+++ b/drivers/mtd/spi-nor/issi.c
@@ -74,6 +74,9 @@ static const struct flash_info issi_nor_parts[] = {
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
.fixups = &is25lp256_fixups },
+ { "is25lx256", INFO(0x9d5a19, 0, 128 * 1024, 256)
+ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_4B_OPCODES |
+ SPI_NOR_OCTAL_PP | SPI_NOR_OCTAL_READ) },
/* PMC */
{ "pm25lv512", INFO(0, 0, 32 * 1024, 2)
--
2.30.2
______________________________________________________
Linux MTD discussion mailing list
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^ permalink raw reply related [flat|nested] 8+ messages in thread