From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Shengjiu Wang <shengjiu.wang@nxp.com>,
Mark Brown <broonie@kernel.org>, Sasha Levin <sashal@kernel.org>,
shengjiu.wang@gmail.com, Xiubo.Lee@gmail.com,
lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH AUTOSEL 5.15 01/12] ASoC: fsl_micfil: explicitly clear software reset bit
Date: Tue, 6 Dec 2022 04:49:43 -0500 [thread overview]
Message-ID: <20221206094955.987437-1-sashal@kernel.org> (raw)
From: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Upstream commit 292709b9cf3ba470af94b62c9bb60284cc581b79 ]
SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
sound/soc/fsl/fsl_micfil.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 9f90989ac59a..cb84d95c3aac 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -191,6 +191,17 @@ static int fsl_micfil_reset(struct device *dev)
return ret;
}
+ /*
+ * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined
+ * as non-volatile register, so SRES still remain in regmap
+ * cache after set, that every update of REG_MICFIL_CTRL1,
+ * software reset happens. so clear it explicitly.
+ */
+ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
+ MICFIL_CTRL1_SRES);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
alsa-devel@alsa-project.org, Xiubo.Lee@gmail.com,
linuxppc-dev@lists.ozlabs.org,
Shengjiu Wang <shengjiu.wang@nxp.com>,
tiwai@suse.com, lgirdwood@gmail.com,
Mark Brown <broonie@kernel.org>,
shengjiu.wang@gmail.com
Subject: [PATCH AUTOSEL 5.15 01/12] ASoC: fsl_micfil: explicitly clear software reset bit
Date: Tue, 6 Dec 2022 04:49:43 -0500 [thread overview]
Message-ID: <20221206094955.987437-1-sashal@kernel.org> (raw)
From: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Upstream commit 292709b9cf3ba470af94b62c9bb60284cc581b79 ]
SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
sound/soc/fsl/fsl_micfil.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 9f90989ac59a..cb84d95c3aac 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -191,6 +191,17 @@ static int fsl_micfil_reset(struct device *dev)
return ret;
}
+ /*
+ * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined
+ * as non-volatile register, so SRES still remain in regmap
+ * cache after set, that every update of REG_MICFIL_CTRL1,
+ * software reset happens. so clear it explicitly.
+ */
+ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
+ MICFIL_CTRL1_SRES);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
alsa-devel@alsa-project.org, Xiubo.Lee@gmail.com,
linuxppc-dev@lists.ozlabs.org,
Shengjiu Wang <shengjiu.wang@nxp.com>,
tiwai@suse.com, lgirdwood@gmail.com, perex@perex.cz,
Mark Brown <broonie@kernel.org>,
shengjiu.wang@gmail.com
Subject: [PATCH AUTOSEL 5.15 01/12] ASoC: fsl_micfil: explicitly clear software reset bit
Date: Tue, 6 Dec 2022 04:49:43 -0500 [thread overview]
Message-ID: <20221206094955.987437-1-sashal@kernel.org> (raw)
From: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Upstream commit 292709b9cf3ba470af94b62c9bb60284cc581b79 ]
SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
sound/soc/fsl/fsl_micfil.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 9f90989ac59a..cb84d95c3aac 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -191,6 +191,17 @@ static int fsl_micfil_reset(struct device *dev)
return ret;
}
+ /*
+ * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined
+ * as non-volatile register, so SRES still remain in regmap
+ * cache after set, that every update of REG_MICFIL_CTRL1,
+ * software reset happens. so clear it explicitly.
+ */
+ ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
+ MICFIL_CTRL1_SRES);
+ if (ret)
+ return ret;
+
return 0;
}
--
2.35.1
next reply other threads:[~2022-12-06 9:51 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-06 9:49 Sasha Levin [this message]
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 01/12] ASoC: fsl_micfil: explicitly clear software reset bit Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 02/12] ASoC: fsl_micfil: explicitly clear CHnF flags Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 03/12] ASoC: ops: Check bounds for second channel in snd_soc_put_volsw_sx() Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 04/12] libbpf: Use page size as max_entries when probing ring buffer map Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 05/12] pinctrl: meditatek: Startup with the IRQs disabled Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 06/12] can: sja1000: fix size of OCR_MODE_MASK define Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 07/12] can: mcba_usb: Fix termination command argument Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 08/12] net: fec: don't reset irq coalesce settings to defaults on "ip link up" Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 09/12] net: loopback: use NET_NAME_PREDICTABLE for name_assign_type Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 10/12] ASoC: cs42l51: Correct PGA Volume minimum value Sasha Levin
2022-12-06 9:49 ` Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 11/12] perf: Fix perf_pending_task() UaF Sasha Levin
2022-12-06 9:49 ` [PATCH AUTOSEL 5.15 12/12] nvme-pci: clear the prp2 field when not used Sasha Levin
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