* [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS
@ 2022-12-14 9:07 Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
` (10 more replies)
0 siblings, 11 replies; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
These patches enable HDCP2.x on machines MTL and above.
From MTL onwards CSME is spilt into GSC and CSC and now
we use GSC CS instead of MEI to talk to firmware to start
HDCP authentication
--v2
-Fixing some checkpatch changes which I forgot before sending
out the series
--v3
-Drop cp and fw to make naming more agnostic[Jani]
-Sort header[Jani]
-remove static inline function from i915_hdcp_interface[Jani]
-abstract DISPLAY_VER check[Jani]
Anshuman Gupta (2):
drm/i915/hdcp: Keep cp fw agonstic naming convention
drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w
Suraj Kandpal (5):
drm/i915/gsc: Create GSC request submission mechanism
drm/i915/hdcp: Refactor HDCP API structures
drm/i915/hdcp: Fill wired_cmd_in structures at a single place
drm/i915/mtl: Add function to send command to GSC CS
drm/i915/mtl: Add HDCP GSC interface
drivers/gpu/drm/i915/Makefile | 2 +
.../gpu/drm/i915/display/intel_display_core.h | 3 +-
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 107 +--
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 716 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 21 +
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 62 +-
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 42 +
drivers/gpu/drm/i915/i915_hdcp_interface.c | 216 ++++++
drivers/misc/mei/hdcp/mei_hdcp.c | 189 +----
drivers/misc/mei/hdcp/mei_hdcp.h | 354 ---------
include/drm/i915_hdcp_interface.h | 578 ++++++++++++++
include/drm/i915_mei_hdcp_interface.h | 184 -----
15 files changed, 1736 insertions(+), 745 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
create mode 100644 drivers/gpu/drm/i915/i915_hdcp_interface.c
create mode 100644 include/drm/i915_hdcp_interface.h
delete mode 100644 include/drm/i915_mei_hdcp_interface.h
--
2.25.1
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-15 19:21 ` Teres Alexis, Alan Previn
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention Suraj Kandpal
` (9 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Alan Previn
HDCP and PXP will require a common function to allow it to
submit commands to the gsc cs. Also adding the gsc mtl header
that needs to be added on to the existing payloads of HDCP
and PXP.
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Suraj Kandpal<suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 62 +++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 3 +
drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 41 +++++++++++++
4 files changed, 105 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
index 2af1ae3831df..454179884801 100644
--- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
+++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
@@ -439,6 +439,8 @@
#define GSC_FW_LOAD GSC_INSTR(1, 0, 2)
#define HECI1_FW_LIMIT_VALID (1 << 31)
+#define GSC_HECI_CMD_PKT GSC_INSTR(0, 0, 6)
+
/*
* Used to convert any address to canonical form.
* Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index e73d4440c5e8..f00e88fdb5d2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -30,6 +30,35 @@ bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
return fw_status & GSC_FW_INIT_COMPLETE_BIT;
}
+struct gsc_heci_pkt {
+ u64 addr_in;
+ u32 size_in;
+ u64 addr_out;
+ u32 size_out;
+};
+
+static int emit_gsc_heci_pkt(struct i915_request *rq, struct gsc_heci_pkt *pkt)
+{
+ u32 *cs;
+
+ cs = intel_ring_begin(rq, 8);
+ if (IS_ERR(cs))
+ return PTR_ERR(cs);
+
+ *cs++ = GSC_HECI_CMD_PKT;
+ *cs++ = lower_32_bits(pkt->addr_in);
+ *cs++ = upper_32_bits(pkt->addr_in);
+ *cs++ = pkt->size_in;
+ *cs++ = lower_32_bits(pkt->addr_out);
+ *cs++ = upper_32_bits(pkt->addr_out);
+ *cs++ = pkt->size_out;
+ *cs++ = 0;
+
+ intel_ring_advance(rq, cs);
+
+ return 0;
+}
+
static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)
{
u32 offset = i915_ggtt_offset(gsc->local);
@@ -49,7 +78,12 @@ static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)
return 0;
}
-static int gsc_fw_load(struct intel_gsc_uc *gsc)
+/*
+ * Our submissions to GSC are going to be either a FW load or an heci pkt, but
+ * all the request emission logic is the same so we can use a common func and
+ * just add the correct cmd
+ */
+static int submit_to_gsc_fw(struct intel_gsc_uc *gsc, struct gsc_heci_pkt *pkt)
{
struct intel_context *ce = gsc->ce;
struct i915_request *rq;
@@ -68,7 +102,11 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
goto out_rq;
}
- err = emit_gsc_fw_load(rq, gsc);
+ if (pkt)
+ err = emit_gsc_heci_pkt(rq, pkt);
+ else
+ err = emit_gsc_fw_load(rq, gsc);
+
if (err)
goto out_rq;
@@ -89,12 +127,30 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
if (err)
drm_err(&gsc_uc_to_gt(gsc)->i915->drm,
- "Request submission for GSC load failed (%d)\n",
+ "Request submission for GSC failed (%d)\n",
err);
return err;
}
+static int gsc_fw_load(struct intel_gsc_uc *gsc)
+{
+ return submit_to_gsc_fw(gsc, NULL);
+}
+
+int intel_gsc_fw_heci_send(struct intel_gsc_uc *gsc, u64 addr_in, u32 size_in,
+ u64 addr_out, u32 size_out)
+{
+ struct gsc_heci_pkt pkt = {
+ .addr_in = addr_in,
+ .size_in = size_in,
+ .addr_out = addr_out,
+ .size_out = size_out
+ };
+
+ return submit_to_gsc_fw(gsc, &pkt);
+}
+
static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
{
struct intel_gt *gt = gsc_uc_to_gt(gsc);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
index 4b5dbb44afb4..4a75c3dec669 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
@@ -12,4 +12,7 @@ struct intel_gsc_uc;
int intel_gsc_uc_fw_upload(struct intel_gsc_uc *gsc);
bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc);
+int intel_gsc_fw_heci_send(struct intel_gsc_uc *gsc, u64 addr_in, u32 size_in,
+ u64 addr_out, u32 size_out);
+
#endif
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
new file mode 100644
index 000000000000..1c2a04d092a8
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef _INTEL_GSC_FWIF_H_
+#define _INTEL_GSC_FWIF_H_
+
+#include <linux/types.h>
+
+struct intel_gsc_mtl_header {
+ u32 validity_marker;
+#define GSC_HECI_VALIDITY_MARKER 0xA578875A
+
+ u8 gsc_address;
+#define HECI_MEADDRESS_PXP 17
+#define HECI_MEADDRESS_HDCP 18
+
+ u8 reserved1;
+
+ u16 header_version;
+#define MTL_GSC_HEADER_VERSION 1
+
+ u64 host_session_handle;
+ u64 gsc_message_handle;
+
+ u32 message_size; /* lower 20 bits only, upper 12 are reserved */
+
+ /*
+ * Flags mask:
+ * Bit 0: Pending
+ * Bit 1: Session Cleanup;
+ * Bits 2-15: Flags
+ * Bits 16-31: Extension Size
+ */
+ u32 flags;
+
+ u32 status;
+} __packed;
+
+#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-20 8:56 ` Jani Nikula
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 3/7] drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w Suraj Kandpal
` (8 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Rodrigo Vivi, Tomas Winkler
From: Anshuman Gupta <anshuman.gupta@intel.com>
Change the include/drm/i915_mei_hdcp_interface.h to
include/drm/i915_cp_fw_hdcp_interface.h
Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Tomas Winkler <tomas.winkler@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/misc/mei/hdcp/mei_hdcp.c | 2 +-
include/drm/i915_mei_hdcp_interface.h | 184 ------------------
3 files changed, 2 insertions(+), 186 deletions(-)
delete mode 100644 include/drm/i915_mei_hdcp_interface.h
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 32e8b2fc3cc6..81d195ef5e57 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -43,7 +43,7 @@
#include <drm/drm_rect.h>
#include <drm/drm_vblank.h>
#include <drm/drm_vblank_work.h>
-#include <drm/i915_mei_hdcp_interface.h>
+#include <drm/i915_hdcp_interface.h>
#include <media/cec-notifier.h>
#include "i915_vma.h"
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index e889a8bd7ac8..cbad27511899 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -23,7 +23,7 @@
#include <linux/component.h>
#include <drm/drm_connector.h>
#include <drm/i915_component.h>
-#include <drm/i915_mei_hdcp_interface.h>
+#include <drm/i915_hdcp_interface.h>
#include "mei_hdcp.h"
diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
deleted file mode 100644
index f441cbcd95a4..000000000000
--- a/include/drm/i915_mei_hdcp_interface.h
+++ /dev/null
@@ -1,184 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+) */
-/*
- * Copyright © 2017-2019 Intel Corporation
- *
- * Authors:
- * Ramalingam C <ramalingam.c@intel.com>
- */
-
-#ifndef _I915_MEI_HDCP_INTERFACE_H_
-#define _I915_MEI_HDCP_INTERFACE_H_
-
-#include <linux/mutex.h>
-#include <linux/device.h>
-#include <drm/display/drm_hdcp.h>
-
-/**
- * enum hdcp_port_type - HDCP port implementation type defined by ME FW
- * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type
- * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
- * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
- * (HDMI 2.0) solution
- * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
- * solution
- */
-enum hdcp_port_type {
- HDCP_PORT_TYPE_INVALID,
- HDCP_PORT_TYPE_INTEGRATED,
- HDCP_PORT_TYPE_LSPCON,
- HDCP_PORT_TYPE_CPDP
-};
-
-/**
- * enum hdcp_wired_protocol - HDCP adaptation used on the port
- * @HDCP_PROTOCOL_INVALID: Invalid HDCP adaptation protocol
- * @HDCP_PROTOCOL_HDMI: HDMI adaptation of HDCP used on the port
- * @HDCP_PROTOCOL_DP: DP adaptation of HDCP used on the port
- */
-enum hdcp_wired_protocol {
- HDCP_PROTOCOL_INVALID,
- HDCP_PROTOCOL_HDMI,
- HDCP_PROTOCOL_DP
-};
-
-enum mei_fw_ddi {
- MEI_DDI_INVALID_PORT = 0x0,
-
- MEI_DDI_B = 1,
- MEI_DDI_C,
- MEI_DDI_D,
- MEI_DDI_E,
- MEI_DDI_F,
- MEI_DDI_A = 7,
- MEI_DDI_RANGE_END = MEI_DDI_A,
-};
-
-/**
- * enum mei_fw_tc - ME Firmware defined index for transcoders
- * @MEI_INVALID_TRANSCODER: Index for Invalid transcoder
- * @MEI_TRANSCODER_EDP: Index for EDP Transcoder
- * @MEI_TRANSCODER_DSI0: Index for DSI0 Transcoder
- * @MEI_TRANSCODER_DSI1: Index for DSI1 Transcoder
- * @MEI_TRANSCODER_A: Index for Transcoder A
- * @MEI_TRANSCODER_B: Index for Transcoder B
- * @MEI_TRANSCODER_C: Index for Transcoder C
- * @MEI_TRANSCODER_D: Index for Transcoder D
- */
-enum mei_fw_tc {
- MEI_INVALID_TRANSCODER = 0x00,
- MEI_TRANSCODER_EDP,
- MEI_TRANSCODER_DSI0,
- MEI_TRANSCODER_DSI1,
- MEI_TRANSCODER_A = 0x10,
- MEI_TRANSCODER_B,
- MEI_TRANSCODER_C,
- MEI_TRANSCODER_D
-};
-
-/**
- * struct hdcp_port_data - intel specific HDCP port data
- * @fw_ddi: ddi index as per ME FW
- * @fw_tc: transcoder index as per ME FW
- * @port_type: HDCP port type as per ME FW classification
- * @protocol: HDCP adaptation as per ME FW
- * @k: No of streams transmitted on a port. Only on DP MST this is != 1
- * @seq_num_m: Count of RepeaterAuth_Stream_Manage msg propagated.
- * Initialized to 0 on AKE_INIT. Incremented after every successful
- * transmission of RepeaterAuth_Stream_Manage message. When it rolls
- * over re-Auth has to be triggered.
- * @streams: struct hdcp2_streamid_type[k]. Defines the type and id for the
- * streams
- */
-struct hdcp_port_data {
- enum mei_fw_ddi fw_ddi;
- enum mei_fw_tc fw_tc;
- u8 port_type;
- u8 protocol;
- u16 k;
- u32 seq_num_m;
- struct hdcp2_streamid_type *streams;
-};
-
-/**
- * struct i915_hdcp_component_ops- ops for HDCP2.2 services.
- * @owner: Module providing the ops
- * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
- * And Prepare AKE_Init.
- * @verify_receiver_cert_prepare_km: Verify the Receiver Certificate
- * AKE_Send_Cert and prepare
- AKE_Stored_Km/AKE_No_Stored_Km
- * @verify_hprime: Verify AKE_Send_H_prime
- * @store_pairing_info: Store pairing info received
- * @initiate_locality_check: Prepare LC_Init
- * @verify_lprime: Verify lprime
- * @get_session_key: Prepare SKE_Send_Eks
- * @repeater_check_flow_prepare_ack: Validate the Downstream topology
- * and prepare rep_ack
- * @verify_mprime: Verify mprime
- * @enable_hdcp_authentication: Mark a port as authenticated.
- * @close_hdcp_session: Close the Wired HDCP Tx session per port.
- * This also disables the authenticated state of the port.
- */
-struct i915_hdcp_component_ops {
- /**
- * @owner: mei_hdcp module
- */
- struct module *owner;
-
- int (*initiate_hdcp2_session)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_ake_init *ake_data);
- int (*verify_receiver_cert_prepare_km)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_ake_send_cert
- *rx_cert,
- bool *km_stored,
- struct hdcp2_ake_no_stored_km
- *ek_pub_km,
- size_t *msg_sz);
- int (*verify_hprime)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_ake_send_hprime *rx_hprime);
- int (*store_pairing_info)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_ake_send_pairing_info
- *pairing_info);
- int (*initiate_locality_check)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_lc_init *lc_init_data);
- int (*verify_lprime)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_lc_send_lprime *rx_lprime);
- int (*get_session_key)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_ske_send_eks *ske_data);
- int (*repeater_check_flow_prepare_ack)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_rep_send_receiverid_list
- *rep_topology,
- struct hdcp2_rep_send_ack
- *rep_send_ack);
- int (*verify_mprime)(struct device *dev,
- struct hdcp_port_data *data,
- struct hdcp2_rep_stream_ready *stream_ready);
- int (*enable_hdcp_authentication)(struct device *dev,
- struct hdcp_port_data *data);
- int (*close_hdcp_session)(struct device *dev,
- struct hdcp_port_data *data);
-};
-
-/**
- * struct i915_hdcp_component_master - Used for communication between i915
- * and mei_hdcp drivers for the HDCP2.2 services
- * @mei_dev: device that provide the HDCP2.2 service from MEI Bus.
- * @hdcp_ops: Ops implemented by mei_hdcp driver, used by i915 driver.
- */
-struct i915_hdcp_comp_master {
- struct device *mei_dev;
- const struct i915_hdcp_component_ops *ops;
-
- /* To protect the above members. */
- struct mutex mutex;
-};
-
-#endif /* _I915_MEI_HDCP_INTERFACE_H_ */
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 3/7] drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 4/7] drm/i915/hdcp: Refactor HDCP API structures Suraj Kandpal
` (7 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Rodrigo Vivi, Tomas Winkler
From: Anshuman Gupta <anshuman.gupta@intel.com>
As now we have more then one type of content protection
secrity firmware. Let change the i915_cp_fw_hdcp_interface.h
header naming convention to suit generic f/w type.
%s/MEI_/HDCP_
%s/mei_dev/hdcp_dev
As interface to CP FW can be either a non i915 component or
i915 intergral component, change structure name Accordingly.
%s/i915_hdcp_comp_master/i915_hdcp_master
%s/i915_hdcp_component_ops/i915_hdcp_ops
--v3
-Changing names to drop cp_fw to make naming more agnostic[Jani]
Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 3 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 79 ++++----
drivers/misc/mei/hdcp/mei_hdcp.c | 56 +++---
include/drm/i915_hdcp_interface.h | 184 ++++++++++++++++++
4 files changed, 254 insertions(+), 68 deletions(-)
create mode 100644 include/drm/i915_hdcp_interface.h
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 57ddce3ba02b..132e9134ba05 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -15,6 +15,7 @@
#include <drm/drm_connector.h>
#include <drm/drm_modeset_lock.h>
+#include <drm/i915_hdcp_interface.h>
#include "intel_cdclk.h"
#include "intel_display.h"
@@ -368,7 +369,7 @@ struct intel_display {
} gmbus;
struct {
- struct i915_hdcp_comp_master *master;
+ struct i915_hdcp_master *master;
bool comp_added;
/* Mutex to protect the above hdcp component related values. */
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 6406fd487ee5..a0f978e56879 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1143,7 +1143,7 @@ hdcp2_prepare_ake_init(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1154,7 +1154,7 @@ hdcp2_prepare_ake_init(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->initiate_hdcp2_session(comp->mei_dev, data, ake_data);
+ ret = comp->ops->initiate_hdcp2_session(comp->hdcp_dev, data, ake_data);
if (ret)
drm_dbg_kms(&dev_priv->drm, "Prepare_ake_init failed. %d\n",
ret);
@@ -1173,7 +1173,7 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1184,7 +1184,7 @@ hdcp2_verify_rx_cert_prepare_km(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->verify_receiver_cert_prepare_km(comp->mei_dev, data,
+ ret = comp->ops->verify_receiver_cert_prepare_km(comp->hdcp_dev, data,
rx_cert, paired,
ek_pub_km, msg_sz);
if (ret < 0)
@@ -1201,7 +1201,7 @@ static int hdcp2_verify_hprime(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1212,7 +1212,7 @@ static int hdcp2_verify_hprime(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->verify_hprime(comp->mei_dev, data, rx_hprime);
+ ret = comp->ops->verify_hprime(comp->hdcp_dev, data, rx_hprime);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Verify hprime failed. %d\n", ret);
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
@@ -1227,7 +1227,7 @@ hdcp2_store_pairing_info(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1238,7 +1238,7 @@ hdcp2_store_pairing_info(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->store_pairing_info(comp->mei_dev, data, pairing_info);
+ ret = comp->ops->store_pairing_info(comp->hdcp_dev, data, pairing_info);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Store pairing info failed. %d\n",
ret);
@@ -1254,7 +1254,7 @@ hdcp2_prepare_lc_init(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1265,7 +1265,7 @@ hdcp2_prepare_lc_init(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->initiate_locality_check(comp->mei_dev, data, lc_init);
+ ret = comp->ops->initiate_locality_check(comp->hdcp_dev, data, lc_init);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Prepare lc_init failed. %d\n",
ret);
@@ -1281,7 +1281,7 @@ hdcp2_verify_lprime(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1292,7 +1292,7 @@ hdcp2_verify_lprime(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->verify_lprime(comp->mei_dev, data, rx_lprime);
+ ret = comp->ops->verify_lprime(comp->hdcp_dev, data, rx_lprime);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Verify L_Prime failed. %d\n",
ret);
@@ -1307,7 +1307,7 @@ static int hdcp2_prepare_skey(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1318,7 +1318,7 @@ static int hdcp2_prepare_skey(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->get_session_key(comp->mei_dev, data, ske_data);
+ ret = comp->ops->get_session_key(comp->hdcp_dev, data, ske_data);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Get session key failed. %d\n",
ret);
@@ -1336,7 +1336,7 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1347,7 +1347,7 @@ hdcp2_verify_rep_topology_prepare_ack(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->repeater_check_flow_prepare_ack(comp->mei_dev, data,
+ ret = comp->ops->repeater_check_flow_prepare_ack(comp->hdcp_dev, data,
rep_topology,
rep_send_ack);
if (ret < 0)
@@ -1365,7 +1365,7 @@ hdcp2_verify_mprime(struct intel_connector *connector,
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1376,7 +1376,7 @@ hdcp2_verify_mprime(struct intel_connector *connector,
return -EINVAL;
}
- ret = comp->ops->verify_mprime(comp->mei_dev, data, stream_ready);
+ ret = comp->ops->verify_mprime(comp->hdcp_dev, data, stream_ready);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Verify mprime failed. %d\n", ret);
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
@@ -1389,7 +1389,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1400,7 +1400,7 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
return -EINVAL;
}
- ret = comp->ops->enable_hdcp_authentication(comp->mei_dev, data);
+ ret = comp->ops->enable_hdcp_authentication(comp->hdcp_dev, data);
if (ret < 0)
drm_dbg_kms(&dev_priv->drm, "Enable hdcp auth failed. %d\n",
ret);
@@ -1409,11 +1409,11 @@ static int hdcp2_authenticate_port(struct intel_connector *connector)
return ret;
}
-static int hdcp2_close_mei_session(struct intel_connector *connector)
+static int hdcp2_close_session(struct intel_connector *connector)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
- struct i915_hdcp_comp_master *comp;
+ struct i915_hdcp_master *comp;
int ret;
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
@@ -1424,7 +1424,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector)
return -EINVAL;
}
- ret = comp->ops->close_hdcp_session(comp->mei_dev,
+ ret = comp->ops->close_hdcp_session(comp->hdcp_dev,
&dig_port->hdcp_port_data);
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
@@ -1433,7 +1433,7 @@ static int hdcp2_close_mei_session(struct intel_connector *connector)
static int hdcp2_deauthenticate_port(struct intel_connector *connector)
{
- return hdcp2_close_mei_session(connector);
+ return hdcp2_close_session(connector);
}
/* Authentication flow starts from here */
@@ -2145,8 +2145,8 @@ static int i915_hdcp_component_bind(struct device *i915_kdev,
drm_dbg(&dev_priv->drm, "I915 HDCP comp bind\n");
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
- dev_priv->display.hdcp.master = (struct i915_hdcp_comp_master *)data;
- dev_priv->display.hdcp.master->mei_dev = mei_kdev;
+ dev_priv->display.hdcp.master = (struct i915_hdcp_master *)data;
+ dev_priv->display.hdcp.master->hdcp_dev = mei_kdev;
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
return 0;
@@ -2168,25 +2168,25 @@ static const struct component_ops i915_hdcp_component_ops = {
.unbind = i915_hdcp_component_unbind,
};
-static enum mei_fw_ddi intel_get_mei_fw_ddi_index(enum port port)
+static enum hdcp_ddi intel_get_hdcp_ddi_index(enum port port)
{
switch (port) {
case PORT_A:
- return MEI_DDI_A;
+ return HDCP_DDI_A;
case PORT_B ... PORT_F:
- return (enum mei_fw_ddi)port;
+ return (enum hdcp_ddi)port;
default:
- return MEI_DDI_INVALID_PORT;
+ return HDCP_DDI_INVALID_PORT;
}
}
-static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
+static enum hdcp_transcoder intel_get_hdcp_transcoder(enum transcoder cpu_transcoder)
{
switch (cpu_transcoder) {
case TRANSCODER_A ... TRANSCODER_D:
- return (enum mei_fw_tc)(cpu_transcoder | 0x10);
+ return (enum hdcp_transcoder)(cpu_transcoder | 0x10);
default: /* eDP, DSI TRANSCODERS are non HDCP capable */
- return MEI_INVALID_TRANSCODER;
+ return HDCP_INVALID_TRANSCODER;
}
}
@@ -2200,20 +2200,20 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
enum port port = dig_port->base.port;
if (DISPLAY_VER(dev_priv) < 12)
- data->fw_ddi = intel_get_mei_fw_ddi_index(port);
+ data->hdcp_ddi = intel_get_hdcp_ddi_index(port);
else
/*
- * As per ME FW API expectation, for GEN 12+, fw_ddi is filled
+ * As per ME FW API expectation, for GEN 12+, hdcp_ddi is filled
* with zero(INVALID PORT index).
*/
- data->fw_ddi = MEI_DDI_INVALID_PORT;
+ data->hdcp_ddi = HDCP_DDI_INVALID_PORT;
/*
- * As associated transcoder is set and modified at modeset, here fw_tc
+ * As associated transcoder is set and modified at modeset, here hdcp_transcoder
* is initialized to zero (invalid transcoder index). This will be
* retained for <Gen12 forever.
*/
- data->fw_tc = MEI_INVALID_TRANSCODER;
+ data->hdcp_transcoder = HDCP_INVALID_TRANSCODER;
data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
data->protocol = (u8)shim->protocol;
@@ -2350,7 +2350,8 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (DISPLAY_VER(dev_priv) >= 12)
- dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+ dig_port->hdcp_port_data.hdcp_transcoder =
+ intel_get_hdcp_transcoder(hdcp->cpu_transcoder);
/*
* Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index cbad27511899..0ff0bd07e385 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -57,8 +57,8 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
session_init_in.port.integrated_port_type = data->port_type;
- session_init_in.port.physical_port = (u8)data->fw_ddi;
- session_init_in.port.attached_transcoder = (u8)data->fw_tc;
+ session_init_in.port.physical_port = (u8)data->hdcp_ddi;
+ session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
session_init_in.protocol = data->protocol;
byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
@@ -127,8 +127,8 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
verify_rxcert_in.port.integrated_port_type = data->port_type;
- verify_rxcert_in.port.physical_port = (u8)data->fw_ddi;
- verify_rxcert_in.port.attached_transcoder = (u8)data->fw_tc;
+ verify_rxcert_in.port.physical_port = (u8)data->hdcp_ddi;
+ verify_rxcert_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
verify_rxcert_in.cert_rx = rx_cert->cert_rx;
memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
@@ -198,8 +198,8 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
send_hprime_in.port.integrated_port_type = data->port_type;
- send_hprime_in.port.physical_port = (u8)data->fw_ddi;
- send_hprime_in.port.attached_transcoder = (u8)data->fw_tc;
+ send_hprime_in.port.physical_port = (u8)data->hdcp_ddi;
+ send_hprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
HDCP_2_2_H_PRIME_LEN);
@@ -256,8 +256,8 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
pairing_info_in.port.integrated_port_type = data->port_type;
- pairing_info_in.port.physical_port = (u8)data->fw_ddi;
- pairing_info_in.port.attached_transcoder = (u8)data->fw_tc;
+ pairing_info_in.port.physical_port = (u8)data->hdcp_ddi;
+ pairing_info_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
HDCP_2_2_E_KH_KM_LEN);
@@ -315,8 +315,8 @@ mei_hdcp_initiate_locality_check(struct device *dev,
lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
lc_init_in.port.integrated_port_type = data->port_type;
- lc_init_in.port.physical_port = (u8)data->fw_ddi;
- lc_init_in.port.attached_transcoder = (u8)data->fw_tc;
+ lc_init_in.port.physical_port = (u8)data->hdcp_ddi;
+ lc_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
if (byte < 0) {
@@ -371,8 +371,8 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
verify_lprime_in.port.integrated_port_type = data->port_type;
- verify_lprime_in.port.physical_port = (u8)data->fw_ddi;
- verify_lprime_in.port.attached_transcoder = (u8)data->fw_tc;
+ verify_lprime_in.port.physical_port = (u8)data->hdcp_ddi;
+ verify_lprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
HDCP_2_2_L_PRIME_LEN);
@@ -429,8 +429,8 @@ static int mei_hdcp_get_session_key(struct device *dev,
get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
get_skey_in.port.integrated_port_type = data->port_type;
- get_skey_in.port.physical_port = (u8)data->fw_ddi;
- get_skey_in.port.attached_transcoder = (u8)data->fw_tc;
+ get_skey_in.port.physical_port = (u8)data->hdcp_ddi;
+ get_skey_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
if (byte < 0) {
@@ -494,8 +494,8 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
verify_repeater_in.port.integrated_port_type = data->port_type;
- verify_repeater_in.port.physical_port = (u8)data->fw_ddi;
- verify_repeater_in.port.attached_transcoder = (u8)data->fw_tc;
+ verify_repeater_in.port.physical_port = (u8)data->hdcp_ddi;
+ verify_repeater_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
HDCP_2_2_RXINFO_LEN);
@@ -572,8 +572,8 @@ static int mei_hdcp_verify_mprime(struct device *dev,
verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header);
verify_mprime_in->port.integrated_port_type = data->port_type;
- verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
- verify_mprime_in->port.attached_transcoder = (u8)data->fw_tc;
+ verify_mprime_in->port.physical_port = (u8)data->hdcp_ddi;
+ verify_mprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN);
drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m);
@@ -634,8 +634,8 @@ static int mei_hdcp_enable_authentication(struct device *dev,
enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
enable_auth_in.port.integrated_port_type = data->port_type;
- enable_auth_in.port.physical_port = (u8)data->fw_ddi;
- enable_auth_in.port.attached_transcoder = (u8)data->fw_tc;
+ enable_auth_in.port.physical_port = (u8)data->hdcp_ddi;
+ enable_auth_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
enable_auth_in.stream_type = data->streams[0].stream_type;
byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
@@ -689,8 +689,8 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
session_close_in.port.integrated_port_type = data->port_type;
- session_close_in.port.physical_port = (u8)data->fw_ddi;
- session_close_in.port.attached_transcoder = (u8)data->fw_tc;
+ session_close_in.port.physical_port = (u8)data->hdcp_ddi;
+ session_close_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
sizeof(session_close_in));
@@ -715,7 +715,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
return 0;
}
-static const struct i915_hdcp_component_ops mei_hdcp_ops = {
+static const struct i915_hdcp_ops mei_hdcp_ops = {
.owner = THIS_MODULE,
.initiate_hdcp2_session = mei_hdcp_initiate_session,
.verify_receiver_cert_prepare_km =
@@ -735,13 +735,13 @@ static const struct i915_hdcp_component_ops mei_hdcp_ops = {
static int mei_component_master_bind(struct device *dev)
{
struct mei_cl_device *cldev = to_mei_cl_device(dev);
- struct i915_hdcp_comp_master *comp_master =
+ struct i915_hdcp_master *comp_master =
mei_cldev_get_drvdata(cldev);
int ret;
dev_dbg(dev, "%s\n", __func__);
comp_master->ops = &mei_hdcp_ops;
- comp_master->mei_dev = dev;
+ comp_master->hdcp_dev = dev;
ret = component_bind_all(dev, comp_master);
if (ret < 0)
return ret;
@@ -752,7 +752,7 @@ static int mei_component_master_bind(struct device *dev)
static void mei_component_master_unbind(struct device *dev)
{
struct mei_cl_device *cldev = to_mei_cl_device(dev);
- struct i915_hdcp_comp_master *comp_master =
+ struct i915_hdcp_master *comp_master =
mei_cldev_get_drvdata(cldev);
dev_dbg(dev, "%s\n", __func__);
@@ -801,7 +801,7 @@ static int mei_hdcp_component_match(struct device *dev, int subcomponent,
static int mei_hdcp_probe(struct mei_cl_device *cldev,
const struct mei_cl_device_id *id)
{
- struct i915_hdcp_comp_master *comp_master;
+ struct i915_hdcp_master *comp_master;
struct component_match *master_match;
int ret;
@@ -846,7 +846,7 @@ static int mei_hdcp_probe(struct mei_cl_device *cldev,
static void mei_hdcp_remove(struct mei_cl_device *cldev)
{
- struct i915_hdcp_comp_master *comp_master =
+ struct i915_hdcp_master *comp_master =
mei_cldev_get_drvdata(cldev);
int ret;
diff --git a/include/drm/i915_hdcp_interface.h b/include/drm/i915_hdcp_interface.h
new file mode 100644
index 000000000000..d24f6726e50c
--- /dev/null
+++ b/include/drm/i915_hdcp_interface.h
@@ -0,0 +1,184 @@
+/* SPDX-License-Identifier: (GPL-2.0+) */
+/*
+ * Copyright © 2017-2019 Intel Corporation
+ *
+ * Authors:
+ * Ramalingam C <ramalingam.c@intel.com>
+ */
+
+#ifndef _I915_HDCP_INTERFACE_H_
+#define _I915_HDCP_INTERFACE_H_
+
+#include <linux/mutex.h>
+#include <linux/device.h>
+#include <drm/display/drm_hdcp.h>
+
+/**
+ * enum hdcp_port_type - HDCP port implementation type defined by ME FW
+ * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type
+ * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
+ * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
+ * (HDMI 2.0) solution
+ * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
+ * solution
+ */
+enum hdcp_port_type {
+ HDCP_PORT_TYPE_INVALID,
+ HDCP_PORT_TYPE_INTEGRATED,
+ HDCP_PORT_TYPE_LSPCON,
+ HDCP_PORT_TYPE_CPDP
+};
+
+/**
+ * enum hdcp_wired_protocol - HDCP adaptation used on the port
+ * @HDCP_PROTOCOL_INVALID: Invalid HDCP adaptation protocol
+ * @HDCP_PROTOCOL_HDMI: HDMI adaptation of HDCP used on the port
+ * @HDCP_PROTOCOL_DP: DP adaptation of HDCP used on the port
+ */
+enum hdcp_wired_protocol {
+ HDCP_PROTOCOL_INVALID,
+ HDCP_PROTOCOL_HDMI,
+ HDCP_PROTOCOL_DP
+};
+
+enum hdcp_ddi {
+ HDCP_DDI_INVALID_PORT = 0x0,
+
+ HDCP_DDI_B = 1,
+ HDCP_DDI_C,
+ HDCP_DDI_D,
+ HDCP_DDI_E,
+ HDCP_DDI_F,
+ HDCP_DDI_A = 7,
+ HDCP_DDI_RANGE_END = HDCP_DDI_A,
+};
+
+/**
+ * enum hdcp_tc - ME Firmware defined index for transcoders
+ * @HDCP_INVALID_TRANSCODER: Index for Invalid transcoder
+ * @HDCP_TRANSCODER_EDP: Index for EDP Transcoder
+ * @HDCP_TRANSCODER_DSI0: Index for DSI0 Transcoder
+ * @HDCP_TRANSCODER_DSI1: Index for DSI1 Transcoder
+ * @HDCP_TRANSCODER_A: Index for Transcoder A
+ * @HDCP_TRANSCODER_B: Index for Transcoder B
+ * @HDCP_TRANSCODER_C: Index for Transcoder C
+ * @HDCP_TRANSCODER_D: Index for Transcoder D
+ */
+enum hdcp_transcoder {
+ HDCP_INVALID_TRANSCODER = 0x00,
+ HDCP_TRANSCODER_EDP,
+ HDCP_TRANSCODER_DSI0,
+ HDCP_TRANSCODER_DSI1,
+ HDCP_TRANSCODER_A = 0x10,
+ HDCP_TRANSCODER_B,
+ HDCP_TRANSCODER_C,
+ HDCP_TRANSCODER_D
+};
+
+/**
+ * struct hdcp_port_data - intel specific HDCP port data
+ * @hdcp_ddi: ddi index as per ME FW
+ * @hdcp_transcoder: transcoder index as per ME FW
+ * @port_type: HDCP port type as per ME FW classification
+ * @protocol: HDCP adaptation as per ME FW
+ * @k: No of streams transmitted on a port. Only on DP MST this is != 1
+ * @seq_num_m: Count of RepeaterAuth_Stream_Manage msg propagated.
+ * Initialized to 0 on AKE_INIT. Incremented after every successful
+ * transmission of RepeaterAuth_Stream_Manage message. When it rolls
+ * over re-Auth has to be triggered.
+ * @streams: struct hdcp2_streamid_type[k]. Defines the type and id for the
+ * streams
+ */
+struct hdcp_port_data {
+ enum hdcp_ddi hdcp_ddi;
+ enum hdcp_transcoder hdcp_transcoder;
+ u8 port_type;
+ u8 protocol;
+ u16 k;
+ u32 seq_num_m;
+ struct hdcp2_streamid_type *streams;
+};
+
+/**
+ * struct i915_hdcp_ops- ops for HDCP2.2 services.
+ * @owner: Module providing the ops
+ * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
+ * And Prepare AKE_Init.
+ * @verify_receiver_cert_prepare_km: Verify the Receiver Certificate
+ * AKE_Send_Cert and prepare
+ AKE_Stored_Km/AKE_No_Stored_Km
+ * @verify_hprime: Verify AKE_Send_H_prime
+ * @store_pairing_info: Store pairing info received
+ * @initiate_locality_check: Prepare LC_Init
+ * @verify_lprime: Verify lprime
+ * @get_session_key: Prepare SKE_Send_Eks
+ * @repeater_check_flow_prepare_ack: Validate the Downstream topology
+ * and prepare rep_ack
+ * @verify_mprime: Verify mprime
+ * @enable_hdcp_authentication: Mark a port as authenticated.
+ * @close_hdcp_session: Close the Wired HDCP Tx session per port.
+ * This also disables the authenticated state of the port.
+ */
+struct i915_hdcp_ops {
+ /**
+ * @owner: hdcp module
+ */
+ struct module *owner;
+
+ int (*initiate_hdcp2_session)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_init *ake_data);
+ int (*verify_receiver_cert_prepare_km)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_send_cert
+ *rx_cert,
+ bool *km_stored,
+ struct hdcp2_ake_no_stored_km
+ *ek_pub_km,
+ size_t *msg_sz);
+ int (*verify_hprime)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_send_hprime *rx_hprime);
+ int (*store_pairing_info)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_send_pairing_info
+ *pairing_info);
+ int (*initiate_locality_check)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_lc_init *lc_init_data);
+ int (*verify_lprime)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_lc_send_lprime *rx_lprime);
+ int (*get_session_key)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ske_send_eks *ske_data);
+ int (*repeater_check_flow_prepare_ack)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_rep_send_receiverid_list
+ *rep_topology,
+ struct hdcp2_rep_send_ack
+ *rep_send_ack);
+ int (*verify_mprime)(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_rep_stream_ready *stream_ready);
+ int (*enable_hdcp_authentication)(struct device *dev,
+ struct hdcp_port_data *data);
+ int (*close_hdcp_session)(struct device *dev,
+ struct hdcp_port_data *data);
+};
+
+/**
+ * struct i915_hdcp_component_master - Used for communication between i915
+ * and hdcp drivers for the HDCP2.2 services
+ * @hdcp_dev: device that provide the HDCP2.2 service from MEI Bus.
+ * @hdcp_ops: Ops implemented by hdcp driver or intel_hdcp_gsc , used by i915 driver.
+ */
+struct i915_hdcp_master {
+ struct device *hdcp_dev;
+ const struct i915_hdcp_ops *ops;
+
+ /* To protect the above members. */
+ struct mutex mutex;
+};
+
+#endif /* _I915_HDCP_INTERFACE_H_ */
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 4/7] drm/i915/hdcp: Refactor HDCP API structures
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (2 preceding siblings ...)
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 3/7] drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 5/7] drm/i915/hdcp: Fill wired_cmd_in structures at a single place Suraj Kandpal
` (6 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Rodrigo Vivi, Tomas Winkler
It requires to move intel specific HDCP API structures to
i915_cp_fw_hdcp_interface.h from driver/misc/mei/hdcp/mei_hdcp.h
so that any content protection fw interfaces can use these
structures.
Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/misc/mei/hdcp/mei_hdcp.c | 44 ++--
drivers/misc/mei/hdcp/mei_hdcp.h | 354 -----------------------------
include/drm/i915_hdcp_interface.h | 355 ++++++++++++++++++++++++++++++
3 files changed, 377 insertions(+), 376 deletions(-)
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index 0ff0bd07e385..d4faecbbbe76 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -52,7 +52,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
session_init_in.header.api_version = HDCP_API_VERSION;
session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION;
- session_init_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ session_init_in.header.status = FW_HDCP_STATUS_SUCCESS;
session_init_in.header.buffer_len =
WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
@@ -75,7 +75,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
return byte;
}
- if (session_init_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (session_init_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
WIRED_INITIATE_HDCP2_SESSION,
session_init_out.header.status);
@@ -122,7 +122,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
verify_rxcert_in.header.api_version = HDCP_API_VERSION;
verify_rxcert_in.header.command_id = WIRED_VERIFY_RECEIVER_CERT;
- verify_rxcert_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ verify_rxcert_in.header.status = FW_HDCP_STATUS_SUCCESS;
verify_rxcert_in.header.buffer_len =
WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
@@ -148,7 +148,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
return byte;
}
- if (verify_rxcert_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (verify_rxcert_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
WIRED_VERIFY_RECEIVER_CERT,
verify_rxcert_out.header.status);
@@ -194,7 +194,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
send_hprime_in.header.api_version = HDCP_API_VERSION;
send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME;
- send_hprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ send_hprime_in.header.status = FW_HDCP_STATUS_SUCCESS;
send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
send_hprime_in.port.integrated_port_type = data->port_type;
@@ -218,7 +218,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
return byte;
}
- if (send_hprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (send_hprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X Failed. Status: 0x%X\n",
WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status);
return -EIO;
@@ -251,7 +251,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
pairing_info_in.header.api_version = HDCP_API_VERSION;
pairing_info_in.header.command_id = WIRED_AKE_SEND_PAIRING_INFO;
- pairing_info_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ pairing_info_in.header.status = FW_HDCP_STATUS_SUCCESS;
pairing_info_in.header.buffer_len =
WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
@@ -276,7 +276,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
return byte;
}
- if (pairing_info_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (pairing_info_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. Status: 0x%X\n",
WIRED_AKE_SEND_PAIRING_INFO,
pairing_info_out.header.status);
@@ -311,7 +311,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
lc_init_in.header.api_version = HDCP_API_VERSION;
lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK;
- lc_init_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ lc_init_in.header.status = FW_HDCP_STATUS_SUCCESS;
lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
lc_init_in.port.integrated_port_type = data->port_type;
@@ -330,7 +330,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
return byte;
}
- if (lc_init_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (lc_init_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X Failed. status: 0x%X\n",
WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status);
return -EIO;
@@ -366,7 +366,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
verify_lprime_in.header.api_version = HDCP_API_VERSION;
verify_lprime_in.header.command_id = WIRED_VALIDATE_LOCALITY;
- verify_lprime_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ verify_lprime_in.header.status = FW_HDCP_STATUS_SUCCESS;
verify_lprime_in.header.buffer_len =
WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
@@ -391,7 +391,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
return byte;
}
- if (verify_lprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (verify_lprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
WIRED_VALIDATE_LOCALITY,
verify_lprime_out.header.status);
@@ -425,7 +425,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
get_skey_in.header.api_version = HDCP_API_VERSION;
get_skey_in.header.command_id = WIRED_GET_SESSION_KEY;
- get_skey_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ get_skey_in.header.status = FW_HDCP_STATUS_SUCCESS;
get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
get_skey_in.port.integrated_port_type = data->port_type;
@@ -445,7 +445,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
return byte;
}
- if (get_skey_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (get_skey_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
WIRED_GET_SESSION_KEY, get_skey_out.header.status);
return -EIO;
@@ -489,7 +489,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
verify_repeater_in.header.api_version = HDCP_API_VERSION;
verify_repeater_in.header.command_id = WIRED_VERIFY_REPEATER;
- verify_repeater_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ verify_repeater_in.header.status = FW_HDCP_STATUS_SUCCESS;
verify_repeater_in.header.buffer_len =
WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
@@ -520,7 +520,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
return byte;
}
- if (verify_repeater_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (verify_repeater_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
WIRED_VERIFY_REPEATER,
verify_repeater_out.header.status);
@@ -568,7 +568,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
verify_mprime_in->header.api_version = HDCP_API_VERSION;
verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
- verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
+ verify_mprime_in->header.status = FW_HDCP_STATUS_SUCCESS;
verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header);
verify_mprime_in->port.integrated_port_type = data->port_type;
@@ -597,7 +597,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
return byte;
}
- if (verify_mprime_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (verify_mprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
WIRED_REPEATER_AUTH_STREAM_REQ,
verify_mprime_out.header.status);
@@ -630,7 +630,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
enable_auth_in.header.api_version = HDCP_API_VERSION;
enable_auth_in.header.command_id = WIRED_ENABLE_AUTH;
- enable_auth_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ enable_auth_in.header.status = FW_HDCP_STATUS_SUCCESS;
enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
enable_auth_in.port.integrated_port_type = data->port_type;
@@ -652,7 +652,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
return byte;
}
- if (enable_auth_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (enable_auth_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "ME cmd 0x%08X failed. status: 0x%X\n",
WIRED_ENABLE_AUTH, enable_auth_out.header.status);
return -EIO;
@@ -684,7 +684,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
session_close_in.header.api_version = HDCP_API_VERSION;
session_close_in.header.command_id = WIRED_CLOSE_SESSION;
- session_close_in.header.status = ME_HDCP_STATUS_SUCCESS;
+ session_close_in.header.status = FW_HDCP_STATUS_SUCCESS;
session_close_in.header.buffer_len =
WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
@@ -706,7 +706,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
return byte;
}
- if (session_close_out.header.status != ME_HDCP_STATUS_SUCCESS) {
+ if (session_close_out.header.status != FW_HDCP_STATUS_SUCCESS) {
dev_dbg(dev, "Session Close Failed. status: 0x%X\n",
session_close_out.header.status);
return -EIO;
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index ca09c8f83d6b..0683d83ec17a 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -11,358 +11,4 @@
#include <drm/display/drm_hdcp.h>
-/* me_hdcp_status: Enumeration of all HDCP Status Codes */
-enum me_hdcp_status {
- ME_HDCP_STATUS_SUCCESS = 0x0000,
-
- /* WiDi Generic Status Codes */
- ME_HDCP_STATUS_INTERNAL_ERROR = 0x1000,
- ME_HDCP_STATUS_UNKNOWN_ERROR = 0x1001,
- ME_HDCP_STATUS_INCORRECT_API_VERSION = 0x1002,
- ME_HDCP_STATUS_INVALID_FUNCTION = 0x1003,
- ME_HDCP_STATUS_INVALID_BUFFER_LENGTH = 0x1004,
- ME_HDCP_STATUS_INVALID_PARAMS = 0x1005,
- ME_HDCP_STATUS_AUTHENTICATION_FAILED = 0x1006,
-
- /* WiDi Status Codes */
- ME_HDCP_INVALID_SESSION_STATE = 0x6000,
- ME_HDCP_SRM_FRAGMENT_UNEXPECTED = 0x6001,
- ME_HDCP_SRM_INVALID_LENGTH = 0x6002,
- ME_HDCP_SRM_FRAGMENT_OFFSET_INVALID = 0x6003,
- ME_HDCP_SRM_VERIFICATION_FAILED = 0x6004,
- ME_HDCP_SRM_VERSION_TOO_OLD = 0x6005,
- ME_HDCP_RX_CERT_VERIFICATION_FAILED = 0x6006,
- ME_HDCP_RX_REVOKED = 0x6007,
- ME_HDCP_H_VERIFICATION_FAILED = 0x6008,
- ME_HDCP_REPEATER_CHECK_UNEXPECTED = 0x6009,
- ME_HDCP_TOPOLOGY_MAX_EXCEEDED = 0x600A,
- ME_HDCP_V_VERIFICATION_FAILED = 0x600B,
- ME_HDCP_L_VERIFICATION_FAILED = 0x600C,
- ME_HDCP_STREAM_KEY_ALLOC_FAILED = 0x600D,
- ME_HDCP_BASE_KEY_RESET_FAILED = 0x600E,
- ME_HDCP_NONCE_GENERATION_FAILED = 0x600F,
- ME_HDCP_STATUS_INVALID_E_KEY_STATE = 0x6010,
- ME_HDCP_STATUS_INVALID_CS_ICV = 0x6011,
- ME_HDCP_STATUS_INVALID_KB_KEY_STATE = 0x6012,
- ME_HDCP_STATUS_INVALID_PAVP_MODE_ICV = 0x6013,
- ME_HDCP_STATUS_INVALID_PAVP_MODE = 0x6014,
- ME_HDCP_STATUS_LC_MAX_ATTEMPTS = 0x6015,
-
- /* New status for HDCP 2.1 */
- ME_HDCP_STATUS_MISMATCH_IN_M = 0x6016,
-
- /* New status code for HDCP 2.2 Rx */
- ME_HDCP_STATUS_RX_PROV_NOT_ALLOWED = 0x6017,
- ME_HDCP_STATUS_RX_PROV_WRONG_SUBJECT = 0x6018,
- ME_HDCP_RX_NEEDS_PROVISIONING = 0x6019,
- ME_HDCP_BKSV_ICV_AUTH_FAILED = 0x6020,
- ME_HDCP_STATUS_INVALID_STREAM_ID = 0x6021,
- ME_HDCP_STATUS_CHAIN_NOT_INITIALIZED = 0x6022,
- ME_HDCP_FAIL_NOT_EXPECTED = 0x6023,
- ME_HDCP_FAIL_HDCP_OFF = 0x6024,
- ME_HDCP_FAIL_INVALID_PAVP_MEMORY_MODE = 0x6025,
- ME_HDCP_FAIL_AES_ECB_FAILURE = 0x6026,
- ME_HDCP_FEATURE_NOT_SUPPORTED = 0x6027,
- ME_HDCP_DMA_READ_ERROR = 0x6028,
- ME_HDCP_DMA_WRITE_ERROR = 0x6029,
- ME_HDCP_FAIL_INVALID_PACKET_SIZE = 0x6030,
- ME_HDCP_H264_PARSING_ERROR = 0x6031,
- ME_HDCP_HDCP2_ERRATA_VIDEO_VIOLATION = 0x6032,
- ME_HDCP_HDCP2_ERRATA_AUDIO_VIOLATION = 0x6033,
- ME_HDCP_TX_ACTIVE_ERROR = 0x6034,
- ME_HDCP_MODE_CHANGE_ERROR = 0x6035,
- ME_HDCP_STREAM_TYPE_ERROR = 0x6036,
- ME_HDCP_STREAM_MANAGE_NOT_POSSIBLE = 0x6037,
-
- ME_HDCP_STATUS_PORT_INVALID_COMMAND = 0x6038,
- ME_HDCP_STATUS_UNSUPPORTED_PROTOCOL = 0x6039,
- ME_HDCP_STATUS_INVALID_PORT_INDEX = 0x603a,
- ME_HDCP_STATUS_TX_AUTH_NEEDED = 0x603b,
- ME_HDCP_STATUS_NOT_INTEGRATED_PORT = 0x603c,
- ME_HDCP_STATUS_SESSION_MAX_REACHED = 0x603d,
-
- /* hdcp capable bit is not set in rx_caps(error is unique to DP) */
- ME_HDCP_STATUS_NOT_HDCP_CAPABLE = 0x6041,
-
- ME_HDCP_STATUS_INVALID_STREAM_COUNT = 0x6042,
-};
-
-#define HDCP_API_VERSION 0x00010000
-
-#define HDCP_M_LEN 16
-#define HDCP_KH_LEN 16
-
-/* Payload Buffer size(Excluding Header) for CMDs and corresponding response */
-/* Wired_Tx_AKE */
-#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN (4 + 1)
-#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_OUT (4 + 8 + 3)
-
-#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN (4 + 522 + 8 + 3)
-#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MIN_OUT (4 + 1 + 3 + 16 + 16)
-#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MAX_OUT (4 + 1 + 3 + 128)
-
-#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN (4 + 32)
-#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_OUT (4)
-
-#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN (4 + 16)
-#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_OUT (4)
-
-#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN (4)
-#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_OUT (4)
-
-/* Wired_Tx_LC */
-#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN (4)
-#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_OUT (4 + 8)
-
-#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN (4 + 32)
-#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_OUT (4)
-
-/* Wired_Tx_SKE */
-#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN (4)
-#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_OUT (4 + 16 + 8)
-
-/* Wired_Tx_SKE */
-#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN (4 + 1)
-#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_OUT (4)
-
-/* Wired_Tx_Repeater */
-#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN (4 + 2 + 3 + 16 + 155)
-#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_OUT (4 + 1 + 16)
-
-#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN (4 + 3 + \
- 32 + 2 + 2)
-
-#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_OUT (4)
-
-/* hdcp_command_id: Enumeration of all WIRED HDCP Command IDs */
-enum hdcp_command_id {
- _WIDI_COMMAND_BASE = 0x00030000,
- WIDI_INITIATE_HDCP2_SESSION = _WIDI_COMMAND_BASE,
- HDCP_GET_SRM_STATUS,
- HDCP_SEND_SRM_FRAGMENT,
-
- /* The wired HDCP Tx commands */
- _WIRED_COMMAND_BASE = 0x00031000,
- WIRED_INITIATE_HDCP2_SESSION = _WIRED_COMMAND_BASE,
- WIRED_VERIFY_RECEIVER_CERT,
- WIRED_AKE_SEND_HPRIME,
- WIRED_AKE_SEND_PAIRING_INFO,
- WIRED_INIT_LOCALITY_CHECK,
- WIRED_VALIDATE_LOCALITY,
- WIRED_GET_SESSION_KEY,
- WIRED_ENABLE_AUTH,
- WIRED_VERIFY_REPEATER,
- WIRED_REPEATER_AUTH_STREAM_REQ,
- WIRED_CLOSE_SESSION,
-
- _WIRED_COMMANDS_COUNT,
-};
-
-union encrypted_buff {
- u8 e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN];
- u8 e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN];
- struct {
- u8 e_kh_km[HDCP_KH_LEN];
- u8 m[HDCP_M_LEN];
- } __packed;
-};
-
-/* HDCP HECI message header. All header values are little endian. */
-struct hdcp_cmd_header {
- u32 api_version;
- u32 command_id;
- enum me_hdcp_status status;
- /* Length of the HECI message (excluding the header) */
- u32 buffer_len;
-} __packed;
-
-/* Empty command request or response. No data follows the header. */
-struct hdcp_cmd_no_data {
- struct hdcp_cmd_header header;
-} __packed;
-
-/* Uniquely identifies the hdcp port being addressed for a given command. */
-struct hdcp_port_id {
- u8 integrated_port_type;
- /* physical_port is used until Gen11.5. Must be zero for Gen11.5+ */
- u8 physical_port;
- /* attached_transcoder is for Gen11.5+. Set to zero for <Gen11.5 */
- u8 attached_transcoder;
- u8 reserved;
-} __packed;
-
-/*
- * Data structures for integrated wired HDCP2 Tx in
- * support of the AKE protocol
- */
-/* HECI struct for integrated wired HDCP Tx session initiation. */
-struct wired_cmd_initiate_hdcp2_session_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 protocol; /* for HDMI vs DP */
-} __packed;
-
-struct wired_cmd_initiate_hdcp2_session_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 r_tx[HDCP_2_2_RTX_LEN];
- struct hdcp2_tx_caps tx_caps;
-} __packed;
-
-/* HECI struct for ending an integrated wired HDCP Tx session. */
-struct wired_cmd_close_session_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-struct wired_cmd_close_session_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-/* HECI struct for integrated wired HDCP Tx Rx Cert verification. */
-struct wired_cmd_verify_receiver_cert_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- struct hdcp2_cert_rx cert_rx;
- u8 r_rx[HDCP_2_2_RRX_LEN];
- u8 rx_caps[HDCP_2_2_RXCAPS_LEN];
-} __packed;
-
-struct wired_cmd_verify_receiver_cert_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 km_stored;
- u8 reserved[3];
- union encrypted_buff ekm_buff;
-} __packed;
-
-/* HECI struct for verification of Rx's Hprime in a HDCP Tx session */
-struct wired_cmd_ake_send_hprime_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 h_prime[HDCP_2_2_H_PRIME_LEN];
-} __packed;
-
-struct wired_cmd_ake_send_hprime_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-/*
- * HECI struct for sending in AKE pairing data generated by the Rx in an
- * integrated wired HDCP Tx session.
- */
-struct wired_cmd_ake_send_pairing_info_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 e_kh_km[HDCP_2_2_E_KH_KM_LEN];
-} __packed;
-
-struct wired_cmd_ake_send_pairing_info_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-/* Data structures for integrated wired HDCP2 Tx in support of the LC protocol*/
-/*
- * HECI struct for initiating locality check with an
- * integrated wired HDCP Tx session.
- */
-struct wired_cmd_init_locality_check_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-struct wired_cmd_init_locality_check_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 r_n[HDCP_2_2_RN_LEN];
-} __packed;
-
-/*
- * HECI struct for validating an Rx's LPrime value in an
- * integrated wired HDCP Tx session.
- */
-struct wired_cmd_validate_locality_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 l_prime[HDCP_2_2_L_PRIME_LEN];
-} __packed;
-
-struct wired_cmd_validate_locality_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-/*
- * Data structures for integrated wired HDCP2 Tx in support of the
- * SKE protocol
- */
-/* HECI struct for creating session key */
-struct wired_cmd_get_session_key_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-struct wired_cmd_get_session_key_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN];
- u8 r_iv[HDCP_2_2_RIV_LEN];
-} __packed;
-
-/* HECI struct for the Tx enable authentication command */
-struct wired_cmd_enable_auth_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 stream_type;
-} __packed;
-
-struct wired_cmd_enable_auth_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
-
-/*
- * Data structures for integrated wired HDCP2 Tx in support of
- * the repeater protocols
- */
-/*
- * HECI struct for verifying the downstream repeater's HDCP topology in an
- * integrated wired HDCP Tx session.
- */
-struct wired_cmd_verify_repeater_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 rx_info[HDCP_2_2_RXINFO_LEN];
- u8 seq_num_v[HDCP_2_2_SEQ_NUM_LEN];
- u8 v_prime[HDCP_2_2_V_PRIME_HALF_LEN];
- u8 receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN];
-} __packed;
-
-struct wired_cmd_verify_repeater_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 content_type_supported;
- u8 v[HDCP_2_2_V_PRIME_HALF_LEN];
-} __packed;
-
-/*
- * HECI struct in support of stream management in an
- * integrated wired HDCP Tx session.
- */
-struct wired_cmd_repeater_auth_stream_req_in {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
- u8 seq_num_m[HDCP_2_2_SEQ_NUM_LEN];
- u8 m_prime[HDCP_2_2_MPRIME_LEN];
- __be16 k;
- struct hdcp2_streamid_type streams[];
-} __packed;
-
-struct wired_cmd_repeater_auth_stream_req_out {
- struct hdcp_cmd_header header;
- struct hdcp_port_id port;
-} __packed;
#endif /* __MEI_HDCP_H__ */
diff --git a/include/drm/i915_hdcp_interface.h b/include/drm/i915_hdcp_interface.h
index d24f6726e50c..a92925cd1eae 100644
--- a/include/drm/i915_hdcp_interface.h
+++ b/include/drm/i915_hdcp_interface.h
@@ -181,4 +181,359 @@ struct i915_hdcp_master {
struct mutex mutex;
};
+/* fw_hdcp_status: Enumeration of all HDCP Status Codes */
+enum fw_hdcp_status {
+ FW_HDCP_STATUS_SUCCESS = 0x0000,
+
+ /* WiDi Generic Status Codes */
+ FW_HDCP_STATUS_INTERNAL_ERROR = 0x1000,
+ FW_HDCP_STATUS_UNKNOWN_ERROR = 0x1001,
+ FW_HDCP_STATUS_INCORRECT_API_VERSION = 0x1002,
+ FW_HDCP_STATUS_INVALID_FUNCTION = 0x1003,
+ FW_HDCP_STATUS_INVALID_BUFFER_LENGTH = 0x1004,
+ FW_HDCP_STATUS_INVALID_PARAMS = 0x1005,
+ FW_HDCP_STATUS_AUTHENTICATION_FAILED = 0x1006,
+
+ /* WiDi Status Codes */
+ FW_HDCP_INVALID_SESSION_STATE = 0x6000,
+ FW_HDCP_SRM_FRAGMENT_UNEXPECTED = 0x6001,
+ FW_HDCP_SRM_INVALID_LENGTH = 0x6002,
+ FW_HDCP_SRM_FRAGMENT_OFFSET_INVALID = 0x6003,
+ FW_HDCP_SRM_VERIFICATION_FAILED = 0x6004,
+ FW_HDCP_SRM_VERSION_TOO_OLD = 0x6005,
+ FW_HDCP_RX_CERT_VERIFICATION_FAILED = 0x6006,
+ FW_HDCP_RX_REVOKED = 0x6007,
+ FW_HDCP_H_VERIFICATION_FAILED = 0x6008,
+ FW_HDCP_REPEATER_CHECK_UNEXPECTED = 0x6009,
+ FW_HDCP_TOPOLOGY_MAX_EXCEEDED = 0x600A,
+ FW_HDCP_V_VERIFICATION_FAILED = 0x600B,
+ FW_HDCP_L_VERIFICATION_FAILED = 0x600C,
+ FW_HDCP_STREAM_KEY_ALLOC_FAILED = 0x600D,
+ FW_HDCP_BASE_KEY_RESET_FAILED = 0x600E,
+ FW_HDCP_NONCE_GENERATION_FAILED = 0x600F,
+ FW_HDCP_STATUS_INVALID_E_KEY_STATE = 0x6010,
+ FW_HDCP_STATUS_INVALID_CS_ICV = 0x6011,
+ FW_HDCP_STATUS_INVALID_KB_KEY_STATE = 0x6012,
+ FW_HDCP_STATUS_INVALID_PAVP_MODE_ICV = 0x6013,
+ FW_HDCP_STATUS_INVALID_PAVP_MODE = 0x6014,
+ FW_HDCP_STATUS_LC_MAX_ATTEMPTS = 0x6015,
+
+ /* New status for HDCP 2.1 */
+ FW_HDCP_STATUS_MISMATCH_IN_M = 0x6016,
+
+ /* New status code for HDCP 2.2 Rx */
+ FW_HDCP_STATUS_RX_PROV_NOT_ALLOWED = 0x6017,
+ FW_HDCP_STATUS_RX_PROV_WRONG_SUBJECT = 0x6018,
+ FW_HDCP_RX_NEEDS_PROVISIONING = 0x6019,
+ FW_HDCP_BKSV_ICV_AUTH_FAILED = 0x6020,
+ FW_HDCP_STATUS_INVALID_STREAM_ID = 0x6021,
+ FW_HDCP_STATUS_CHAIN_NOT_INITIALIZED = 0x6022,
+ FW_HDCP_FAIL_NOT_EXPECTED = 0x6023,
+ FW_HDCP_FAIL_HDCP_OFF = 0x6024,
+ FW_HDCP_FAIL_INVALID_PAVP_MEMORY_MODE = 0x6025,
+ FW_HDCP_FAIL_AES_ECB_FAILURE = 0x6026,
+ FW_HDCP_FEATURE_NOT_SUPPORTED = 0x6027,
+ FW_HDCP_DMA_READ_ERROR = 0x6028,
+ FW_HDCP_DMA_WRITE_ERROR = 0x6029,
+ FW_HDCP_FAIL_INVALID_PACKET_SIZE = 0x6030,
+ FW_HDCP_H264_PARSING_ERROR = 0x6031,
+ FW_HDCP_HDCP2_ERRATA_VIDEO_VIOLATION = 0x6032,
+ FW_HDCP_HDCP2_ERRATA_AUDIO_VIOLATION = 0x6033,
+ FW_HDCP_TX_ACTIVE_ERROR = 0x6034,
+ FW_HDCP_MODE_CHANGE_ERROR = 0x6035,
+ FW_HDCP_STREAM_TYPE_ERROR = 0x6036,
+ FW_HDCP_STREAM_MANAGE_NOT_POSSIBLE = 0x6037,
+
+ FW_HDCP_STATUS_PORT_INVALID_COMMAND = 0x6038,
+ FW_HDCP_STATUS_UNSUPPORTED_PROTOCOL = 0x6039,
+ FW_HDCP_STATUS_INVALID_PORT_INDEX = 0x603a,
+ FW_HDCP_STATUS_TX_AUTH_NEEDED = 0x603b,
+ FW_HDCP_STATUS_NOT_INTEGRATED_PORT = 0x603c,
+ FW_HDCP_STATUS_SESSION_MAX_REACHED = 0x603d,
+
+ /* hdcp capable bit is not set in rx_caps(error is unique to DP) */
+ FW_HDCP_STATUS_NOT_HDCP_CAPABLE = 0x6041,
+
+ FW_HDCP_STATUS_INVALID_STREAM_COUNT = 0x6042,
+};
+
+#define HDCP_API_VERSION 0x00010000
+
+#define HDCP_M_LEN 16
+#define HDCP_KH_LEN 16
+
+/* Payload Buffer size(Excluding Header) for CMDs and corresponding response */
+/* Wired_Tx_AKE */
+#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN (4 + 1)
+#define WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_OUT (4 + 8 + 3)
+
+#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN (4 + 522 + 8 + 3)
+#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MIN_OUT (4 + 1 + 3 + 16 + 16)
+#define WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_MAX_OUT (4 + 1 + 3 + 128)
+
+#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN (4 + 32)
+#define WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_OUT (4)
+
+#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN (4 + 16)
+#define WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_OUT (4)
+
+#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN (4)
+#define WIRED_CMD_BUF_LEN_CLOSE_SESSION_OUT (4)
+
+/* Wired_Tx_LC */
+#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN (4)
+#define WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_OUT (4 + 8)
+
+#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN (4 + 32)
+#define WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_OUT (4)
+
+/* Wired_Tx_SKE */
+#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN (4)
+#define WIRED_CMD_BUF_LEN_GET_SESSION_KEY_OUT (4 + 16 + 8)
+
+/* Wired_Tx_SKE */
+#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN (4 + 1)
+#define WIRED_CMD_BUF_LEN_ENABLE_AUTH_OUT (4)
+
+/* Wired_Tx_Repeater */
+#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN (4 + 2 + 3 + 16 + 155)
+#define WIRED_CMD_BUF_LEN_VERIFY_REPEATER_OUT (4 + 1 + 16)
+
+#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN (4 + 3 + \
+ 32 + 2 + 2)
+
+#define WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_OUT (4)
+
+/* hdcp_command_id: Enumeration of all WIRED HDCP Command IDs */
+enum hdcp_command_id {
+ _WIDI_COMMAND_BASE = 0x00030000,
+ WIDI_INITIATE_HDCP2_SESSION = _WIDI_COMMAND_BASE,
+ HDCP_GET_SRM_STATUS,
+ HDCP_SEND_SRM_FRAGMENT,
+
+ /* The wired HDCP Tx commands */
+ _WIRED_COMMAND_BASE = 0x00031000,
+ WIRED_INITIATE_HDCP2_SESSION = _WIRED_COMMAND_BASE,
+ WIRED_VERIFY_RECEIVER_CERT,
+ WIRED_AKE_SEND_HPRIME,
+ WIRED_AKE_SEND_PAIRING_INFO,
+ WIRED_INIT_LOCALITY_CHECK,
+ WIRED_VALIDATE_LOCALITY,
+ WIRED_GET_SESSION_KEY,
+ WIRED_ENABLE_AUTH,
+ WIRED_VERIFY_REPEATER,
+ WIRED_REPEATER_AUTH_STREAM_REQ,
+ WIRED_CLOSE_SESSION,
+
+ _WIRED_COMMANDS_COUNT,
+};
+
+union encrypted_buff {
+ u8 e_kpub_km[HDCP_2_2_E_KPUB_KM_LEN];
+ u8 e_kh_km_m[HDCP_2_2_E_KH_KM_M_LEN];
+ struct {
+ u8 e_kh_km[HDCP_KH_LEN];
+ u8 m[HDCP_M_LEN];
+ } __packed;
+};
+
+/* HDCP HECI message header. All header values are little endian. */
+struct hdcp_cmd_header {
+ u32 api_version;
+ u32 command_id;
+ enum fw_hdcp_status status;
+ /* Length of the HECI message (excluding the header) */
+ u32 buffer_len;
+} __packed;
+
+/* Empty command request or response. No data follows the header. */
+struct hdcp_cmd_no_data {
+ struct hdcp_cmd_header header;
+} __packed;
+
+/* Uniquely identifies the hdcp port being addressed for a given command. */
+struct hdcp_port_id {
+ u8 integrated_port_type;
+ /* physical_port is used until Gen11.5. Must be zero for Gen11.5+ */
+ u8 physical_port;
+ /* attached_transcoder is for Gen11.5+. Set to zero for <Gen11.5 */
+ u8 attached_transcoder;
+ u8 reserved;
+} __packed;
+
+/*
+ * Data structures for integrated wired HDCP2 Tx in
+ * support of the AKE protocol
+ */
+/* HECI struct for integrated wired HDCP Tx session initiation. */
+struct wired_cmd_initiate_hdcp2_session_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 protocol; /* for HDMI vs DP */
+} __packed;
+
+struct wired_cmd_initiate_hdcp2_session_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 r_tx[HDCP_2_2_RTX_LEN];
+ struct hdcp2_tx_caps tx_caps;
+} __packed;
+
+/* HECI struct for ending an integrated wired HDCP Tx session. */
+struct wired_cmd_close_session_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+struct wired_cmd_close_session_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+/* HECI struct for integrated wired HDCP Tx Rx Cert verification. */
+struct wired_cmd_verify_receiver_cert_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ struct hdcp2_cert_rx cert_rx;
+ u8 r_rx[HDCP_2_2_RRX_LEN];
+ u8 rx_caps[HDCP_2_2_RXCAPS_LEN];
+} __packed;
+
+struct wired_cmd_verify_receiver_cert_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 km_stored;
+ u8 reserved[3];
+ union encrypted_buff ekm_buff;
+} __packed;
+
+/* HECI struct for verification of Rx's Hprime in a HDCP Tx session */
+struct wired_cmd_ake_send_hprime_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 h_prime[HDCP_2_2_H_PRIME_LEN];
+} __packed;
+
+struct wired_cmd_ake_send_hprime_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+/*
+ * HECI struct for sending in AKE pairing data generated by the Rx in an
+ * integrated wired HDCP Tx session.
+ */
+struct wired_cmd_ake_send_pairing_info_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 e_kh_km[HDCP_2_2_E_KH_KM_LEN];
+} __packed;
+
+struct wired_cmd_ake_send_pairing_info_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+/* Data structures for integrated wired HDCP2 Tx in support of the LC protocol*/
+/*
+ * HECI struct for initiating locality check with an
+ * integrated wired HDCP Tx session.
+ */
+struct wired_cmd_init_locality_check_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+struct wired_cmd_init_locality_check_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 r_n[HDCP_2_2_RN_LEN];
+} __packed;
+
+/*
+ * HECI struct for validating an Rx's LPrime value in an
+ * integrated wired HDCP Tx session.
+ */
+struct wired_cmd_validate_locality_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 l_prime[HDCP_2_2_L_PRIME_LEN];
+} __packed;
+
+struct wired_cmd_validate_locality_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+/*
+ * Data structures for integrated wired HDCP2 Tx in support of the
+ * SKE protocol
+ */
+/* HECI struct for creating session key */
+struct wired_cmd_get_session_key_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+struct wired_cmd_get_session_key_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 e_dkey_ks[HDCP_2_2_E_DKEY_KS_LEN];
+ u8 r_iv[HDCP_2_2_RIV_LEN];
+} __packed;
+
+/* HECI struct for the Tx enable authentication command */
+struct wired_cmd_enable_auth_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 stream_type;
+} __packed;
+
+struct wired_cmd_enable_auth_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
+/*
+ * Data structures for integrated wired HDCP2 Tx in support of
+ * the repeater protocols
+ */
+/*
+ * HECI struct for verifying the downstream repeater's HDCP topology in an
+ * integrated wired HDCP Tx session.
+ */
+struct wired_cmd_verify_repeater_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 rx_info[HDCP_2_2_RXINFO_LEN];
+ u8 seq_num_v[HDCP_2_2_SEQ_NUM_LEN];
+ u8 v_prime[HDCP_2_2_V_PRIME_HALF_LEN];
+ u8 receiver_ids[HDCP_2_2_RECEIVER_IDS_MAX_LEN];
+} __packed;
+
+struct wired_cmd_verify_repeater_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 content_type_supported;
+ u8 v[HDCP_2_2_V_PRIME_HALF_LEN];
+} __packed;
+
+/*
+ * HECI struct in support of stream management in an
+ * integrated wired HDCP Tx session.
+ */
+struct wired_cmd_repeater_auth_stream_req_in {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+ u8 seq_num_m[HDCP_2_2_SEQ_NUM_LEN];
+ u8 m_prime[HDCP_2_2_MPRIME_LEN];
+ __be16 k;
+ struct hdcp2_streamid_type streams[];
+} __packed;
+
+struct wired_cmd_repeater_auth_stream_req_out {
+ struct hdcp_cmd_header header;
+ struct hdcp_port_id port;
+} __packed;
+
#endif /* _I915_HDCP_INTERFACE_H_ */
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 5/7] drm/i915/hdcp: Fill wired_cmd_in structures at a single place
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (3 preceding siblings ...)
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 4/7] drm/i915/hdcp: Refactor HDCP API structures Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS Suraj Kandpal
` (5 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Need to fill wired cmd in structures at a single place as they remain
same for both gsc and mei.
--v3
-remove inline function from header [Jani]
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_hdcp_interface.c | 216 +++++++++++++++++++++
drivers/misc/mei/hdcp/mei_hdcp.c | 153 ++-------------
include/drm/i915_hdcp_interface.h | 39 ++++
4 files changed, 270 insertions(+), 139 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_hdcp_interface.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index dfa211451a1d..f64a8bc73c89 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -36,6 +36,7 @@ i915-y += i915_driver.o \
i915_drm_client.o \
i915_config.o \
i915_getparam.o \
+ i915_hdcp_interface.o\
i915_ioctl.o \
i915_irq.o \
i915_mitigations.o \
diff --git a/drivers/gpu/drm/i915/i915_hdcp_interface.c b/drivers/gpu/drm/i915/i915_hdcp_interface.c
new file mode 100644
index 000000000000..e6b787c2fa50
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_hdcp_interface.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2022, Intel Corporation.
+ */
+
+#include <drm/i915_hdcp_interface.h>
+
+void
+i915_hdcp_fill_session_in(struct wired_cmd_initiate_hdcp2_session_in *session_init_in,
+ struct hdcp_port_data *data)
+{
+ session_init_in->header.api_version = HDCP_API_VERSION;
+ session_init_in->header.command_id = WIRED_INITIATE_HDCP2_SESSION;
+ session_init_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ session_init_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
+
+ session_init_in->port.integrated_port_type = data->port_type;
+ session_init_in->port.physical_port = (u8)data->hdcp_ddi;
+ session_init_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+ session_init_in->protocol = data->protocol;
+}
+EXPORT_SYMBOL(i915_hdcp_fill_session_in);
+
+void
+i915_hdcp_fill_rxcert_in(struct wired_cmd_verify_receiver_cert_in *verify_rxcert_in,
+ struct hdcp2_ake_send_cert *rx_cert,
+ struct hdcp_port_data *data)
+{
+ verify_rxcert_in->header.api_version = HDCP_API_VERSION;
+ verify_rxcert_in->header.command_id = WIRED_VERIFY_RECEIVER_CERT;
+ verify_rxcert_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ verify_rxcert_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
+
+ verify_rxcert_in->port.integrated_port_type = data->port_type;
+ verify_rxcert_in->port.physical_port = (u8)data->hdcp_ddi;
+ verify_rxcert_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ verify_rxcert_in->cert_rx = rx_cert->cert_rx;
+ memcpy(verify_rxcert_in->r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
+ memcpy(verify_rxcert_in->rx_caps, rx_cert->rx_caps, HDCP_2_2_RXCAPS_LEN);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_rxcert_in);
+
+void
+i915_hdcp_fill_hprime_in(struct wired_cmd_ake_send_hprime_in *send_hprime_in,
+ struct hdcp2_ake_send_hprime *rx_hprime,
+ struct hdcp_port_data *data)
+{
+ send_hprime_in->header.api_version = HDCP_API_VERSION;
+ send_hprime_in->header.command_id = WIRED_AKE_SEND_HPRIME;
+ send_hprime_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ send_hprime_in->header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
+
+ send_hprime_in->port.integrated_port_type = data->port_type;
+ send_hprime_in->port.physical_port = (u8)data->hdcp_ddi;
+ send_hprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ memcpy(send_hprime_in->h_prime, rx_hprime->h_prime,
+ HDCP_2_2_H_PRIME_LEN);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_hprime_in);
+
+void
+i915_hdcp_fill_pairing_info_in(struct wired_cmd_ake_send_pairing_info_in *pairing_info_in,
+ struct hdcp2_ake_send_pairing_info *pairing_info,
+ struct hdcp_port_data *data)
+{
+ pairing_info_in->header.api_version = HDCP_API_VERSION;
+ pairing_info_in->header.command_id = WIRED_AKE_SEND_PAIRING_INFO;
+ pairing_info_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ pairing_info_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
+
+ pairing_info_in->port.integrated_port_type = data->port_type;
+ pairing_info_in->port.physical_port = (u8)data->hdcp_ddi;
+ pairing_info_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ memcpy(pairing_info_in->e_kh_km, pairing_info->e_kh_km,
+ HDCP_2_2_E_KH_KM_LEN);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_pairing_info_in);
+
+void
+i915_hdcp_fill_locality_check_in(struct wired_cmd_init_locality_check_in *lc_init_in,
+ struct hdcp_port_data *data)
+{
+ lc_init_in->header.api_version = HDCP_API_VERSION;
+ lc_init_in->header.command_id = WIRED_INIT_LOCALITY_CHECK;
+ lc_init_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ lc_init_in->header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
+
+ lc_init_in->port.integrated_port_type = data->port_type;
+ lc_init_in->port.physical_port = (u8)data->hdcp_ddi;
+ lc_init_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+}
+EXPORT_SYMBOL(i915_hdcp_fill_locality_check_in);
+
+void
+i915_hdcp_fill_validate_locality_in(struct wired_cmd_validate_locality_in *verify_lprime_in,
+ struct hdcp2_lc_send_lprime *rx_lprime,
+ struct hdcp_port_data *data)
+{
+ verify_lprime_in->header.api_version = HDCP_API_VERSION;
+ verify_lprime_in->header.command_id = WIRED_VALIDATE_LOCALITY;
+ verify_lprime_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ verify_lprime_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
+
+ verify_lprime_in->port.integrated_port_type = data->port_type;
+ verify_lprime_in->port.physical_port = (u8)data->hdcp_ddi;
+ verify_lprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ memcpy(verify_lprime_in->l_prime, rx_lprime->l_prime,
+ HDCP_2_2_L_PRIME_LEN);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_validate_locality_in);
+
+void
+i915_hdcp_fill_session_key_in(struct wired_cmd_get_session_key_in *get_skey_in,
+ struct hdcp_port_data *data)
+{
+ get_skey_in->header.api_version = HDCP_API_VERSION;
+ get_skey_in->header.command_id = WIRED_GET_SESSION_KEY;
+ get_skey_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ get_skey_in->header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
+
+ get_skey_in->port.integrated_port_type = data->port_type;
+ get_skey_in->port.physical_port = (u8)data->hdcp_ddi;
+ get_skey_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+}
+EXPORT_SYMBOL(i915_hdcp_fill_session_key_in);
+
+void
+i915_hdcp_fill_repeater_in(struct wired_cmd_verify_repeater_in *verify_repeater_in,
+ struct hdcp2_rep_send_receiverid_list *rep_topology,
+ struct hdcp_port_data *data)
+{
+ verify_repeater_in->header.api_version = HDCP_API_VERSION;
+ verify_repeater_in->header.command_id = WIRED_VERIFY_REPEATER;
+ verify_repeater_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ verify_repeater_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
+
+ verify_repeater_in->port.integrated_port_type = data->port_type;
+ verify_repeater_in->port.physical_port = (u8)data->hdcp_ddi;
+ verify_repeater_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ memcpy(verify_repeater_in->rx_info, rep_topology->rx_info,
+ HDCP_2_2_RXINFO_LEN);
+ memcpy(verify_repeater_in->seq_num_v, rep_topology->seq_num_v,
+ HDCP_2_2_SEQ_NUM_LEN);
+ memcpy(verify_repeater_in->v_prime, rep_topology->v_prime,
+ HDCP_2_2_V_PRIME_HALF_LEN);
+ memcpy(verify_repeater_in->receiver_ids, rep_topology->receiver_ids,
+ HDCP_2_2_RECEIVER_IDS_MAX_LEN);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_repeater_in);
+
+void
+i915_hdcp_fill_auth_stream_req_in(struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in,
+ struct hdcp2_rep_stream_ready *stream_ready, ssize_t cmd_size,
+ struct hdcp_port_data *data)
+{
+ verify_mprime_in->header.api_version = HDCP_API_VERSION;
+ verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
+ verify_mprime_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header);
+
+ verify_mprime_in->port.integrated_port_type = data->port_type;
+ verify_mprime_in->port.physical_port = (u8)data->hdcp_ddi;
+ verify_mprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+
+ memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN);
+ drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m);
+
+ memcpy(verify_mprime_in->streams, data->streams,
+ array_size(data->k, sizeof(*data->streams)));
+
+ verify_mprime_in->k = cpu_to_be16(data->k);
+}
+EXPORT_SYMBOL(i915_hdcp_fill_auth_stream_req_in);
+
+void
+i915_hdcp_fill_enable_auth_in(struct wired_cmd_enable_auth_in *enable_auth_in,
+ struct hdcp_port_data *data)
+{
+ enable_auth_in->header.api_version = HDCP_API_VERSION;
+ enable_auth_in->header.command_id = WIRED_ENABLE_AUTH;
+ enable_auth_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ enable_auth_in->header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
+
+ enable_auth_in->port.integrated_port_type = data->port_type;
+ enable_auth_in->port.physical_port = (u8)data->hdcp_ddi;
+ enable_auth_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+ enable_auth_in->stream_type = data->streams[0].stream_type;
+}
+EXPORT_SYMBOL(i915_hdcp_fill_enable_auth_in);
+
+void
+i915_hdcp_fill_close_session_in(struct wired_cmd_close_session_in *session_close_in,
+ struct hdcp_port_data *data)
+{
+ session_close_in->header.api_version = HDCP_API_VERSION;
+ session_close_in->header.command_id = WIRED_CLOSE_SESSION;
+ session_close_in->header.status = FW_HDCP_STATUS_SUCCESS;
+ session_close_in->header.buffer_len =
+ WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
+
+ session_close_in->port.integrated_port_type = data->port_type;
+ session_close_in->port.physical_port = (u8)data->hdcp_ddi;
+ session_close_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
+}
+EXPORT_SYMBOL(i915_hdcp_fill_close_session_in);
+
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index d4faecbbbe76..2cf42e98dfae 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -50,17 +50,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
cldev = to_mei_cl_device(dev);
- session_init_in.header.api_version = HDCP_API_VERSION;
- session_init_in.header.command_id = WIRED_INITIATE_HDCP2_SESSION;
- session_init_in.header.status = FW_HDCP_STATUS_SUCCESS;
- session_init_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_INITIATE_HDCP2_SESSION_IN;
-
- session_init_in.port.integrated_port_type = data->port_type;
- session_init_in.port.physical_port = (u8)data->hdcp_ddi;
- session_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
- session_init_in.protocol = data->protocol;
-
+ i915_hdcp_fill_session_in(&session_init_in, data);
byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
sizeof(session_init_in));
if (byte < 0) {
@@ -119,21 +109,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
return -EINVAL;
cldev = to_mei_cl_device(dev);
-
- verify_rxcert_in.header.api_version = HDCP_API_VERSION;
- verify_rxcert_in.header.command_id = WIRED_VERIFY_RECEIVER_CERT;
- verify_rxcert_in.header.status = FW_HDCP_STATUS_SUCCESS;
- verify_rxcert_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_VERIFY_RECEIVER_CERT_IN;
-
- verify_rxcert_in.port.integrated_port_type = data->port_type;
- verify_rxcert_in.port.physical_port = (u8)data->hdcp_ddi;
- verify_rxcert_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- verify_rxcert_in.cert_rx = rx_cert->cert_rx;
- memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
- memcpy(verify_rxcert_in.rx_caps, rx_cert->rx_caps, HDCP_2_2_RXCAPS_LEN);
-
+ i915_hdcp_fill_rxcert_in(&verify_rxcert_in, rx_cert, data);
byte = mei_cldev_send(cldev, (u8 *)&verify_rxcert_in,
sizeof(verify_rxcert_in));
if (byte < 0) {
@@ -192,18 +168,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
cldev = to_mei_cl_device(dev);
- send_hprime_in.header.api_version = HDCP_API_VERSION;
- send_hprime_in.header.command_id = WIRED_AKE_SEND_HPRIME;
- send_hprime_in.header.status = FW_HDCP_STATUS_SUCCESS;
- send_hprime_in.header.buffer_len = WIRED_CMD_BUF_LEN_AKE_SEND_HPRIME_IN;
-
- send_hprime_in.port.integrated_port_type = data->port_type;
- send_hprime_in.port.physical_port = (u8)data->hdcp_ddi;
- send_hprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
- HDCP_2_2_H_PRIME_LEN);
-
+ i915_hdcp_fill_hprime_in(&send_hprime_in, rx_hprime, data);
byte = mei_cldev_send(cldev, (u8 *)&send_hprime_in,
sizeof(send_hprime_in));
if (byte < 0) {
@@ -248,20 +213,8 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
return -EINVAL;
cldev = to_mei_cl_device(dev);
-
- pairing_info_in.header.api_version = HDCP_API_VERSION;
- pairing_info_in.header.command_id = WIRED_AKE_SEND_PAIRING_INFO;
- pairing_info_in.header.status = FW_HDCP_STATUS_SUCCESS;
- pairing_info_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_SEND_PAIRING_INFO_IN;
-
- pairing_info_in.port.integrated_port_type = data->port_type;
- pairing_info_in.port.physical_port = (u8)data->hdcp_ddi;
- pairing_info_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
- HDCP_2_2_E_KH_KM_LEN);
-
+ i915_hdcp_fill_pairing_info_in(&pairing_info_in, pairing_info,
+ data);
byte = mei_cldev_send(cldev, (u8 *)&pairing_info_in,
sizeof(pairing_info_in));
if (byte < 0) {
@@ -309,15 +262,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
cldev = to_mei_cl_device(dev);
- lc_init_in.header.api_version = HDCP_API_VERSION;
- lc_init_in.header.command_id = WIRED_INIT_LOCALITY_CHECK;
- lc_init_in.header.status = FW_HDCP_STATUS_SUCCESS;
- lc_init_in.header.buffer_len = WIRED_CMD_BUF_LEN_INIT_LOCALITY_CHECK_IN;
-
- lc_init_in.port.integrated_port_type = data->port_type;
- lc_init_in.port.physical_port = (u8)data->hdcp_ddi;
- lc_init_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
+ i915_hdcp_fill_locality_check_in(&lc_init_in, data);
byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
if (byte < 0) {
dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
@@ -364,19 +309,8 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
cldev = to_mei_cl_device(dev);
- verify_lprime_in.header.api_version = HDCP_API_VERSION;
- verify_lprime_in.header.command_id = WIRED_VALIDATE_LOCALITY;
- verify_lprime_in.header.status = FW_HDCP_STATUS_SUCCESS;
- verify_lprime_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_VALIDATE_LOCALITY_IN;
-
- verify_lprime_in.port.integrated_port_type = data->port_type;
- verify_lprime_in.port.physical_port = (u8)data->hdcp_ddi;
- verify_lprime_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
- HDCP_2_2_L_PRIME_LEN);
-
+ i915_hdcp_fill_validate_locality_in(&verify_lprime_in, rx_lprime,
+ data);
byte = mei_cldev_send(cldev, (u8 *)&verify_lprime_in,
sizeof(verify_lprime_in));
if (byte < 0) {
@@ -423,15 +357,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
cldev = to_mei_cl_device(dev);
- get_skey_in.header.api_version = HDCP_API_VERSION;
- get_skey_in.header.command_id = WIRED_GET_SESSION_KEY;
- get_skey_in.header.status = FW_HDCP_STATUS_SUCCESS;
- get_skey_in.header.buffer_len = WIRED_CMD_BUF_LEN_GET_SESSION_KEY_IN;
-
- get_skey_in.port.integrated_port_type = data->port_type;
- get_skey_in.port.physical_port = (u8)data->hdcp_ddi;
- get_skey_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
+ i915_hdcp_fill_session_key_in(&get_skey_in, data);
byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
if (byte < 0) {
dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
@@ -487,25 +413,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
cldev = to_mei_cl_device(dev);
- verify_repeater_in.header.api_version = HDCP_API_VERSION;
- verify_repeater_in.header.command_id = WIRED_VERIFY_REPEATER;
- verify_repeater_in.header.status = FW_HDCP_STATUS_SUCCESS;
- verify_repeater_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_VERIFY_REPEATER_IN;
-
- verify_repeater_in.port.integrated_port_type = data->port_type;
- verify_repeater_in.port.physical_port = (u8)data->hdcp_ddi;
- verify_repeater_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
- HDCP_2_2_RXINFO_LEN);
- memcpy(verify_repeater_in.seq_num_v, rep_topology->seq_num_v,
- HDCP_2_2_SEQ_NUM_LEN);
- memcpy(verify_repeater_in.v_prime, rep_topology->v_prime,
- HDCP_2_2_V_PRIME_HALF_LEN);
- memcpy(verify_repeater_in.receiver_ids, rep_topology->receiver_ids,
- HDCP_2_2_RECEIVER_IDS_MAX_LEN);
-
+ i915_hdcp_fill_repeater_in(&verify_repeater_in, rep_topology, data);
byte = mei_cldev_send(cldev, (u8 *)&verify_repeater_in,
sizeof(verify_repeater_in));
if (byte < 0) {
@@ -566,23 +474,8 @@ static int mei_hdcp_verify_mprime(struct device *dev,
if (!verify_mprime_in)
return -ENOMEM;
- verify_mprime_in->header.api_version = HDCP_API_VERSION;
- verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
- verify_mprime_in->header.status = FW_HDCP_STATUS_SUCCESS;
- verify_mprime_in->header.buffer_len = cmd_size - sizeof(verify_mprime_in->header);
-
- verify_mprime_in->port.integrated_port_type = data->port_type;
- verify_mprime_in->port.physical_port = (u8)data->hdcp_ddi;
- verify_mprime_in->port.attached_transcoder = (u8)data->hdcp_transcoder;
-
- memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN);
- drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m);
-
- memcpy(verify_mprime_in->streams, data->streams,
- array_size(data->k, sizeof(*data->streams)));
-
- verify_mprime_in->k = cpu_to_be16(data->k);
-
+ i915_hdcp_fill_auth_stream_req_in(verify_mprime_in, stream_ready,
+ cmd_size, data);
byte = mei_cldev_send(cldev, (u8 *)verify_mprime_in, cmd_size);
kfree(verify_mprime_in);
if (byte < 0) {
@@ -628,16 +521,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
cldev = to_mei_cl_device(dev);
- enable_auth_in.header.api_version = HDCP_API_VERSION;
- enable_auth_in.header.command_id = WIRED_ENABLE_AUTH;
- enable_auth_in.header.status = FW_HDCP_STATUS_SUCCESS;
- enable_auth_in.header.buffer_len = WIRED_CMD_BUF_LEN_ENABLE_AUTH_IN;
-
- enable_auth_in.port.integrated_port_type = data->port_type;
- enable_auth_in.port.physical_port = (u8)data->hdcp_ddi;
- enable_auth_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
- enable_auth_in.stream_type = data->streams[0].stream_type;
-
+ i915_hdcp_fill_enable_auth_in(&enable_auth_in, data);
byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
sizeof(enable_auth_in));
if (byte < 0) {
@@ -682,16 +566,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
cldev = to_mei_cl_device(dev);
- session_close_in.header.api_version = HDCP_API_VERSION;
- session_close_in.header.command_id = WIRED_CLOSE_SESSION;
- session_close_in.header.status = FW_HDCP_STATUS_SUCCESS;
- session_close_in.header.buffer_len =
- WIRED_CMD_BUF_LEN_CLOSE_SESSION_IN;
-
- session_close_in.port.integrated_port_type = data->port_type;
- session_close_in.port.physical_port = (u8)data->hdcp_ddi;
- session_close_in.port.attached_transcoder = (u8)data->hdcp_transcoder;
-
+ i915_hdcp_fill_close_session_in(&session_close_in, data);
byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
sizeof(session_close_in));
if (byte < 0) {
diff --git a/include/drm/i915_hdcp_interface.h b/include/drm/i915_hdcp_interface.h
index a92925cd1eae..9952bf78d4f7 100644
--- a/include/drm/i915_hdcp_interface.h
+++ b/include/drm/i915_hdcp_interface.h
@@ -536,4 +536,43 @@ struct wired_cmd_repeater_auth_stream_req_out {
struct hdcp_port_id port;
} __packed;
+void
+i915_hdcp_fill_session_in(struct wired_cmd_initiate_hdcp2_session_in *session_init_in,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_rxcert_in(struct wired_cmd_verify_receiver_cert_in *verify_rxcert_in,
+ struct hdcp2_ake_send_cert *rx_cert,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_hprime_in(struct wired_cmd_ake_send_hprime_in *send_hprime_in,
+ struct hdcp2_ake_send_hprime *rx_hprime,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_pairing_info_in(struct wired_cmd_ake_send_pairing_info_in *pairing_info_in,
+ struct hdcp2_ake_send_pairing_info *pairing_info,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_locality_check_in(struct wired_cmd_init_locality_check_in *lc_init_in,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_validate_locality_in(struct wired_cmd_validate_locality_in *verify_lprime_in,
+ struct hdcp2_lc_send_lprime *rx_lprime,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_session_key_in(struct wired_cmd_get_session_key_in *get_skey_in,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_repeater_in(struct wired_cmd_verify_repeater_in *verify_repeater_in,
+ struct hdcp2_rep_send_receiverid_list *rep_topology,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_auth_stream_req_in(struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in,
+ struct hdcp2_rep_stream_ready *stream_ready, ssize_t cmd_size,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_enable_auth_in(struct wired_cmd_enable_auth_in *enable_auth_in,
+ struct hdcp_port_data *data);
+void
+i915_hdcp_fill_close_session_in(struct wired_cmd_close_session_in *session_close_in,
+ struct hdcp_port_data *data);
#endif /* _I915_HDCP_INTERFACE_H_ */
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (4 preceding siblings ...)
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 5/7] drm/i915/hdcp: Fill wired_cmd_in structures at a single place Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-15 19:34 ` Teres Alexis, Alan Previn
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 7/7] drm/i915/mtl: Add HDCP GSC interface Suraj Kandpal
` (4 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Add function that takes care of sending command to gsc cs. We start
of with allocation of memory for our command intel_hdcp_gsc_message that
contains gsc cs memory header as directed in specs followed by the
actual payload hdcp message that we want to send.
Spec states that we need to poll pending bit of response header around
20 times each try being 50ms apart hence adding that to current
gsc_msg_send function
Also we use the same function to take care of both sending and receiving
hence no separate function to get the response.
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 207 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 18 ++
drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 1 +
4 files changed, 227 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f64a8bc73c89..9cae0c1598a7 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -251,6 +251,7 @@ i915-y += \
display/intel_frontbuffer.o \
display/intel_global_state.o \
display/intel_hdcp.o \
+ display/intel_hdcp_gsc.o \
display/intel_hotplug.o \
display/intel_hti.o \
display/intel_lpe_audio.o \
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
new file mode 100644
index 000000000000..6858b6219221
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2021, Intel Corporation.
+ */
+
+#include "display/intel_hdcp_gsc.h"
+#include "gem/i915_gem_region.h"
+#include "gt/uc/intel_gsc_fw.h"
+#include "gt/uc/intel_gsc_fwif.h"
+#include "i915_drv.h"
+#include "i915_utils.h"
+
+struct intel_hdcp_gsc_message {
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ void *hdcp_cmd;
+};
+
+/*This function helps allocate memory for the command that we will send to gsc cs */
+static int intel_initialize_hdcp_gsc_message(struct drm_i915_private *i915,
+ struct intel_hdcp_gsc_message *hdcp_message)
+{
+ struct intel_gt *gt = i915->media_gt;
+ struct drm_i915_gem_object *obj = NULL;
+ struct i915_vma *vma = NULL;
+ void *cmd;
+ int err;
+
+ hdcp_message->obj = NULL;
+ hdcp_message->hdcp_cmd = NULL;
+ hdcp_message->vma = NULL;
+
+ /* allocate object of one page for HDCP command memory and store it */
+ obj = i915_gem_object_create_shmem(gt->i915, PAGE_SIZE);
+
+ if (IS_ERR(obj)) {
+ drm_err(>->i915->drm, "Failed to allocate HDCP streaming command!\n");
+ return PTR_ERR(obj);
+ }
+
+ cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, true));
+ if (IS_ERR(cmd)) {
+ drm_err(>->i915->drm, "Failed to map gsc message page!\n");
+ err = PTR_ERR(cmd);
+ goto out_unpin;
+ }
+
+ vma = i915_vma_instance(obj, >->ggtt->vm, NULL);
+ if (IS_ERR(vma)) {
+ err = PTR_ERR(vma);
+ goto out_unmap;
+ }
+
+ err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL);
+ if (err)
+ goto out_unmap;
+
+ memset(cmd, 0, obj->base.size);
+
+ hdcp_message->obj = obj;
+ hdcp_message->hdcp_cmd = cmd;
+ hdcp_message->vma = vma;
+
+ return 0;
+
+out_unmap:
+ i915_gem_object_unpin_map(obj);
+out_unpin:
+ i915_gem_object_put(obj);
+ return err;
+}
+
+static void intel_free_hdcp_gsc_message(struct intel_hdcp_gsc_message *hdcp_message)
+{
+ struct drm_i915_gem_object *obj = fetch_and_zero(&hdcp_message->obj);
+
+ if (!obj)
+ return;
+
+ if (hdcp_message->vma)
+ i915_vma_unpin(fetch_and_zero(&hdcp_message->vma));
+
+ i915_gem_object_unpin_map(obj);
+ i915_gem_object_put(obj);
+ kfree(hdcp_message);
+}
+
+static int intel_gsc_send_sync(struct drm_i915_private *i915,
+ struct intel_gsc_mtl_header *header, u64 addr,
+ size_t msg_out_len)
+{
+ struct intel_gt *gt = i915->media_gt;
+ int ret;
+
+ header->flags = 0;
+ ret = intel_gsc_fw_heci_send(>->uc.gsc, addr, header->message_size,
+ addr, msg_out_len + sizeof(*header));
+ if (ret) {
+ drm_err(&i915->drm, "failed to send gsc HDCP msg (%d)\n", ret);
+ return ret;
+ }
+ /*
+ * Checking validity marker for memory sanity
+ */
+ if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) {
+ drm_err(&i915->drm, "invalid validity marker\n");
+ return -EINVAL;
+ }
+
+ if (header->status != 0) {
+ drm_err(&i915->drm, "header status indicates error %d\n",
+ header->status);
+ return -EINVAL;
+ }
+
+ if (header->flags & INTEL_GSC_MSG_PENDING)
+ return -EAGAIN;
+
+ return 0;
+}
+
+/*
+ * This function can now be used for sending requests and will also handle
+ * receipt of reply messages hence no different function of message retrieval
+ * is required. We will initialize intel_hdcp_gsc_message structure then add
+ * gsc cs memory header as stated in specs after which the normal HDCP payload
+ * will follow
+ */
+ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
+ size_t msg_in_len, u8 *msg_out, size_t msg_out_len)
+{
+ struct intel_gt *gt = i915->media_gt;
+ struct intel_gsc_mtl_header *header;
+ const size_t max_msg_size = PAGE_SIZE - sizeof(*header);
+ struct intel_hdcp_gsc_message *hdcp_message;
+ u64 addr;
+ u32 reply_size;
+ int ret, tries = 0;
+
+ if (!intel_uc_uses_gsc_uc(>->uc))
+ return -ENODEV;
+
+ if (msg_in_len > max_msg_size || msg_out_len > max_msg_size)
+ return -ENOSPC;
+
+ hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL);
+
+ if (!hdcp_message)
+ return -ENOMEM;
+
+ ret = intel_initialize_hdcp_gsc_message(i915, hdcp_message);
+
+ if (ret) {
+ drm_err(&i915->drm,
+ "Could not initialize hdcp_message\n");
+ goto err;
+ }
+
+ header = hdcp_message->hdcp_cmd;
+ addr = i915_ggtt_offset(hdcp_message->vma);
+
+ memset(header, 0, sizeof(*header));
+ header->validity_marker = GSC_HECI_VALIDITY_MARKER;
+ header->gsc_address = HECI_MEADDRESS_HDCP;
+ header->host_session_handle = 0;
+ header->header_version = MTL_GSC_HEADER_VERSION;
+ header->message_size = msg_in_len + sizeof(*header);
+
+ memcpy(hdcp_message->hdcp_cmd + sizeof(*header), msg_in, msg_in_len);
+
+ /*
+ * Keep sending request in case the pending bit is set no need to add
+ * message handle as we are using same address hence loc. of header is
+ * same and it will contain the message handle. we will send the message
+ * 20 times each message 50 ms apart
+ */
+ do {
+ ret = intel_gsc_send_sync(i915, header, addr, msg_out_len);
+
+ /* Only try again if gsc says so */
+ if (ret != -EAGAIN)
+ break;
+
+ msleep(50);
+
+ } while (++tries < 20);
+
+ if (ret)
+ goto err;
+
+ /* we use the same mem for the reply, so header is in the same loc */
+ reply_size = header->message_size - sizeof(*header);
+ if (reply_size > msg_out_len) {
+ drm_warn(&i915->drm, "caller with insufficient HDCP reply size %u (%d)\n",
+ reply_size, (u32)msg_out_len);
+ reply_size = msg_out_len;
+ } else if (reply_size != msg_out_len) {
+ drm_dbg_kms(&i915->drm, "caller unexpected HCDP reply size %u (%d)\n",
+ reply_size, (u32)msg_out_len);
+ }
+
+ memcpy(msg_out, hdcp_message->hdcp_cmd + sizeof(*header), msg_out_len);
+
+err:
+ intel_free_hdcp_gsc_message(hdcp_message);
+ return ret;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
new file mode 100644
index 000000000000..8f2563ab958b
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __INTEL_HDCP_GSC_H__
+#define __INTEL_HDCP_GSC_H__
+
+#include <linux/types.h>
+#include <linux/err.h>
+
+struct drm_i915_private;
+
+ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
+ size_t msg_in_len, u8 *msg_out,
+ size_t msg_out_len);
+
+#endif /* __INTEL_HDCP_GCS_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
index 1c2a04d092a8..19b98c75367a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
@@ -34,6 +34,7 @@ struct intel_gsc_mtl_header {
* Bits 16-31: Extension Size
*/
u32 flags;
+#define INTEL_GSC_MSG_PENDING 1
u32 status;
} __packed;
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 7/7] drm/i915/mtl: Add HDCP GSC interface
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (5 preceding siblings ...)
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS Suraj Kandpal
@ 2022-12-14 9:07 ` Suraj Kandpal
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDCP2.x via GSC CS (rev3) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Suraj Kandpal @ 2022-12-14 9:07 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, Rodrigo Vivi, Tomas Winkler
MTL uses GSC command streamer i.e gsc cs to send HDCP/PXP commands
to GSC f/w. It requires to keep hdcp display driver
agnostic to content protection f/w (ME/GSC fw) in the form of
i915_hdcp_fw_ops generic ops.
Adding HDCP GSC CS interface by leveraging the i915_hdcp_fw_ops generic
ops instead of I915_HDCP_COMPONENT as integral part of i915.
Adding checks to see if GSC is loaded and proxy is setup
--v3
-abstract DISPLAY_VER check [Jani]
-bring function declaration and definition in same patch[Jani]
Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 28 +-
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 513 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 5 +-
3 files changed, 537 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index a0f978e56879..0fef4a4356ea 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -25,6 +25,8 @@
#include "intel_hdcp.h"
#include "intel_hdcp_regs.h"
#include "intel_pcode.h"
+#include "intel_connector.h"
+#include "intel_hdcp_gsc.h"
#define KEY_LOAD_TRIES 5
#define HDCP2_LC_RETRY_CNT 3
@@ -203,13 +205,20 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_hdcp *hdcp = &connector->hdcp;
+ struct intel_gt *gt = dev_priv->media_gt;
+ struct intel_gsc_uc *gsc = >->uc.gsc;
bool capable = false;
/* I915 support for HDCP2.2 */
if (!hdcp->hdcp2_supported)
return false;
- /* MEI interface is solid */
+ /* If MTL+ make sure gsc is loaded and proxy is setup */
+ if (DISPLAY_VER(dev_priv) >= 14)
+ if (!intel_uc_fw_is_running(&gsc->fw))
+ return false;
+
+ /* MEI/GSC interface is solid depending on which is used */
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
if (!dev_priv->display.hdcp.comp_added || !dev_priv->display.hdcp.master) {
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
@@ -2235,7 +2244,7 @@ static int initialize_hdcp_port_data(struct intel_connector *connector,
static bool is_hdcp2_supported(struct drm_i915_private *dev_priv)
{
- if (!IS_ENABLED(CONFIG_INTEL_MEI_HDCP))
+ if (intel_hdcp_gsc_cs_required(dev_priv) && !IS_ENABLED(CONFIG_INTEL_MEI_HDCP))
return false;
return (DISPLAY_VER(dev_priv) >= 10 ||
@@ -2256,10 +2265,14 @@ void intel_hdcp_component_init(struct drm_i915_private *dev_priv)
dev_priv->display.hdcp.comp_added = true;
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
- ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_component_ops,
- I915_COMPONENT_HDCP);
+
+ if (intel_hdcp_gsc_cs_required(dev_priv))
+ ret = intel_hdcp_gsc_init(dev_priv);
+ else
+ ret = component_add_typed(dev_priv->drm.dev, &i915_hdcp_component_ops,
+ I915_COMPONENT_HDCP);
if (ret < 0) {
- drm_dbg_kms(&dev_priv->drm, "Failed at component add(%d)\n",
+ drm_dbg_kms(&dev_priv->drm, "Failed at fw component add(%d)\n",
ret);
mutex_lock(&dev_priv->display.hdcp.comp_mutex);
dev_priv->display.hdcp.comp_added = false;
@@ -2486,7 +2499,10 @@ void intel_hdcp_component_fini(struct drm_i915_private *dev_priv)
dev_priv->display.hdcp.comp_added = false;
mutex_unlock(&dev_priv->display.hdcp.comp_mutex);
- component_del(dev_priv->drm.dev, &i915_hdcp_component_ops);
+ if (intel_hdcp_gsc_cs_required(dev_priv))
+ intel_hdcp_gsc_fini(dev_priv);
+ else
+ component_del(dev_priv->drm.dev, &i915_hdcp_component_ops);
}
void intel_hdcp_cleanup(struct intel_connector *connector)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
index 6858b6219221..e756893ecb96 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -1,8 +1,10 @@
// SPDX-License-Identifier: MIT
/*
- * Copyright 2021, Intel Corporation.
+ * Copyright 2022, Intel Corporation.
*/
+#include <drm/i915_hdcp_interface.h>
+
#include "display/intel_hdcp_gsc.h"
#include "gem/i915_gem_region.h"
#include "gt/uc/intel_gsc_fw.h"
@@ -16,6 +18,512 @@ struct intel_hdcp_gsc_message {
void *hdcp_cmd;
};
+bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915)
+{
+ if (DISPLAY_VER(i915) >= 14)
+ return true;
+ return false;
+}
+
+static int
+gsc_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
+ struct hdcp2_ake_init *ake_data)
+{
+ struct wired_cmd_initiate_hdcp2_session_in session_init_in = { { 0 } };
+ struct wired_cmd_initiate_hdcp2_session_out
+ session_init_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !ake_data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_session_in(&session_init_in, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&session_init_in,
+ sizeof(session_init_in),
+ (u8 *)&session_init_out,
+ sizeof(session_init_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (session_init_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n",
+ WIRED_INITIATE_HDCP2_SESSION,
+ session_init_out.header.status);
+ return -EIO;
+ }
+
+ ake_data->msg_id = HDCP_2_2_AKE_INIT;
+ ake_data->tx_caps = session_init_out.tx_caps;
+ memcpy(ake_data->r_tx, session_init_out.r_tx, HDCP_2_2_RTX_LEN);
+
+ return 0;
+}
+
+static int
+gsc_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ake_send_cert *rx_cert,
+ bool *km_stored,
+ struct hdcp2_ake_no_stored_km
+ *ek_pub_km,
+ size_t *msg_sz)
+{
+ struct wired_cmd_verify_receiver_cert_in verify_rxcert_in = { { 0 } };
+ struct wired_cmd_verify_receiver_cert_out verify_rxcert_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !rx_cert || !km_stored || !ek_pub_km || !msg_sz)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_rxcert_in(&verify_rxcert_in, rx_cert, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_rxcert_in,
+ sizeof(verify_rxcert_in),
+ (u8 *)&verify_rxcert_out,
+ sizeof(verify_rxcert_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed: %zd\n", byte);
+ return byte;
+ }
+
+ if (verify_rxcert_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n",
+ WIRED_VERIFY_RECEIVER_CERT,
+ verify_rxcert_out.header.status);
+ return -EIO;
+ }
+
+ *km_stored = !!verify_rxcert_out.km_stored;
+ if (verify_rxcert_out.km_stored) {
+ ek_pub_km->msg_id = HDCP_2_2_AKE_STORED_KM;
+ *msg_sz = sizeof(struct hdcp2_ake_stored_km);
+ } else {
+ ek_pub_km->msg_id = HDCP_2_2_AKE_NO_STORED_KM;
+ *msg_sz = sizeof(struct hdcp2_ake_no_stored_km);
+ }
+
+ memcpy(ek_pub_km->e_kpub_km, &verify_rxcert_out.ekm_buff,
+ sizeof(verify_rxcert_out.ekm_buff));
+
+ return 0;
+}
+
+static int
+gsc_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
+ struct hdcp2_ake_send_hprime *rx_hprime)
+{
+ struct wired_cmd_ake_send_hprime_in send_hprime_in = { { 0 } };
+ struct wired_cmd_ake_send_hprime_out send_hprime_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !rx_hprime)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_hprime_in(&send_hprime_in, rx_hprime, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&send_hprime_in,
+ sizeof(send_hprime_in),
+ (u8 *)&send_hprime_out,
+ sizeof(send_hprime_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (send_hprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. Status: 0x%X\n",
+ WIRED_AKE_SEND_HPRIME, send_hprime_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int
+gsc_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
+ struct hdcp2_ake_send_pairing_info *pairing_info)
+{
+ struct wired_cmd_ake_send_pairing_info_in pairing_info_in = { { 0 } };
+ struct wired_cmd_ake_send_pairing_info_out pairing_info_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !pairing_info)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_pairing_info_in(&pairing_info_in, pairing_info,
+ data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&pairing_info_in,
+ sizeof(pairing_info_in),
+ (u8 *)&pairing_info_out,
+ sizeof(pairing_info_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (pairing_info_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. Status: 0x%X\n",
+ WIRED_AKE_SEND_PAIRING_INFO,
+ pairing_info_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int
+gsc_hdcp_initiate_locality_check(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_lc_init *lc_init_data)
+{
+ struct wired_cmd_init_locality_check_in lc_init_in = { { 0 } };
+ struct wired_cmd_init_locality_check_out lc_init_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !lc_init_data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_locality_check_in(&lc_init_in, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&lc_init_in, sizeof(lc_init_in),
+ (u8 *)&lc_init_out, sizeof(lc_init_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (lc_init_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X Failed. status: 0x%X\n",
+ WIRED_INIT_LOCALITY_CHECK, lc_init_out.header.status);
+ return -EIO;
+ }
+
+ lc_init_data->msg_id = HDCP_2_2_LC_INIT;
+ memcpy(lc_init_data->r_n, lc_init_out.r_n, HDCP_2_2_RN_LEN);
+
+ return 0;
+}
+
+static int
+gsc_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
+ struct hdcp2_lc_send_lprime *rx_lprime)
+{
+ struct wired_cmd_validate_locality_in verify_lprime_in = { { 0 } };
+ struct wired_cmd_validate_locality_out verify_lprime_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !rx_lprime)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_validate_locality_in(&verify_lprime_in, rx_lprime,
+ data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_lprime_in,
+ sizeof(verify_lprime_in),
+ (u8 *)&verify_lprime_out,
+ sizeof(verify_lprime_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (verify_lprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n",
+ WIRED_VALIDATE_LOCALITY,
+ verify_lprime_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int gsc_hdcp_get_session_key(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_ske_send_eks *ske_data)
+{
+ struct wired_cmd_get_session_key_in get_skey_in = { { 0 } };
+ struct wired_cmd_get_session_key_out get_skey_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data || !ske_data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_session_key_in(&get_skey_in, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&get_skey_in, sizeof(get_skey_in),
+ (u8 *)&get_skey_out, sizeof(get_skey_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (get_skey_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n",
+ WIRED_GET_SESSION_KEY, get_skey_out.header.status);
+ return -EIO;
+ }
+
+ ske_data->msg_id = HDCP_2_2_SKE_SEND_EKS;
+ memcpy(ske_data->e_dkey_ks, get_skey_out.e_dkey_ks,
+ HDCP_2_2_E_DKEY_KS_LEN);
+ memcpy(ske_data->riv, get_skey_out.r_iv, HDCP_2_2_RIV_LEN);
+
+ return 0;
+}
+
+static int
+gsc_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_rep_send_receiverid_list
+ *rep_topology,
+ struct hdcp2_rep_send_ack
+ *rep_send_ack)
+{
+ struct wired_cmd_verify_repeater_in verify_repeater_in = { { 0 } };
+ struct wired_cmd_verify_repeater_out verify_repeater_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !rep_topology || !rep_send_ack || !data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_repeater_in(&verify_repeater_in, rep_topology, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&verify_repeater_in,
+ sizeof(verify_repeater_in),
+ (u8 *)&verify_repeater_out,
+ sizeof(verify_repeater_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (verify_repeater_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n",
+ WIRED_VERIFY_REPEATER,
+ verify_repeater_out.header.status);
+ return -EIO;
+ }
+
+ memcpy(rep_send_ack->v, verify_repeater_out.v,
+ HDCP_2_2_V_PRIME_HALF_LEN);
+ rep_send_ack->msg_id = HDCP_2_2_REP_SEND_ACK;
+
+ return 0;
+}
+
+static int gsc_hdcp_verify_mprime(struct device *dev,
+ struct hdcp_port_data *data,
+ struct hdcp2_rep_stream_ready *stream_ready)
+{
+ struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in;
+ struct wired_cmd_repeater_auth_stream_req_out
+ verify_mprime_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+ size_t cmd_size;
+
+ if (!dev || !stream_ready || !data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ cmd_size = struct_size(verify_mprime_in, streams, data->k);
+ if (cmd_size == SIZE_MAX)
+ return -EINVAL;
+
+ verify_mprime_in = kzalloc(cmd_size, GFP_KERNEL);
+ if (!verify_mprime_in)
+ return -ENOMEM;
+
+ i915_hdcp_fill_auth_stream_req_in(verify_mprime_in, stream_ready,
+ cmd_size, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)verify_mprime_in, cmd_size,
+ (u8 *)&verify_mprime_out,
+ sizeof(verify_mprime_out));
+ kfree(verify_mprime_in);
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (verify_mprime_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n",
+ WIRED_REPEATER_AUTH_STREAM_REQ,
+ verify_mprime_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int gsc_hdcp_enable_authentication(struct device *dev,
+ struct hdcp_port_data *data)
+{
+ struct wired_cmd_enable_auth_in enable_auth_in = { { 0 } };
+ struct wired_cmd_enable_auth_out enable_auth_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_enable_auth_in(&enable_auth_in, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&enable_auth_in,
+ sizeof(enable_auth_in),
+ (u8 *)&enable_auth_out,
+ sizeof(enable_auth_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (enable_auth_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "FW cmd 0x%08X failed. status: 0x%X\n",
+ WIRED_ENABLE_AUTH, enable_auth_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int
+gsc_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
+{
+ struct wired_cmd_close_session_in session_close_in = { { 0 } };
+ struct wired_cmd_close_session_out session_close_out = { { 0 } };
+ struct drm_i915_private *i915;
+ ssize_t byte;
+
+ if (!dev || !data)
+ return -EINVAL;
+
+ i915 = kdev_to_i915(dev);
+ if (!i915) {
+ dev_err(dev, "DRM not initialized, aborting HDCP.\n");
+ return -ENODEV;
+ }
+
+ i915_hdcp_fill_close_session_in(&session_close_in, data);
+ byte = intel_hdcp_gsc_msg_send(i915, (u8 *)&session_close_in,
+ sizeof(session_close_in),
+ (u8 *)&session_close_out,
+ sizeof(session_close_out));
+ if (byte < 0) {
+ drm_dbg_kms(&i915->drm, "intel_hdcp_gsc_msg_send failed. %zd\n", byte);
+ return byte;
+ }
+
+ if (session_close_out.header.status != FW_HDCP_STATUS_SUCCESS) {
+ drm_dbg_kms(&i915->drm, "Session Close Failed. status: 0x%X\n",
+ session_close_out.header.status);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static const struct i915_hdcp_ops gsc_hdcp_ops = {
+ .initiate_hdcp2_session = gsc_hdcp_initiate_session,
+ .verify_receiver_cert_prepare_km =
+ gsc_hdcp_verify_receiver_cert_prepare_km,
+ .verify_hprime = gsc_hdcp_verify_hprime,
+ .store_pairing_info = gsc_hdcp_store_pairing_info,
+ .initiate_locality_check = gsc_hdcp_initiate_locality_check,
+ .verify_lprime = gsc_hdcp_verify_lprime,
+ .get_session_key = gsc_hdcp_get_session_key,
+ .repeater_check_flow_prepare_ack =
+ gsc_hdcp_repeater_check_flow_prepare_ack,
+ .verify_mprime = gsc_hdcp_verify_mprime,
+ .enable_hdcp_authentication = gsc_hdcp_enable_authentication,
+ .close_hdcp_session = gsc_hdcp_close_session,
+};
+
+int intel_hdcp_gsc_init(struct drm_i915_private *i915)
+{
+ struct i915_hdcp_master *data;
+
+ data = kzalloc(sizeof(struct i915_hdcp_master), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ mutex_lock(&i915->display.hdcp.comp_mutex);
+ i915->display.hdcp.master = data;
+ i915->display.hdcp.master->hdcp_dev = i915->drm.dev;
+ i915->display.hdcp.master->ops = &gsc_hdcp_ops;
+ mutex_unlock(&i915->display.hdcp.comp_mutex);
+
+ return 0;
+}
+
+int intel_hdcp_gsc_fini(struct drm_i915_private *i915)
+{
+ /* TODO: decrease GSC f/w reference count. */
+ kfree(i915->display.hdcp.master);
+ return 0;
+}
+
/*This function helps allocate memory for the command that we will send to gsc cs */
static int intel_initialize_hdcp_gsc_message(struct drm_i915_private *i915,
struct intel_hdcp_gsc_message *hdcp_message)
@@ -127,7 +635,8 @@ static int intel_gsc_send_sync(struct drm_i915_private *i915,
* will follow
*/
ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
- size_t msg_in_len, u8 *msg_out, size_t msg_out_len)
+ size_t msg_in_len, u8 *msg_out,
+ size_t msg_out_len)
{
struct intel_gt *gt = i915->media_gt;
struct intel_gsc_mtl_header *header;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
index 8f2563ab958b..1ce71729d6f9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: MIT */
/*
- * Copyright © 2021 Intel Corporation
+ * Copyright © 2022 Intel Corporation
*/
#ifndef __INTEL_HDCP_GSC_H__
@@ -11,8 +11,11 @@
struct drm_i915_private;
+bool intel_hdcp_gsc_cs_required(struct drm_i915_private *i915);
ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
size_t msg_in_len, u8 *msg_out,
size_t msg_out_len);
+int intel_hdcp_gsc_init(struct drm_i915_private *i915);
+int intel_hdcp_gsc_fini(struct drm_i915_private *i915);
#endif /* __INTEL_HDCP_GCS_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDCP2.x via GSC CS (rev3)
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (6 preceding siblings ...)
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 7/7] drm/i915/mtl: Add HDCP GSC interface Suraj Kandpal
@ 2022-12-14 9:27 ` Patchwork
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-12-14 9:27 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev3)
URL : https://patchwork.freedesktop.org/series/111876/
State : warning
== Summary ==
Error: dim checkpatch failed
96a311246cfb drm/i915/gsc: Create GSC request submission mechanism
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 11, in <module>
import git
ModuleNotFoundError: No module named 'git'
-:140: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#140:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 147 lines checked
1f838ded045f drm/i915/hdcp: Keep cp fw agonstic naming convention
-:44: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#44:
deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 16 lines checked
fe4139921a8c drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 11, in <module>
import git
ModuleNotFoundError: No module named 'git'
-:522: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#522:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 621 lines checked
9e33df0b1192 drm/i915/hdcp: Refactor HDCP API structures
b34770c75980 drm/i915/hdcp: Fill wired_cmd_in structures at a single place
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 11, in <module>
import git
ModuleNotFoundError: No module named 'git'
-:28: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 485 lines checked
df888e7c1e23 drm/i915/mtl: Add function to send command to GSC CS
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 11, in <module>
import git
ModuleNotFoundError: No module named 'git'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 11, in <module>
import git
ModuleNotFoundError: No module named 'git'
-:35: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#35:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 239 lines checked
292d93e4f204 drm/i915/mtl: Add HDCP GSC interface
-:607: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*data)...) over kzalloc(sizeof(struct i915_hdcp_master)...)
#607: FILE: drivers/gpu/drm/i915/display/intel_hdcp_gsc.c:507:
+ data = kzalloc(sizeof(struct i915_hdcp_master), GFP_KERNEL);
total: 0 errors, 0 warnings, 1 checks, 615 lines checked
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDCP2.x via GSC CS (rev3)
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (7 preceding siblings ...)
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDCP2.x via GSC CS (rev3) Patchwork
@ 2022-12-14 9:27 ` Patchwork
2022-12-14 9:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-15 12:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-12-14 9:27 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev3)
URL : https://patchwork.freedesktop.org/series/111876/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Enable HDCP2.x via GSC CS (rev3)
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (8 preceding siblings ...)
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-12-14 9:48 ` Patchwork
2022-12-15 12:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-12-14 9:48 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7495 bytes --]
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev3)
URL : https://patchwork.freedesktop.org/series/111876/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12502 -> Patchwork_111876v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/index.html
Participating hosts (39 -> 19)
------------------------------
Missing (20): fi-kbl-soraka bat-dg1-6 bat-dg1-5 bat-adlp-6 bat-rpls-1 fi-skl-6600u fi-bsw-n3050 bat-dg2-8 bat-adlm-1 bat-dg2-9 bat-adln-1 bat-jsl-3 bat-rplp-1 bat-dg2-11 fi-bsw-nick bat-dg1-7 bat-kbl-2 bat-adlp-9 bat-jsl-1 bat-adlp-4
Known issues
------------
Here are the changes found in Patchwork_111876v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@load:
- fi-rkl-11600: [PASS][1] -> [SKIP][2] ([i915#6227])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-rkl-11600/igt@i915_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-rkl-11600/igt@i915_module_load@load.html
- fi-icl-u2: [PASS][3] -> [SKIP][4] ([i915#6227])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-icl-u2/igt@i915_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-icl-u2/igt@i915_module_load@load.html
- fi-glk-j4005: [PASS][5] -> [SKIP][6] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-glk-j4005/igt@i915_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-glk-j4005/igt@i915_module_load@load.html
- fi-rkl-guc: [PASS][7] -> [SKIP][8] ([i915#6227])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-rkl-guc/igt@i915_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-rkl-guc/igt@i915_module_load@load.html
- fi-skl-guc: [PASS][9] -> [SKIP][10] ([fdo#109271] / [i915#6227])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-skl-guc/igt@i915_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-skl-guc/igt@i915_module_load@load.html
- fi-skl-6700k2: [PASS][11] -> [SKIP][12] ([fdo#109271] / [i915#6227])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-skl-6700k2/igt@i915_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-skl-6700k2/igt@i915_module_load@load.html
- fi-kbl-7567u: [PASS][13] -> [SKIP][14] ([fdo#109271] / [i915#6227])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-kbl-7567u/igt@i915_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-kbl-7567u/igt@i915_module_load@load.html
- fi-adl-ddr5: [PASS][15] -> [SKIP][16] ([i915#6227])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-adl-ddr5/igt@i915_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-adl-ddr5/igt@i915_module_load@load.html
- fi-cfl-guc: [PASS][17] -> [SKIP][18] ([fdo#109271] / [i915#6227])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-cfl-guc/igt@i915_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-cfl-guc/igt@i915_module_load@load.html
- fi-hsw-4770: [PASS][19] -> [SKIP][20] ([fdo#109271])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-hsw-4770/igt@i915_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-hsw-4770/igt@i915_module_load@load.html
- fi-ivb-3770: [PASS][21] -> [SKIP][22] ([fdo#109271])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-ivb-3770/igt@i915_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-ivb-3770/igt@i915_module_load@load.html
- fi-snb-2600: [PASS][23] -> [SKIP][24] ([fdo#109271])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-snb-2600/igt@i915_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-snb-2600/igt@i915_module_load@load.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770: NOTRUN -> [SKIP][25] ([fdo#109271] / [fdo#111827])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
- fi-rkl-guc: NOTRUN -> [SKIP][26] ([fdo#111827])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-rkl-guc/igt@kms_chamelium@common-hpd-after-suspend.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [INCOMPLETE][27] ([i915#4983]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [INCOMPLETE][29] ([i915#4785]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions:
- fi-bsw-kefka: [FAIL][31] ([i915#6298]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
Build changes
-------------
* Linux: CI_DRM_12502 -> Patchwork_111876v3
CI-20190529: 20190529
CI_DRM_12502: cc44a1e87ea6b788868878295119398966f98a81 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7092: 59e3bf83f6bae0918276f880f969a10d279c657a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_111876v3: cc44a1e87ea6b788868878295119398966f98a81 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
a537a5696217 drm/i915/mtl: Add HDCP GSC interface
e7d156905ea7 drm/i915/mtl: Add function to send command to GSC CS
10719923d1c6 drm/i915/hdcp: Fill wired_cmd_in structures at a single place
2636b34afca7 drm/i915/hdcp: Refactor HDCP API structures
6a99f5231f39 drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w
f28fa6235392 drm/i915/hdcp: Keep cp fw agonstic naming convention
96811d85cfab drm/i915/gsc: Create GSC request submission mechanism
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/index.html
[-- Attachment #2: Type: text/html, Size: 9467 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Enable HDCP2.x via GSC CS (rev3)
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
` (9 preceding siblings ...)
2022-12-14 9:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-12-15 12:13 ` Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-12-15 12:13 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 42487 bytes --]
== Series Details ==
Series: Enable HDCP2.x via GSC CS (rev3)
URL : https://patchwork.freedesktop.org/series/111876/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12502_full -> Patchwork_111876v3_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_111876v3_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_111876v3_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (14 -> 14)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_111876v3_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_fence@syncobj-timeline-multiple-ext-nodes:
- shard-skl: [PASS][1] -> [WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl4/igt@gem_exec_fence@syncobj-timeline-multiple-ext-nodes.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl6/igt@gem_exec_fence@syncobj-timeline-multiple-ext-nodes.html
Known issues
------------
Here are the changes found in Patchwork_111876v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@drm_mm@all:
- shard-tglb: NOTRUN -> [SKIP][3] ([i915#6433])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@drm_mm@all.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][4] -> [FAIL][5] ([i915#6268])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglb7/igt@gem_ctx_exec@basic-nohangcheck.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-snb: [PASS][6] -> [SKIP][7] ([fdo#109271])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-snb7/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-snb5/igt@gem_ctx_isolation@preservation-s3@rcs0.html
- shard-skl: [PASS][8] -> [INCOMPLETE][9] ([i915#4793])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl4/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-skl: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4525])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_balancer@parallel-out-fence:
- shard-iclb: [PASS][11] -> [SKIP][12] ([i915#4525])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb2/igt@gem_exec_balancer@parallel-out-fence.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_endless@dispatch@vcs0:
- shard-tglb: [PASS][13] -> [TIMEOUT][14] ([i915#3778])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglb5/igt@gem_exec_endless@dispatch@vcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@gem_exec_endless@dispatch@vcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-tglb: [PASS][15] -> [FAIL][16] ([i915#2842]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglb6/igt@gem_exec_fair@basic-none-vip@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb7/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_pxp@display-protected-crc:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4270])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@gem_pxp@display-protected-crc.html
* igt@gen7_exec_parse@basic-allocation:
- shard-tglb: NOTRUN -> [SKIP][18] ([fdo#109289])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@gen7_exec_parse@basic-allocation.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#5566] / [i915#716])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl3/igt@gen9_exec_parse@allowed-single.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl8/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-tglb: NOTRUN -> [SKIP][21] ([i915#2527] / [i915#2856])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-skl: [PASS][22] -> [DMESG-WARN][23] ([i915#1982]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl6/igt@i915_module_load@reload-with-fault-injection.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl7/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#6590])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#1937])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-skl: NOTRUN -> [WARN][26] ([i915#1804])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@modeset-lpsp:
- shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271]) +29 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl2/igt@i915_pm_rpm@modeset-lpsp.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-1:
- shard-glk: [PASS][28] -> [FAIL][29] ([i915#2521])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-glk9/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-1.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-glk6/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-1.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: NOTRUN -> [SKIP][30] ([i915#5286]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#111615])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3886]) +3 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl2/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][33] ([i915#3689] / [i915#6095])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3886]) +2 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl4/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][35] ([i915#3689]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_ccs@pipe-d-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@vga-hpd:
- shard-tglb: NOTRUN -> [SKIP][36] ([fdo#109284] / [fdo#111827]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_chamelium@vga-hpd.html
* igt@kms_content_protection@uevent@pipe-a-dp-1:
- shard-apl: NOTRUN -> [FAIL][37] ([i915#1339])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl2/igt@kms_content_protection@uevent@pipe-a-dp-1.html
* igt@kms_cursor_crc@cursor-random-32x10:
- shard-tglb: NOTRUN -> [SKIP][38] ([i915#3555]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_cursor_crc@cursor-random-32x10.html
* igt@kms_cursor_legacy@cursora-vs-flipa@legacy:
- shard-tglb: [PASS][39] -> [DMESG-WARN][40] ([i915#1982])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipa@legacy.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipa@legacy.html
* igt@kms_dp_tiled_display@basic-test-pattern:
- shard-tglb: NOTRUN -> [SKIP][41] ([i915#426])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_dp_tiled_display@basic-test-pattern.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-tglb: NOTRUN -> [FAIL][42] ([i915#2411] / [i915#4767])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-tglb: NOTRUN -> [SKIP][43] ([fdo#109274] / [fdo#111825] / [i915#3637]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
- shard-glk: [PASS][44] -> [FAIL][45] ([i915#79])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-glk3/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [PASS][46] -> [FAIL][47] ([i915#79])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][48] ([i915#2587] / [i915#2672]) +2 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#2587] / [i915#2672])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
- shard-skl: NOTRUN -> [SKIP][50] ([fdo#109271]) +37 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
- shard-iclb: NOTRUN -> [SKIP][51] ([i915#2672]) +4 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][52] ([i915#3555])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-tglb: NOTRUN -> [SKIP][53] ([fdo#109285])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][54] ([i915#6497]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen:
- shard-tglb: NOTRUN -> [SKIP][55] ([fdo#109280] / [fdo#111825]) +6 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-b-edp-1:
- shard-iclb: [PASS][56] -> [SKIP][57] ([i915#5235]) +2 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-b-edp-1.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-b-edp-1.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-skl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#658])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-tglb: NOTRUN -> [FAIL][59] ([i915#132] / [i915#3467]) +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_psr@psr2_primary_mmap_gtt:
- shard-iclb: [PASS][60] -> [SKIP][61] ([fdo#109441])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb2/igt@kms_psr@psr2_primary_mmap_gtt.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@kms_psr@psr2_primary_mmap_gtt.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-tglb: NOTRUN -> [SKIP][62] ([fdo#111615] / [i915#5289])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@perf@blocking:
- shard-skl: [PASS][63] -> [FAIL][64] ([i915#1542])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl7/igt@perf@blocking.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl7/igt@perf@blocking.html
* igt@sysfs_clients@fair-3:
- shard-tglb: NOTRUN -> [SKIP][65] ([i915#2994])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@sysfs_clients@fair-3.html
* igt@sysfs_clients@sema-10:
- shard-skl: NOTRUN -> [SKIP][66] ([fdo#109271] / [i915#2994])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@sysfs_clients@sema-10.html
#### Possible fixes ####
* igt@fbdev@unaligned-read:
- {shard-rkl}: [SKIP][67] ([i915#2582]) -> [PASS][68] +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-1/igt@fbdev@unaligned-read.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@fbdev@unaligned-read.html
* igt@gem_ctx_persistence@hang:
- {shard-rkl}: [SKIP][69] ([i915#6252]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@gem_ctx_persistence@hang.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@gem_ctx_persistence@hang.html
* igt@gem_eio@reset-stress:
- {shard-dg1}: [FAIL][71] ([i915#5784]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-dg1-19/igt@gem_eio@reset-stress.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-dg1-15/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][73] ([i915#4525]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb6/igt@gem_exec_balancer@parallel-keep-in-fence.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb1/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-glk: [FAIL][75] ([i915#2842]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-glk8/igt@gem_exec_fair@basic-none@vecs0.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-glk1/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_reloc@basic-gtt-read:
- {shard-rkl}: [SKIP][77] ([i915#3281]) -> [PASS][78] +4 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-read.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-read.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- {shard-rkl}: [SKIP][79] ([i915#3282]) -> [PASS][80] +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-2/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_softpin@evict-single-offset:
- {shard-rkl}: [FAIL][81] ([i915#4171]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-4/igt@gem_softpin@evict-single-offset.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-2/igt@gem_softpin@evict-single-offset.html
* igt@gen9_exec_parse@valid-registers:
- {shard-rkl}: [SKIP][83] ([i915#2527]) -> [PASS][84] +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-2/igt@gen9_exec_parse@valid-registers.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-tglu}: [FAIL][85] ([i915#3989] / [i915#454]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglu-8/igt@i915_pm_dc@dc6-dpms.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglu-2/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- {shard-dg1}: [FAIL][87] ([i915#3591]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}: [WARN][89] ([i915#2681]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@i2c:
- {shard-rkl}: [SKIP][91] ([fdo#109308]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-1/igt@i915_pm_rpm@i2c.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@i915_pm_rpm@i2c.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- {shard-dg1}: [SKIP][93] ([i915#1397]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-dg1-14/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-dg1-16/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][95] ([i915#5334]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl3/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@hangcheck:
- {shard-dg1}: [INCOMPLETE][97] ([i915#4983]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-dg1-19/igt@i915_selftest@live@hangcheck.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-dg1-14/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@debugfs-reader:
- shard-skl: [INCOMPLETE][99] ([i915#7233]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl4/igt@i915_suspend@debugfs-reader.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@forcewake:
- {shard-rkl}: [FAIL][101] ([fdo#103375]) -> [PASS][102] +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-4/igt@i915_suspend@forcewake.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-2/igt@i915_suspend@forcewake.html
- shard-skl: [INCOMPLETE][103] ([i915#4817] / [i915#7233]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl1/igt@i915_suspend@forcewake.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl4/igt@i915_suspend@forcewake.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [FAIL][105] ([i915#2346]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1:
- shard-skl: [FAIL][107] ([i915#2122]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-skl: [FAIL][109] ([i915#79]) -> [PASS][110] +1 similar issue
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_frontbuffer_tracking@psr-suspend:
- {shard-rkl}: [SKIP][111] ([i915#1849] / [i915#4098]) -> [PASS][112] +17 similar issues
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-suspend.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-suspend.html
* igt@kms_plane@pixel-format@pipe-a-planes:
- {shard-rkl}: [SKIP][113] ([i915#1849] / [i915#3558]) -> [PASS][114] +3 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@kms_plane@pixel-format@pipe-a-planes.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@kms_plane@pixel-format@pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-tglb: [INCOMPLETE][115] -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-c-edp-1:
- shard-skl: [DMESG-WARN][117] ([i915#1982]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl6/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-c-edp-1.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl7/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-c-edp-1.html
* igt@kms_properties@plane-properties-atomic:
- {shard-rkl}: [SKIP][119] ([i915#1849]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@kms_properties@plane-properties-atomic.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@kms_properties@plane-properties-atomic.html
* igt@kms_psr@cursor_mmap_gtt:
- {shard-rkl}: [SKIP][121] ([i915#1072]) -> [PASS][122] +1 similar issue
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-1/igt@kms_psr@cursor_mmap_gtt.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@kms_psr@cursor_mmap_gtt.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [SKIP][123] ([fdo#109441]) -> [PASS][124] +1 similar issue
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][125] ([i915#180]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl8/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
- {shard-dg1}: [FAIL][127] ([fdo#103375]) -> [PASS][128] +1 similar issue
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-dg1-14/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-dg1-12/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@kms_vblank@pipe-b-wait-busy-hang:
- {shard-rkl}: [SKIP][129] ([i915#1845] / [i915#4098]) -> [PASS][130] +23 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-rkl-5/igt@kms_vblank@pipe-b-wait-busy-hang.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-rkl-6/igt@kms_vblank@pipe-b-wait-busy-hang.html
#### Warnings ####
* igt@dmabuf@all@dma_fence_chain:
- shard-skl: [INCOMPLETE][131] ([i915#6949]) -> [TIMEOUT][132] ([i915#6949])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl1/igt@dmabuf@all@dma_fence_chain.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl4/igt@dmabuf@all@dma_fence_chain.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [SKIP][133] ([i915#4525]) -> [FAIL][134] ([i915#6117])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb5/igt@gem_exec_balancer@parallel-ordering.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][135] ([i915#588]) -> [SKIP][136] ([i915#658])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][137] ([i915#2920]) -> [SKIP][138] ([fdo#111068] / [i915#658])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][139] ([i915#2920]) -> [SKIP][140] ([i915#658])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb8/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-iclb: [SKIP][141] ([fdo#111068] / [i915#658]) -> [SKIP][142] ([i915#2920])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@runner@aborted:
- shard-skl: ([FAIL][143], [FAIL][144], [FAIL][145]) ([i915#3002] / [i915#4312] / [i915#6949]) -> ([FAIL][146], [FAIL][147]) ([i915#3002] / [i915#4312])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl1/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl4/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-skl7/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-skl1/igt@runner@aborted.html
- shard-apl: ([FAIL][148], [FAIL][149], [FAIL][150]) ([i915#3002] / [i915#4312]) -> ([FAIL][151], [FAIL][152], [FAIL][153]) ([fdo#109271] / [i915#3002] / [i915#4312])
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl3/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl8/igt@runner@aborted.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12502/shard-apl8/igt@runner@aborted.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl6/igt@runner@aborted.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl8/igt@runner@aborted.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/shard-apl8/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2232]: https://gitlab.freedesktop.org/drm/intel/issues/2232
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3692]: https://gitlab.freedesktop.org/drm/intel/issues/3692
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4793]: https://gitlab.freedesktop.org/drm/intel/issues/4793
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6949]: https://gitlab.freedesktop.org/drm/intel/issues/6949
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#7233]: https://gitlab.freedesktop.org/drm/intel/issues/7233
[i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
[i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7672]: https://gitlab.freedesktop.org/drm/intel/issues/7672
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12502 -> Patchwork_111876v3
CI-20190529: 20190529
CI_DRM_12502: cc44a1e87ea6b788868878295119398966f98a81 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7092: 59e3bf83f6bae0918276f880f969a10d279c657a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_111876v3: cc44a1e87ea6b788868878295119398966f98a81 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111876v3/index.html
[-- Attachment #2: Type: text/html, Size: 44211 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
@ 2022-12-15 19:21 ` Teres Alexis, Alan Previn
2022-12-20 5:58 ` Kandpal, Suraj
0 siblings, 1 reply; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-12-15 19:21 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx; +Cc: Nikula, Jani
On Wed, 2022-12-14 at 14:37 +0530, Kandpal, Suraj wrote:
> HDCP and PXP will require a common function to allow it to
> submit commands to the gsc cs. Also adding the gsc mtl header
> that needs to be added on to the existing payloads of HDCP
> and PXP.
>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
> Signed-off-by: Suraj Kandpal<suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 62 +++++++++++++++++++-
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 3 +
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 41 +++++++++++++
> 4 files changed, 105 insertions(+), 3 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> index 2af1ae3831df..454179884801 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> @@ -439,6 +439,8 @@
> #define GSC_FW_LOAD GSC_INSTR(1, 0, 2)
> #define HECI1_FW_LIMIT_VALID (1 << 31)
>
> +#define GSC_HECI_CMD_PKT GSC_INSTR(0, 0, 6)
> +
> /*
> * Used to convert any address to canonical form.
> * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS,
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index e73d4440c5e8..f00e88fdb5d2 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -30,6 +30,35 @@ bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
> return fw_status & GSC_FW_INIT_COMPLETE_BIT;
> }
>
Alan:[snip]
> @@ -49,7 +78,12 @@ static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)
> return 0;
> }
>
> -static int gsc_fw_load(struct intel_gsc_uc *gsc)
> +/*
> + * Our submissions to GSC are going to be either a FW load or an heci pkt, but
> + * all the request emission logic is the same so we can use a common func and
> + * just add the correct cmd
> + */
> +static int submit_to_gsc_fw(struct intel_gsc_uc *gsc, struct gsc_heci_pkt *pkt)
> {
> struct intel_context *ce = gsc->ce;
> struct i915_request *rq;
> @@ -68,7 +102,11 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> goto out_rq;
> }
>
> - err = emit_gsc_fw_load(rq, gsc);
> + if (pkt)
> + err = emit_gsc_heci_pkt(rq, pkt);
> + else
> + err = emit_gsc_fw_load(rq, gsc);
> +
Alan: To be honest, code function names + responsibilities lack proper hierarchy - doens't look quite right from my perspective for readability / scalability.
In my opinion, we create a separate functions for load_fw vs heci_packet. But have a common utility function for the actual sending to HW (engine->emit_flush)
and waiting with a timeout (i915_request_wait). We know heci_packet will in future be used by PXP and potentially across both concurrently.
Then we mirror the same thing for general heci load (thus also allowing differentiated debug messages):
intel_gsc_engine_send_loadfw
| (allocate the request, use the gsc-ce).
|---> emit_gsc_heci_pkt (fill up the send-heci-pkt cmd)
|---> submit_to_gsc_fw(req, ... timeout)
intel_gsc_engine_send_hecipkt
| (allocate the request, use the gsc-ce).
| (we could even potentially create the MTL CS HEADER here itself
| since the GSC-CS memory header isnt an entity of the caller
| subsystem such as hdcp or pxp, but rather is the entity of the
| (GSC) command-streamer param, so bring it into intel_gsc_fw file)
|---> emit_gsc_fw_load (fill up the fw load cmd)
|---> submit_to_gsc_fw(req, ... timeout)
* intel_gsc_engine_send_hecipkt common to >1 caller-subsystems
Additionally, one last thing might be to move only sets of functions into separate files with common helpers:
intel_gsc_fw.c : all the firmware loading related functions
intel_gsc_heci.c : all the heci command packet sending related functions (here is where we can add the GSC-CS memory header population and in future, the host-session-id
allocation for PXP).
intel_gsc_cs_helper : for the submit_to_gsc_fw and other common functions to both fw-loading and heci-packet sending.
Alan:[snip]
> + u8 gsc_address;
> +#define HECI_MEADDRESS_PXP 17
> +#define HECI_MEADDRESS_HDCP 18
> +
> + u8 reserved1;
> +
> + u16 header_version;
> +#define MTL_GSC_HEADER_VERSION 1
> +
> + u64 host_session_handle;
> + u64 gsc_message_handle;
> +
> + u32 message_size; /* lower 20 bits only, upper 12 are reserved */
> +
> + /*
> + * Flags mask:
> + * Bit 0: Pending
> + * Bit 1: Session Cleanup;
> + * Bits 2-15: Flags
> + * Bits 16-31: Extension Size
> + */
> + u32 flags;
> +
> + u32 status;
> +} __packed;
> +
> +#endif
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS Suraj Kandpal
@ 2022-12-15 19:34 ` Teres Alexis, Alan Previn
2022-12-20 7:19 ` Kandpal, Suraj
0 siblings, 1 reply; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-12-15 19:34 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx; +Cc: Nikula, Jani
On Wed, 2022-12-14 at 14:37 +0530, Suraj Kandpal wrote:
> Add function that takes care of sending command to gsc cs. We start
> of with allocation of memory for our command intel_hdcp_gsc_message that
> contains gsc cs memory header as directed in specs followed by the
> actual payload hdcp message that we want to send.
> Spec states that we need to poll pending bit of response header around
> 20 times each try being 50ms apart hence adding that to current
> gsc_msg_send function
> Also we use the same function to take care of both sending and receiving
> hence no separate function to get the response.
>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 207 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 18 ++
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 1 +
> 4 files changed, 227 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index f64a8bc73c89..9cae0c1598a7 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -251,6 +251,7 @@ i915-y += \
> display/intel_frontbuffer.o \
> display/intel_global_state.o \
> display/intel_hdcp.o \
> + display/intel_hdcp_gsc.o \
> display/intel_hotplug.o \
> display/intel_hti.o \
> display/intel_lpe_audio.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> new file mode 100644
> index 000000000000..6858b6219221
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> @@ -0,0 +1,207 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright 2021, Intel Corporation.
> + */
> +
> +#include "display/intel_hdcp_gsc.h"
> +#include "gem/i915_gem_region.h"
> +#include "gt/uc/intel_gsc_fw.h"
> +#include "gt/uc/intel_gsc_fwif.h"
> +#include "i915_drv.h"
> +#include "i915_utils.h"
> +
> +struct intel_hdcp_gsc_message {
> + struct drm_i915_gem_object *obj;
> + struct i915_vma *vma;
> + void *hdcp_cmd;
> +};
>
Alan: see my last set of comments below.
Alan:[snip
>
>
> +static int intel_gsc_send_sync(struct drm_i915_private *i915,
> + struct intel_gsc_mtl_header *header, u64 addr,
> + size_t msg_out_len)
> +{
> + struct intel_gt *gt = i915->media_gt;
> + int ret;
> +
> + header->flags = 0;
> + ret = intel_gsc_fw_heci_send(>->uc.gsc, addr, header->message_size,
> + addr, msg_out_len + sizeof(*header));
> + if (ret) {
> + drm_err(&i915->drm, "failed to send gsc HDCP msg (%d)\n", ret);
> + return ret;
> + }
> + /*
> + * Checking validity marker for memory sanity
> + */
> + if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) {
> + drm_err(&i915->drm, "invalid validity marker\n");
> + return -EINVAL;
> + }
> +
> + if (header->status != 0) {
> + drm_err(&i915->drm, "header status indicates error %d\n",
> + header->status);
> + return -EINVAL;
> + }
> +
> + if (header->flags & INTEL_GSC_MSG_PENDING)
> + return -EAGAIN;
> +
> + return 0;
> +}
> +
Alan: As per my comment on patch #1 above function could go into the uc/gsc domain ... see the comment below for further elaboration.
> +/*
> + * This function can now be used for sending requests and will also handle
> + * receipt of reply messages hence no different function of message retrieval
> + * is required. We will initialize intel_hdcp_gsc_message structure then add
> + * gsc cs memory header as stated in specs after which the normal HDCP payload
> + * will follow
> + */
> +ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
> + size_t msg_in_len, u8 *msg_out, size_t msg_out_len)
> +{
> + struct intel_gt *gt = i915->media_gt;
> + struct intel_gsc_mtl_header *header;
> + const size_t max_msg_size = PAGE_SIZE - sizeof(*header);
> + struct intel_hdcp_gsc_message *hdcp_message;
> + u64 addr;
> + u32 reply_size;
> + int ret, tries = 0;
> +
> + if (!intel_uc_uses_gsc_uc(>->uc))
> + return -ENODEV;
> +
> + if (msg_in_len > max_msg_size || msg_out_len > max_msg_size)
> + return -ENOSPC;
> +
> + hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL);
> +
> + if (!hdcp_message)
> + return -ENOMEM;
> +
> + ret = intel_initialize_hdcp_gsc_message(i915, hdcp_message);
> +
> + if (ret) {
> + drm_err(&i915->drm,
> + "Could not initialize hdcp_message\n");
> + goto err;
> + }
> +
> + header = hdcp_message->hdcp_cmd;
> + addr = i915_ggtt_offset(hdcp_message->vma);
> +
> + memset(header, 0, sizeof(*header));
> + header->validity_marker = GSC_HECI_VALIDITY_MARKER;
> + header->gsc_address = HECI_MEADDRESS_HDCP;
> + header->host_session_handle = 0;
> + header->header_version = MTL_GSC_HEADER_VERSION;
> + header->message_size = msg_in_len + sizeof(*header);
> +
> + memcpy(hdcp_message->hdcp_cmd + sizeof(*header), msg_in, msg_in_len);
> +
> + /*
> + * Keep sending request in case the pending bit is set no need to add
> + * message handle as we are using same address hence loc. of header is
> + * same and it will contain the message handle. we will send the message
> + * 20 times each message 50 ms apart
> + */
> + do {
> + ret = intel_gsc_send_sync(i915, header, addr, msg_out_len);
> +
> + /* Only try again if gsc says so */
> + if (ret != -EAGAIN)
> + break;
> +
> + msleep(50);
> +
> + } while (++tries < 20);
> +
> + if (ret)
> + goto err;
> +
> + /* we use the same mem for the reply, so header is in the same loc */
> + reply_size = header->message_size - sizeof(*header);
> + if (reply_size > msg_out_len) {
> + drm_warn(&i915->drm, "caller with insufficient HDCP reply size %u (%d)\n",
> + reply_size, (u32)msg_out_len);
> + reply_size = msg_out_len;
> + } else if (reply_size != msg_out_len) {
> + drm_dbg_kms(&i915->drm, "caller unexpected HCDP reply size %u (%d)\n",
> + reply_size, (u32)msg_out_len);
> + }
> +
> + memcpy(msg_out, hdcp_message->hdcp_cmd + sizeof(*header), msg_out_len);
> +
> +err:
> + intel_free_hdcp_gsc_message(hdcp_message);
> + return ret;
> +}
Alan: See my review comment on patch #1 - i believe most of this function above (intel_hdcp_gsc_msg_send)
could go into a common intel_gsc_engine_send_hecipkt function (in a new gsc-heci specific file, i.e. intel_gsc_heci.c)
that lives in the uc/gsc domain, not here in display. In fact the "struct intel_hdcp_gsc_message" also also be renamed
to be "struct intel_gsc_heci_pkt_info" and its definition moved over to (and included from) a header in the uc/gsc domain.
I believe it make sense for the caller to allocate the objects but the common header to have the structure definition and
the common function can do the cmd-prep, submission, waiting (and eventually checking of pending-bit).
Alan:[snip]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism
2022-12-15 19:21 ` Teres Alexis, Alan Previn
@ 2022-12-20 5:58 ` Kandpal, Suraj
2022-12-22 1:20 ` Teres Alexis, Alan Previn
0 siblings, 1 reply; 19+ messages in thread
From: Kandpal, Suraj @ 2022-12-20 5:58 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-gfx; +Cc: Nikula, Jani
> On Wed, 2022-12-14 at 14:37 +0530, Kandpal, Suraj wrote:
> > HDCP and PXP will require a common function to allow it to submit
> > commands to the gsc cs. Also adding the gsc mtl header that needs to
> > be added on to the existing payloads of HDCP and PXP.
> >
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
> > Signed-off-by: Suraj Kandpal<suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 2 +
> > drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 62 +++++++++++++++++++-
> > drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h | 3 +
> > drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 41 +++++++++++++
> > 4 files changed, 105 insertions(+), 3 deletions(-) create mode
> > 100644 drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > index 2af1ae3831df..454179884801 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> > @@ -439,6 +439,8 @@
> > #define GSC_FW_LOAD GSC_INSTR(1, 0, 2)
> > #define HECI1_FW_LIMIT_VALID (1 << 31)
> >
> > +#define GSC_HECI_CMD_PKT GSC_INSTR(0, 0, 6)
> > +
> > /*
> > * Used to convert any address to canonical form.
> > * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, diff
> > --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > index e73d4440c5e8..f00e88fdb5d2 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > @@ -30,6 +30,35 @@ bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc
> *gsc)
> > return fw_status & GSC_FW_INIT_COMPLETE_BIT; }
> >
> Alan:[snip]
>
>
> > @@ -49,7 +78,12 @@ static int emit_gsc_fw_load(struct i915_request *rq,
> struct intel_gsc_uc *gsc)
> > return 0;
> > }
> >
> > -static int gsc_fw_load(struct intel_gsc_uc *gsc)
> > +/*
> > + * Our submissions to GSC are going to be either a FW load or an heci
> > +pkt, but
> > + * all the request emission logic is the same so we can use a common
> > +func and
> > + * just add the correct cmd
> > + */
> > +static int submit_to_gsc_fw(struct intel_gsc_uc *gsc, struct
> > +gsc_heci_pkt *pkt)
> > {
> > struct intel_context *ce = gsc->ce;
> > struct i915_request *rq;
> > @@ -68,7 +102,11 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> > goto out_rq;
> > }
> >
> > - err = emit_gsc_fw_load(rq, gsc);
> > + if (pkt)
> > + err = emit_gsc_heci_pkt(rq, pkt);
> > + else
> > + err = emit_gsc_fw_load(rq, gsc);
> > +
> Alan: To be honest, code function names + responsibilities lack proper hierarchy -
> doens't look quite right from my perspective for readability / scalability.
> In my opinion, we create a separate functions for load_fw vs heci_packet. But
> have a common utility function for the actual sending to HW (engine-
> >emit_flush) and waiting with a timeout (i915_request_wait). We know
> heci_packet will in future be used by PXP and potentially across both
> concurrently.
>
Wouldn’t that be a lot of repeated code just to have a little more readability.
Maybe just add some comments as to what the functions do that should avoid
The confusion.
>
> Then we mirror the same thing for general heci load (thus also allowing
> differentiated debug messages):
>
> intel_gsc_engine_send_loadfw
> | (allocate the request, use the gsc-ce).
> |---> emit_gsc_heci_pkt (fill up the send-heci-pkt cmd)
> |---> submit_to_gsc_fw(req, ... timeout)
>
> intel_gsc_engine_send_hecipkt
> | (allocate the request, use the gsc-ce).
> | (we could even potentially create the MTL CS HEADER here
> itself
> | since the GSC-CS memory header isnt an entity of the caller
> | subsystem such as hdcp or pxp, but rather is the entity of the
> | (GSC) command-streamer param, so bring it into intel_gsc_fw file)
> |---> emit_gsc_fw_load (fill up the fw load cmd)
> |---> submit_to_gsc_fw(req, ... timeout)
>
> * intel_gsc_engine_send_hecipkt common to >1 caller-subsystems
>
Idk if filling the header in this function itself would be the best, we can have a common function defined here
If required to fill the header but I would like to give both hdcp pxp a little freedom as to when they fill
this up.
>
> Additionally, one last thing might be to move only sets of functions into separate
> files with common helpers:
> intel_gsc_fw.c : all the firmware loading related functions intel_gsc_heci.c : all the
> heci command packet sending related functions (here is where we can add the
> GSC-CS memory header population and in future, the host-session-id allocation
> for PXP).
> intel_gsc_cs_helper : for the submit_to_gsc_fw and other common functions to
> both fw-loading and heci-packet sending.
>
>
> Alan:[snip]
>
>
> > + u8 gsc_address;
> > +#define HECI_MEADDRESS_PXP 17
> > +#define HECI_MEADDRESS_HDCP 18
> > +
> > + u8 reserved1;
> > +
> > + u16 header_version;
> > +#define MTL_GSC_HEADER_VERSION 1
> > +
> > + u64 host_session_handle;
> > + u64 gsc_message_handle;
> > +
> > + u32 message_size; /* lower 20 bits only, upper 12 are reserved */
> > +
> > + /*
> > + * Flags mask:
> > + * Bit 0: Pending
> > + * Bit 1: Session Cleanup;
> > + * Bits 2-15: Flags
> > + * Bits 16-31: Extension Size
> > + */
> > + u32 flags;
> > +
> > + u32 status;
> > +} __packed;
> > +
> > +#endif
> > --
> > 2.25.1
> >
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS
2022-12-15 19:34 ` Teres Alexis, Alan Previn
@ 2022-12-20 7:19 ` Kandpal, Suraj
2022-12-21 19:02 ` Teres Alexis, Alan Previn
0 siblings, 1 reply; 19+ messages in thread
From: Kandpal, Suraj @ 2022-12-20 7:19 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-gfx; +Cc: Nikula, Jani
>
> On Wed, 2022-12-14 at 14:37 +0530, Suraj Kandpal wrote:
> > Add function that takes care of sending command to gsc cs. We start of
> > with allocation of memory for our command intel_hdcp_gsc_message that
> > contains gsc cs memory header as directed in specs followed by the
> > actual payload hdcp message that we want to send.
> > Spec states that we need to poll pending bit of response header around
> > 20 times each try being 50ms apart hence adding that to current
> > gsc_msg_send function Also we use the same function to take care of
> > both sending and receiving hence no separate function to get the
> > response.
> >
> > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Uma Shankar <uma.shankar@intel.com>
> > Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 +
> > drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 207
> > ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_hdcp_gsc.h | 18
> ++
> > drivers/gpu/drm/i915/gt/uc/intel_gsc_fwif.h | 1 +
> > 4 files changed, 227 insertions(+)
> > create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > create mode 100644 drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile
> > b/drivers/gpu/drm/i915/Makefile index f64a8bc73c89..9cae0c1598a7
> > 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -251,6 +251,7 @@ i915-y += \
> > display/intel_frontbuffer.o \
> > display/intel_global_state.o \
> > display/intel_hdcp.o \
> > + display/intel_hdcp_gsc.o \
> > display/intel_hotplug.o \
> > display/intel_hti.o \
> > display/intel_lpe_audio.o \
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > new file mode 100644
> > index 000000000000..6858b6219221
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > @@ -0,0 +1,207 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright 2021, Intel Corporation.
> > + */
> > +
> > +#include "display/intel_hdcp_gsc.h"
> > +#include "gem/i915_gem_region.h"
> > +#include "gt/uc/intel_gsc_fw.h"
> > +#include "gt/uc/intel_gsc_fwif.h"
> > +#include "i915_drv.h"
> > +#include "i915_utils.h"
> > +
> > +struct intel_hdcp_gsc_message {
> > + struct drm_i915_gem_object *obj;
> > + struct i915_vma *vma;
> > + void *hdcp_cmd;
> > +};
> >
> Alan: see my last set of comments below.
>
> Alan:[snip
> >
> >
>
> > +static int intel_gsc_send_sync(struct drm_i915_private *i915,
> > + struct intel_gsc_mtl_header *header, u64 addr,
> > + size_t msg_out_len)
> > +{
> > + struct intel_gt *gt = i915->media_gt;
> > + int ret;
> > +
> > + header->flags = 0;
> > + ret = intel_gsc_fw_heci_send(>->uc.gsc, addr, header-
> >message_size,
> > + addr, msg_out_len + sizeof(*header));
> > + if (ret) {
> > + drm_err(&i915->drm, "failed to send gsc HDCP msg (%d)\n",
> ret);
> > + return ret;
> > + }
> > + /*
> > + * Checking validity marker for memory sanity
> > + */
> > + if (header->validity_marker != GSC_HECI_VALIDITY_MARKER) {
> > + drm_err(&i915->drm, "invalid validity marker\n");
> > + return -EINVAL;
> > + }
> > +
> > + if (header->status != 0) {
> > + drm_err(&i915->drm, "header status indicates error %d\n",
> > + header->status);
> > + return -EINVAL;
> > + }
> > +
> > + if (header->flags & INTEL_GSC_MSG_PENDING)
> > + return -EAGAIN;
> > +
> > + return 0;
> > +}
> > +
> Alan: As per my comment on patch #1 above function could go into the uc/gsc
> domain ... see the comment below for further elaboration.
>
> > +/*
> > + * This function can now be used for sending requests and will also
> > +handle
> > + * receipt of reply messages hence no different function of message
> > +retrieval
> > + * is required. We will initialize intel_hdcp_gsc_message structure
> > +then add
> > + * gsc cs memory header as stated in specs after which the normal
> > +HDCP payload
> > + * will follow
> > + */
> > +ssize_t intel_hdcp_gsc_msg_send(struct drm_i915_private *i915, u8 *msg_in,
> > + size_t msg_in_len, u8 *msg_out, size_t
> msg_out_len) {
> > + struct intel_gt *gt = i915->media_gt;
> > + struct intel_gsc_mtl_header *header;
> > + const size_t max_msg_size = PAGE_SIZE - sizeof(*header);
> > + struct intel_hdcp_gsc_message *hdcp_message;
> > + u64 addr;
> > + u32 reply_size;
> > + int ret, tries = 0;
> > +
> > + if (!intel_uc_uses_gsc_uc(>->uc))
> > + return -ENODEV;
> > +
> > + if (msg_in_len > max_msg_size || msg_out_len > max_msg_size)
> > + return -ENOSPC;
> > +
> > + hdcp_message = kzalloc(sizeof(*hdcp_message), GFP_KERNEL);
> > +
> > + if (!hdcp_message)
> > + return -ENOMEM;
> > +
> > + ret = intel_initialize_hdcp_gsc_message(i915, hdcp_message);
> > +
> > + if (ret) {
> > + drm_err(&i915->drm,
> > + "Could not initialize hdcp_message\n");
> > + goto err;
> > + }
> > +
> > + header = hdcp_message->hdcp_cmd;
> > + addr = i915_ggtt_offset(hdcp_message->vma);
> > +
> > + memset(header, 0, sizeof(*header));
> > + header->validity_marker = GSC_HECI_VALIDITY_MARKER;
> > + header->gsc_address = HECI_MEADDRESS_HDCP;
> > + header->host_session_handle = 0;
> > + header->header_version = MTL_GSC_HEADER_VERSION;
> > + header->message_size = msg_in_len + sizeof(*header);
> > +
> > + memcpy(hdcp_message->hdcp_cmd + sizeof(*header), msg_in,
> > +msg_in_len);
> > +
> > + /*
> > + * Keep sending request in case the pending bit is set no need to add
> > + * message handle as we are using same address hence loc. of header is
> > + * same and it will contain the message handle. we will send the message
> > + * 20 times each message 50 ms apart
> > + */
> > + do {
> > + ret = intel_gsc_send_sync(i915, header, addr, msg_out_len);
> > +
> > + /* Only try again if gsc says so */
> > + if (ret != -EAGAIN)
> > + break;
> > +
> > + msleep(50);
> > +
> > + } while (++tries < 20);
> > +
> > + if (ret)
> > + goto err;
> > +
> > + /* we use the same mem for the reply, so header is in the same loc */
> > + reply_size = header->message_size - sizeof(*header);
> > + if (reply_size > msg_out_len) {
> > + drm_warn(&i915->drm, "caller with insufficient HDCP reply size
> %u (%d)\n",
> > + reply_size, (u32)msg_out_len);
> > + reply_size = msg_out_len;
> > + } else if (reply_size != msg_out_len) {
> > + drm_dbg_kms(&i915->drm, "caller unexpected HCDP reply size
> %u (%d)\n",
> > + reply_size, (u32)msg_out_len);
> > + }
> > +
> > + memcpy(msg_out, hdcp_message->hdcp_cmd + sizeof(*header),
> > +msg_out_len);
> > +
> > +err:
> > + intel_free_hdcp_gsc_message(hdcp_message);
> > + return ret;
> > +}
>
> Alan: See my review comment on patch #1 - i believe most of this function above
> (intel_hdcp_gsc_msg_send) could go into a common
> intel_gsc_engine_send_hecipkt function (in a new gsc-heci specific file,
> i.e. intel_gsc_heci.c) that lives in the uc/gsc domain, not here in display. In fact
> the "struct intel_hdcp_gsc_message" also also be renamed to be "struct
> intel_gsc_heci_pkt_info" and its definition moved over to (and included from) a
> header in the uc/gsc domain.
> I believe it make sense for the caller to allocate the objects but the common
> header to have the structure definition and the common function can do the
> cmd-prep, submission, waiting (and eventually checking of pending-bit).
>
I can move a lot of these functions to intel_gsc_fw.c
But I still don’t see the merit in adding more functions and files in just for more readability
Regards,
Suraj Kandpal
>
> Alan:[snip]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention Suraj Kandpal
@ 2022-12-20 8:56 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2022-12-20 8:56 UTC (permalink / raw)
To: Suraj Kandpal, intel-gfx; +Cc: Rodrigo Vivi, Tomas Winkler
On Wed, 14 Dec 2022, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> From: Anshuman Gupta <anshuman.gupta@intel.com>
>
> Change the include/drm/i915_mei_hdcp_interface.h to
> include/drm/i915_cp_fw_hdcp_interface.h
This is now stale.
>
> Cc: Tomas Winkler <tomas.winkler@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Acked-by: Tomas Winkler <tomas.winkler@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 2 +-
> drivers/misc/mei/hdcp/mei_hdcp.c | 2 +-
> include/drm/i915_mei_hdcp_interface.h | 184 ------------------
> 3 files changed, 2 insertions(+), 186 deletions(-)
> delete mode 100644 include/drm/i915_mei_hdcp_interface.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 32e8b2fc3cc6..81d195ef5e57 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -43,7 +43,7 @@
> #include <drm/drm_rect.h>
> #include <drm/drm_vblank.h>
> #include <drm/drm_vblank_work.h>
> -#include <drm/i915_mei_hdcp_interface.h>
> +#include <drm/i915_hdcp_interface.h>
> #include <media/cec-notifier.h>
>
> #include "i915_vma.h"
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
> index e889a8bd7ac8..cbad27511899 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> @@ -23,7 +23,7 @@
> #include <linux/component.h>
> #include <drm/drm_connector.h>
> #include <drm/i915_component.h>
> -#include <drm/i915_mei_hdcp_interface.h>
> +#include <drm/i915_hdcp_interface.h>
>
> #include "mei_hdcp.h"
>
> diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
> deleted file mode 100644
This patch now *deletes* the file. The next patch adds it back. Please
be more careful before sending.
Please check that all commits build before sending, run something like:
$ git rebase -i $tip --exec="make -j8"
This should be standard practice for all contributions.
BR,
Jani.
> index f441cbcd95a4..000000000000
> --- a/include/drm/i915_mei_hdcp_interface.h
> +++ /dev/null
> @@ -1,184 +0,0 @@
> -/* SPDX-License-Identifier: (GPL-2.0+) */
> -/*
> - * Copyright © 2017-2019 Intel Corporation
> - *
> - * Authors:
> - * Ramalingam C <ramalingam.c@intel.com>
> - */
> -
> -#ifndef _I915_MEI_HDCP_INTERFACE_H_
> -#define _I915_MEI_HDCP_INTERFACE_H_
> -
> -#include <linux/mutex.h>
> -#include <linux/device.h>
> -#include <drm/display/drm_hdcp.h>
> -
> -/**
> - * enum hdcp_port_type - HDCP port implementation type defined by ME FW
> - * @HDCP_PORT_TYPE_INVALID: Invalid hdcp port type
> - * @HDCP_PORT_TYPE_INTEGRATED: In-Host HDCP2.x port
> - * @HDCP_PORT_TYPE_LSPCON: HDCP2.2 discrete wired Tx port with LSPCON
> - * (HDMI 2.0) solution
> - * @HDCP_PORT_TYPE_CPDP: HDCP2.2 discrete wired Tx port using the CPDP (DP 1.3)
> - * solution
> - */
> -enum hdcp_port_type {
> - HDCP_PORT_TYPE_INVALID,
> - HDCP_PORT_TYPE_INTEGRATED,
> - HDCP_PORT_TYPE_LSPCON,
> - HDCP_PORT_TYPE_CPDP
> -};
> -
> -/**
> - * enum hdcp_wired_protocol - HDCP adaptation used on the port
> - * @HDCP_PROTOCOL_INVALID: Invalid HDCP adaptation protocol
> - * @HDCP_PROTOCOL_HDMI: HDMI adaptation of HDCP used on the port
> - * @HDCP_PROTOCOL_DP: DP adaptation of HDCP used on the port
> - */
> -enum hdcp_wired_protocol {
> - HDCP_PROTOCOL_INVALID,
> - HDCP_PROTOCOL_HDMI,
> - HDCP_PROTOCOL_DP
> -};
> -
> -enum mei_fw_ddi {
> - MEI_DDI_INVALID_PORT = 0x0,
> -
> - MEI_DDI_B = 1,
> - MEI_DDI_C,
> - MEI_DDI_D,
> - MEI_DDI_E,
> - MEI_DDI_F,
> - MEI_DDI_A = 7,
> - MEI_DDI_RANGE_END = MEI_DDI_A,
> -};
> -
> -/**
> - * enum mei_fw_tc - ME Firmware defined index for transcoders
> - * @MEI_INVALID_TRANSCODER: Index for Invalid transcoder
> - * @MEI_TRANSCODER_EDP: Index for EDP Transcoder
> - * @MEI_TRANSCODER_DSI0: Index for DSI0 Transcoder
> - * @MEI_TRANSCODER_DSI1: Index for DSI1 Transcoder
> - * @MEI_TRANSCODER_A: Index for Transcoder A
> - * @MEI_TRANSCODER_B: Index for Transcoder B
> - * @MEI_TRANSCODER_C: Index for Transcoder C
> - * @MEI_TRANSCODER_D: Index for Transcoder D
> - */
> -enum mei_fw_tc {
> - MEI_INVALID_TRANSCODER = 0x00,
> - MEI_TRANSCODER_EDP,
> - MEI_TRANSCODER_DSI0,
> - MEI_TRANSCODER_DSI1,
> - MEI_TRANSCODER_A = 0x10,
> - MEI_TRANSCODER_B,
> - MEI_TRANSCODER_C,
> - MEI_TRANSCODER_D
> -};
> -
> -/**
> - * struct hdcp_port_data - intel specific HDCP port data
> - * @fw_ddi: ddi index as per ME FW
> - * @fw_tc: transcoder index as per ME FW
> - * @port_type: HDCP port type as per ME FW classification
> - * @protocol: HDCP adaptation as per ME FW
> - * @k: No of streams transmitted on a port. Only on DP MST this is != 1
> - * @seq_num_m: Count of RepeaterAuth_Stream_Manage msg propagated.
> - * Initialized to 0 on AKE_INIT. Incremented after every successful
> - * transmission of RepeaterAuth_Stream_Manage message. When it rolls
> - * over re-Auth has to be triggered.
> - * @streams: struct hdcp2_streamid_type[k]. Defines the type and id for the
> - * streams
> - */
> -struct hdcp_port_data {
> - enum mei_fw_ddi fw_ddi;
> - enum mei_fw_tc fw_tc;
> - u8 port_type;
> - u8 protocol;
> - u16 k;
> - u32 seq_num_m;
> - struct hdcp2_streamid_type *streams;
> -};
> -
> -/**
> - * struct i915_hdcp_component_ops- ops for HDCP2.2 services.
> - * @owner: Module providing the ops
> - * @initiate_hdcp2_session: Initiate a Wired HDCP2.2 Tx Session.
> - * And Prepare AKE_Init.
> - * @verify_receiver_cert_prepare_km: Verify the Receiver Certificate
> - * AKE_Send_Cert and prepare
> - AKE_Stored_Km/AKE_No_Stored_Km
> - * @verify_hprime: Verify AKE_Send_H_prime
> - * @store_pairing_info: Store pairing info received
> - * @initiate_locality_check: Prepare LC_Init
> - * @verify_lprime: Verify lprime
> - * @get_session_key: Prepare SKE_Send_Eks
> - * @repeater_check_flow_prepare_ack: Validate the Downstream topology
> - * and prepare rep_ack
> - * @verify_mprime: Verify mprime
> - * @enable_hdcp_authentication: Mark a port as authenticated.
> - * @close_hdcp_session: Close the Wired HDCP Tx session per port.
> - * This also disables the authenticated state of the port.
> - */
> -struct i915_hdcp_component_ops {
> - /**
> - * @owner: mei_hdcp module
> - */
> - struct module *owner;
> -
> - int (*initiate_hdcp2_session)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_ake_init *ake_data);
> - int (*verify_receiver_cert_prepare_km)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_ake_send_cert
> - *rx_cert,
> - bool *km_stored,
> - struct hdcp2_ake_no_stored_km
> - *ek_pub_km,
> - size_t *msg_sz);
> - int (*verify_hprime)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_ake_send_hprime *rx_hprime);
> - int (*store_pairing_info)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_ake_send_pairing_info
> - *pairing_info);
> - int (*initiate_locality_check)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_lc_init *lc_init_data);
> - int (*verify_lprime)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_lc_send_lprime *rx_lprime);
> - int (*get_session_key)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_ske_send_eks *ske_data);
> - int (*repeater_check_flow_prepare_ack)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_rep_send_receiverid_list
> - *rep_topology,
> - struct hdcp2_rep_send_ack
> - *rep_send_ack);
> - int (*verify_mprime)(struct device *dev,
> - struct hdcp_port_data *data,
> - struct hdcp2_rep_stream_ready *stream_ready);
> - int (*enable_hdcp_authentication)(struct device *dev,
> - struct hdcp_port_data *data);
> - int (*close_hdcp_session)(struct device *dev,
> - struct hdcp_port_data *data);
> -};
> -
> -/**
> - * struct i915_hdcp_component_master - Used for communication between i915
> - * and mei_hdcp drivers for the HDCP2.2 services
> - * @mei_dev: device that provide the HDCP2.2 service from MEI Bus.
> - * @hdcp_ops: Ops implemented by mei_hdcp driver, used by i915 driver.
> - */
> -struct i915_hdcp_comp_master {
> - struct device *mei_dev;
> - const struct i915_hdcp_component_ops *ops;
> -
> - /* To protect the above members. */
> - struct mutex mutex;
> -};
> -
> -#endif /* _I915_MEI_HDCP_INTERFACE_H_ */
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS
2022-12-20 7:19 ` Kandpal, Suraj
@ 2022-12-21 19:02 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-12-21 19:02 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx; +Cc: Nikula, Jani
On Tue, 2022-12-20 at 07:19 +0000, Kandpal, Suraj wrote:
> >
> > On Wed, 2022-12-14 at 14:37 +0530, Suraj Kandpal wrote:
> >
> >
> > Alan: See my review comment on patch #1 - i believe most of this function above
> > (intel_hdcp_gsc_msg_send) could go into a common
> > intel_gsc_engine_send_hecipkt function (in a new gsc-heci specific file,
> > i.e. intel_gsc_heci.c) that lives in the uc/gsc domain, not here in display. In fact
> > the "struct intel_hdcp_gsc_message" also also be renamed to be "struct
> > intel_gsc_heci_pkt_info" and its definition moved over to (and included from) a
> > header in the uc/gsc domain.
> > I believe it make sense for the caller to allocate the objects but the common
> > header to have the structure definition and the common function can do the
> > cmd-prep, submission, waiting (and eventually checking of pending-bit).
> >
> I can move a lot of these functions to intel_gsc_fw.c
> But I still don’t see the merit in adding more functions and files in just for more readability
>
> Regards,
> Suraj Kandpal
>
Replying back after the offline meeting. So just to recap, my concerns include:
1. In hindsight, "readability" wasn't the correct term - i wanted to highlight the importance of how we organize the code hierarchy in accordance to the HW architecture so
that if changes in future hw or workarounds are required, we can eventually can maintain as much common-hw changes (agnostic to the internals of the heci-pkt) to a single
layer
2. Also, with regards to the reviewing process, we know that 3 sets of series are emerging over these coming weeks - gsc-sw-proxy, hdcp and pxp and all of them are going to be
adding patches for the mtl-gsc-mem-header structure population and the gsc-cs heci-load-pkt command submission. So it might be better for reviewers and ourselves if we can
maintain roughly the same function names/locations/responsibilities as these coming series add-on or modify those common codes/..
So as per this mornings, meeting that included Daniele, here is the summary proposal we agreed on - that adds some common helpers while keeping other common-hw resposibilities
as caller-handled (to cater for different e2e flows):
Create new common utility files with common functions:
1. gt/uc/intel_gsc_uc_heci_cmd_submit.h
1. define the mtl-mem-header as per now
2. Add the "host-session-handle-rules" we need to add BIT-MASKS for different usages for host_session_handle
uint64_t: (details of these bitmasks can be discussed thru review but here is what we concluded from mtg:
- BITMASKS [63...60] (0000 = hdcp, 00001 = pxp-single, (downstrm-only 00002 = pxp-multi), future...)
- caller must obey - verified by intel_gsc_uc_heci_cmd_emit_mtl_memhdr
- BITMASKS [59...50] (caller-mask)
- caller can fill this with anything it wants
- PXP would use this arb-session-rolling-counter, hdcp could use this for pipe differentiation
- BITMASKS [49...00] (randomly generated number)
- caller to fill this with anything it wants but really should be randomly generated
* must be unique per calling process + usage.
2. gt/uc/intel_gsc_uc_heci_cmd_submit.c
a. helper -- intel_gsc_uc_heci_cmd_emit_mtl_memhdr
params:
- virt-ptr to the mem header (pinned object)
- message_address_type
- params = size
- flags (after
- host-session = (has to verify in the rules of "@HSH)" based on message_address_type)
b. common = intel_gsc_uc_heci_cmd_submit_packet
(does the same thing as the current code but an independant function,
NOT overloading the gsc-load or heci-submission based on "pkt" as current patch)
- mostly the same code
- caller will do mtl-header pre-population using the helper 2-a
- takes in the objects (from caller), creates the request internally
- no pending bit management - caller handles that the checking of "pending-bit" + "gsc_message_handle" echo
c. for PXP arb session - dont use priveleged instruction, use global instruction.
- need to verify if this works - testing was done to use GGTT like multi-session - expected to work.
- if works, we can use the same 2-b submission helper
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism
2022-12-20 5:58 ` Kandpal, Suraj
@ 2022-12-22 1:20 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 19+ messages in thread
From: Teres Alexis, Alan Previn @ 2022-12-22 1:20 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx; +Cc: Nikula, Jani
> > >
Alan:[snip]
> > > + u8 gsc_address;
> > > +#define HECI_MEADDRESS_PXP 17
> > > +#define HECI_MEADDRESS_HDCP 18
> > > +
Alan: btw, from the internal specs, if i understand it correctly, at the heci command packet level, this ought to be called "heci_client_id", not "gsc_address".
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2022-12-22 1:20 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-14 9:07 [Intel-gfx] [PATCH v3 0/7] Enable HDCP2.x via GSC CS Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 1/7] drm/i915/gsc: Create GSC request submission mechanism Suraj Kandpal
2022-12-15 19:21 ` Teres Alexis, Alan Previn
2022-12-20 5:58 ` Kandpal, Suraj
2022-12-22 1:20 ` Teres Alexis, Alan Previn
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 2/7] drm/i915/hdcp: Keep cp fw agonstic naming convention Suraj Kandpal
2022-12-20 8:56 ` Jani Nikula
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 3/7] drm/i915/hdcp: HDCP2.x Refactoring to agnotic cp f/w Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 4/7] drm/i915/hdcp: Refactor HDCP API structures Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 5/7] drm/i915/hdcp: Fill wired_cmd_in structures at a single place Suraj Kandpal
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 6/7] drm/i915/mtl: Add function to send command to GSC CS Suraj Kandpal
2022-12-15 19:34 ` Teres Alexis, Alan Previn
2022-12-20 7:19 ` Kandpal, Suraj
2022-12-21 19:02 ` Teres Alexis, Alan Previn
2022-12-14 9:07 ` [Intel-gfx] [PATCH v3 7/7] drm/i915/mtl: Add HDCP GSC interface Suraj Kandpal
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDCP2.x via GSC CS (rev3) Patchwork
2022-12-14 9:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-12-14 9:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-15 12:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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