* [PATCH 0/2] Couple of Broadcom L2 driver fixes
@ 2022-12-16 23:09 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
This small patch series ensures that IRQ_LEVEL is set for level
triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
driver.
Thanks
Florian Fainelli (2):
irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
2 files changed, 7 insertions(+), 2 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/2] Couple of Broadcom L2 driver fixes
@ 2022-12-16 23:09 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
This small patch series ensures that IRQ_LEVEL is set for level
triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
driver.
Thanks
Florian Fainelli (2):
irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
2 files changed, 7 insertions(+), 2 deletions(-)
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 1/2] irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
2022-12-16 23:09 ` Florian Fainelli
@ 2022-12-16 23:09 ` Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
When support for the level triggered interrupt controller flavor was
added with c0ca7262088e, we forgot to update the flags to be set to
contain IRQ_LEVEL. While the flow handler is correct, the output from
/proc/interrupts does not show such interrupts as being level triggered
when they are, correct that.
Fixes: c0ca7262088e ("irqchip/brcmstb-l2: Add support for the BCM7271 L2 controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index e4efc08ac594..091b0fe7e324 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -161,6 +161,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
*init_params)
{
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ unsigned int set = 0;
struct brcmstb_l2_intc_data *data;
struct irq_chip_type *ct;
int ret;
@@ -208,9 +209,12 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
flags |= IRQ_GC_BE_IO;
+ if (init_params->handler == handle_level_irq)
+ set |= IRQ_LEVEL;
+
/* Allocate a single Generic IRQ chip for this node */
ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
- np->full_name, init_params->handler, clr, 0, flags);
+ np->full_name, init_params->handler, clr, set, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/2] irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
@ 2022-12-16 23:09 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
When support for the level triggered interrupt controller flavor was
added with c0ca7262088e, we forgot to update the flags to be set to
contain IRQ_LEVEL. While the flow handler is correct, the output from
/proc/interrupts does not show such interrupts as being level triggered
when they are, correct that.
Fixes: c0ca7262088e ("irqchip/brcmstb-l2: Add support for the BCM7271 L2 controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index e4efc08ac594..091b0fe7e324 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -161,6 +161,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
*init_params)
{
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ unsigned int set = 0;
struct brcmstb_l2_intc_data *data;
struct irq_chip_type *ct;
int ret;
@@ -208,9 +209,12 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
flags |= IRQ_GC_BE_IO;
+ if (init_params->handler == handle_level_irq)
+ set |= IRQ_LEVEL;
+
/* Allocate a single Generic IRQ chip for this node */
ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
- np->full_name, init_params->handler, clr, 0, flags);
+ np->full_name, init_params->handler, clr, set, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
2022-12-16 23:09 ` Florian Fainelli
@ 2022-12-16 23:09 ` Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
When support for the interrupt controller was added with a5042de2688d,
we forgot to update the flags to be set to contain IRQ_LEVEL. While the
flow handler is correct, the output from /proc/interrupts does not show
such interrupts as being level triggered when they are, correct that.
Fixes: a5042de2688d ("irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index bb6609cebdbc..1e9dab6e0d86 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -279,7 +279,8 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
flags |= IRQ_GC_BE_IO;
ret = irq_alloc_domain_generic_chips(data->domain, IRQS_PER_WORD, 1,
- dn->full_name, handle_level_irq, clr, 0, flags);
+ dn->full_name, handle_level_irq, clr,
+ IRQ_LEVEL, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
@ 2022-12-16 23:09 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2022-12-16 23:09 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Broadcom internal kernel review list,
Thomas Gleixner, Marc Zyngier, Rob Herring, Doug Berger,
Jason Cooper, open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
When support for the interrupt controller was added with a5042de2688d,
we forgot to update the flags to be set to contain IRQ_LEVEL. While the
flow handler is correct, the output from /proc/interrupts does not show
such interrupts as being level triggered when they are, correct that.
Fixes: a5042de2688d ("irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index bb6609cebdbc..1e9dab6e0d86 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -279,7 +279,8 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
flags |= IRQ_GC_BE_IO;
ret = irq_alloc_domain_generic_chips(data->domain, IRQS_PER_WORD, 1,
- dn->full_name, handle_level_irq, clr, 0, flags);
+ dn->full_name, handle_level_irq, clr,
+ IRQ_LEVEL, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
2022-12-16 23:09 ` Florian Fainelli
@ 2022-12-17 18:25 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 14+ messages in thread
From: Philippe Mathieu-Daudé @ 2022-12-17 18:25 UTC (permalink / raw)
To: Florian Fainelli, linux-kernel
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Marc Zyngier, Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 17/12/22 00:09, Florian Fainelli wrote:
> This small patch series ensures that IRQ_LEVEL is set for level
> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
> driver.
>
> Thanks
>
> Florian Fainelli (2):
> irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
> irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
Series:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
@ 2022-12-17 18:25 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 14+ messages in thread
From: Philippe Mathieu-Daudé @ 2022-12-17 18:25 UTC (permalink / raw)
To: Florian Fainelli, linux-kernel
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Marc Zyngier, Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 17/12/22 00:09, Florian Fainelli wrote:
> This small patch series ensures that IRQ_LEVEL is set for level
> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
> driver.
>
> Thanks
>
> Florian Fainelli (2):
> irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
> irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
Series:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
2022-12-16 23:09 ` Florian Fainelli
@ 2023-01-26 0:10 ` Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2023-01-26 0:10 UTC (permalink / raw)
To: linux-kernel, Marc Zyngier
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 12/16/2022 3:09 PM, Florian Fainelli wrote:
> This small patch series ensures that IRQ_LEVEL is set for level
> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
> driver.
>
> Thanks
Ping?
>
> Florian Fainelli (2):
> irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
> irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
>
> drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
> drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
--
Florian
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
@ 2023-01-26 0:10 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2023-01-26 0:10 UTC (permalink / raw)
To: linux-kernel, Marc Zyngier
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 12/16/2022 3:09 PM, Florian Fainelli wrote:
> This small patch series ensures that IRQ_LEVEL is set for level
> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
> driver.
>
> Thanks
Ping?
>
> Florian Fainelli (2):
> irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
> irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
>
> drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
> drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
> 2 files changed, 7 insertions(+), 2 deletions(-)
>
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
2023-01-26 0:10 ` Florian Fainelli
@ 2023-02-14 23:23 ` Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2023-02-14 23:23 UTC (permalink / raw)
To: linux-kernel, Marc Zyngier
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 1/25/23 16:10, Florian Fainelli wrote:
>
>
> On 12/16/2022 3:09 PM, Florian Fainelli wrote:
>> This small patch series ensures that IRQ_LEVEL is set for level
>> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
>> driver.
>>
>> Thanks
>
> Ping?
Marc, any chance to apply these two patches? Thanks
--
Florian
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/2] Couple of Broadcom L2 driver fixes
@ 2023-02-14 23:23 ` Florian Fainelli
0 siblings, 0 replies; 14+ messages in thread
From: Florian Fainelli @ 2023-02-14 23:23 UTC (permalink / raw)
To: linux-kernel, Marc Zyngier
Cc: Broadcom internal kernel review list, Thomas Gleixner,
Rob Herring, Doug Berger, Jason Cooper,
open list:BROADCOM BMIPS MIPS ARCHITECTURE,
moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE
On 1/25/23 16:10, Florian Fainelli wrote:
>
>
> On 12/16/2022 3:09 PM, Florian Fainelli wrote:
>> This small patch series ensures that IRQ_LEVEL is set for level
>> triggered interupts in both the irq-bcm7120-l2 and the irq-brcmstb-l2
>> driver.
>>
>> Thanks
>
> Ping?
Marc, any chance to apply these two patches? Thanks
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [irqchip: irq/irqchip-next] irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
2022-12-16 23:09 ` Florian Fainelli
(?)
@ 2023-02-18 14:28 ` irqchip-bot for Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: irqchip-bot for Florian Fainelli @ 2023-02-18 14:28 UTC (permalink / raw)
To: linux-kernel; +Cc: Florian Fainelli, philmd, Marc Zyngier, tglx
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 13a157b38ca5b4f9eed81442b8821db293755961
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/13a157b38ca5b4f9eed81442b8821db293755961
Author: Florian Fainelli <f.fainelli@gmail.com>
AuthorDate: Fri, 16 Dec 2022 15:09:34 -08:00
Committer: Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 18 Feb 2023 14:23:41
irqchip/irq-bcm7120-l2: Set IRQ_LEVEL for level triggered interrupts
When support for the interrupt controller was added with a5042de2688d,
we forgot to update the flags to be set to contain IRQ_LEVEL. While the
flow handler is correct, the output from /proc/interrupts does not show
such interrupts as being level triggered when they are, correct that.
Fixes: a5042de2688d ("irqchip: bcm7120-l2: Add Broadcom BCM7120-style Level 2 interrupt controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221216230934.2478345-3-f.fainelli@gmail.com
---
drivers/irqchip/irq-bcm7120-l2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-bcm7120-l2.c b/drivers/irqchip/irq-bcm7120-l2.c
index bb6609c..1e9dab6 100644
--- a/drivers/irqchip/irq-bcm7120-l2.c
+++ b/drivers/irqchip/irq-bcm7120-l2.c
@@ -279,7 +279,8 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
flags |= IRQ_GC_BE_IO;
ret = irq_alloc_domain_generic_chips(data->domain, IRQS_PER_WORD, 1,
- dn->full_name, handle_level_irq, clr, 0, flags);
+ dn->full_name, handle_level_irq, clr,
+ IRQ_LEVEL, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [irqchip: irq/irqchip-next] irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
2022-12-16 23:09 ` Florian Fainelli
(?)
@ 2023-02-18 14:28 ` irqchip-bot for Florian Fainelli
-1 siblings, 0 replies; 14+ messages in thread
From: irqchip-bot for Florian Fainelli @ 2023-02-18 14:28 UTC (permalink / raw)
To: linux-kernel; +Cc: Florian Fainelli, philmd, Marc Zyngier, tglx
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 94debe03e8afa1267f95a9001786a6aa506b9ff3
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/94debe03e8afa1267f95a9001786a6aa506b9ff3
Author: Florian Fainelli <f.fainelli@gmail.com>
AuthorDate: Fri, 16 Dec 2022 15:09:33 -08:00
Committer: Marc Zyngier <maz@kernel.org>
CommitterDate: Sat, 18 Feb 2023 14:23:41
irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts
When support for the level triggered interrupt controller flavor was
added with c0ca7262088e, we forgot to update the flags to be set to
contain IRQ_LEVEL. While the flow handler is correct, the output from
/proc/interrupts does not show such interrupts as being level triggered
when they are, correct that.
Fixes: c0ca7262088e ("irqchip/brcmstb-l2: Add support for the BCM7271 L2 controller")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221216230934.2478345-2-f.fainelli@gmail.com
---
drivers/irqchip/irq-brcmstb-l2.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index e4efc08..091b0fe 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -161,6 +161,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
*init_params)
{
unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN;
+ unsigned int set = 0;
struct brcmstb_l2_intc_data *data;
struct irq_chip_type *ct;
int ret;
@@ -208,9 +209,12 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
flags |= IRQ_GC_BE_IO;
+ if (init_params->handler == handle_level_irq)
+ set |= IRQ_LEVEL;
+
/* Allocate a single Generic IRQ chip for this node */
ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
- np->full_name, init_params->handler, clr, 0, flags);
+ np->full_name, init_params->handler, clr, set, flags);
if (ret) {
pr_err("failed to allocate generic irq chip\n");
goto out_free_domain;
^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-02-18 14:28 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-16 23:09 [PATCH 0/2] Couple of Broadcom L2 driver fixes Florian Fainelli
2022-12-16 23:09 ` Florian Fainelli
2022-12-16 23:09 ` [PATCH 1/2] irqchip/irq-brcmstb-l2: Set IRQ_LEVEL for level triggered interrupts Florian Fainelli
2022-12-16 23:09 ` Florian Fainelli
2023-02-18 14:28 ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2022-12-16 23:09 ` [PATCH 2/2] irqchip/irq-bcm7120-l2: " Florian Fainelli
2022-12-16 23:09 ` Florian Fainelli
2023-02-18 14:28 ` [irqchip: irq/irqchip-next] " irqchip-bot for Florian Fainelli
2022-12-17 18:25 ` [PATCH 0/2] Couple of Broadcom L2 driver fixes Philippe Mathieu-Daudé
2022-12-17 18:25 ` Philippe Mathieu-Daudé
2023-01-26 0:10 ` Florian Fainelli
2023-01-26 0:10 ` Florian Fainelli
2023-02-14 23:23 ` Florian Fainelli
2023-02-14 23:23 ` Florian Fainelli
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