* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:49 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:49 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: Hector Martin, Sven Peter, Alyssa Rosenzweig, Thomas Gleixner,
Will Deacon, Catalin Marinas, James Morse, Suzuki K Poulose,
Alexandru Elisei, Oliver Upton, asahi, linux-arm-kernel,
linux-kernel
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:49 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:49 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: linux-arm-kernel, Sven Peter, Catalin Marinas, Hector Martin,
linux-kernel, asahi, Thomas Gleixner, Will Deacon,
Alyssa Rosenzweig
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:49 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:49 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: Hector Martin, Sven Peter, Alyssa Rosenzweig, Thomas Gleixner,
Will Deacon, Catalin Marinas, James Morse, Suzuki K Poulose,
Alexandru Elisei, Oliver Upton, asahi, linux-arm-kernel,
linux-kernel
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:50 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:50 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: Hector Martin, Sven Peter, Alyssa Rosenzweig, Thomas Gleixner,
Will Deacon, Catalin Marinas, James Morse, Suzuki K Poulose,
Alexandru Elisei, Oliver Upton, asahi, linux-arm-kernel,
linux-kernel
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:50 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:50 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: linux-arm-kernel, Sven Peter, Catalin Marinas, Hector Martin,
linux-kernel, asahi, Thomas Gleixner, Will Deacon,
Alyssa Rosenzweig
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV
@ 2023-01-03 9:50 ` Marc Zyngier
0 siblings, 0 replies; 6+ messages in thread
From: Marc Zyngier @ 2023-01-03 9:50 UTC (permalink / raw)
To: kvmarm, kvmarm
Cc: Hector Martin, Sven Peter, Alyssa Rosenzweig, Thomas Gleixner,
Will Deacon, Catalin Marinas, James Morse, Suzuki K Poulose,
Alexandru Elisei, Oliver Upton, asahi, linux-arm-kernel,
linux-kernel
Hi all,
I've spent the holiday break reviving the Nested Virt KVM/arm64
implementation[1] and allowing it to work on the Apple M2 SoC. The
amusing part is that it actually works!
However, the way the vgic is implemented on this HW is still at odds
with the rest of the architecture, and requires some hacks, some of
which are independent of the actual NV code. This is what this series
is about.
The first patch places M2 on the naughty list of broken SEIS
implementations, just like the M1 before it. The second patch allows
a vgic MI to be registered, even if this MI cannot be masked (we
disable it at the source anyway). The last patch hacks the AIC driver
to actually register the vgic MI with KVM.
I plan to take the first patch as a fix for 6.2, while the rest can be
deferred to 6.3.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-6.2-WIP
Marc Zyngier (3):
KVM: arm64: vgic: Add Apple M2 cpus to the list of broken SEIS
implementations
KVM: arm64: vgic: Allow registration of a non-maskable maintenance
interrupt
irqchip/apple-aic: Register vgic maintenance interrupt with KVM
arch/arm64/include/asm/cputype.h | 4 +++
arch/arm64/kvm/vgic/vgic-init.c | 2 +-
arch/arm64/kvm/vgic/vgic-v3.c | 3 +-
drivers/irqchip/irq-apple-aic.c | 55 ++++++++++++++++++++++++--------
4 files changed, 49 insertions(+), 15 deletions(-)
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-01-03 14:55 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-03 9:49 [PATCH 0/3] KVM: arm64: M2 vgic maintenance interrupt rework pre-NV Marc Zyngier
2023-01-03 9:49 ` Marc Zyngier
2023-01-03 9:49 ` Marc Zyngier
2023-01-03 9:50 Marc Zyngier
2023-01-03 9:50 ` Marc Zyngier
2023-01-03 9:50 ` Marc Zyngier
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