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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 32/34] i.MX6UL: Add a specific GPT timer instance for the i.MX6UL
Date: Thu,  5 Jan 2023 16:44:15 +0000	[thread overview]
Message-ID: <20230105164417.3994639-33-peter.maydell@linaro.org> (raw)
In-Reply-To: <20230105164417.3994639-1-peter.maydell@linaro.org>

From: Jean-Christophe Dubois <jcd@tribudubois.net>

The i.MX6UL doesn't support CLK_HIGH ou CLK_HIGH_DIV clock source.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/timer/imx_gpt.h |  1 +
 hw/arm/fsl-imx6ul.c        |  2 +-
 hw/misc/imx6ul_ccm.c       |  6 ------
 hw/timer/imx_gpt.c         | 25 +++++++++++++++++++++++++
 4 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h
index ff5c8a351a0..5a1230da35e 100644
--- a/include/hw/timer/imx_gpt.h
+++ b/include/hw/timer/imx_gpt.h
@@ -78,6 +78,7 @@
 #define TYPE_IMX25_GPT "imx25.gpt"
 #define TYPE_IMX31_GPT "imx31.gpt"
 #define TYPE_IMX6_GPT "imx6.gpt"
+#define TYPE_IMX6UL_GPT "imx6ul.gpt"
 #define TYPE_IMX7_GPT "imx7.gpt"
 
 #define TYPE_IMX_GPT TYPE_IMX25_GPT
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index f1897123294..d88d6cc1c5f 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -81,7 +81,7 @@ static void fsl_imx6ul_init(Object *obj)
      */
     for (i = 0; i < FSL_IMX6UL_NUM_GPTS; i++) {
         snprintf(name, NAME_SIZE, "gpt%d", i);
-        object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX7_GPT);
+        object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX6UL_GPT);
     }
 
     /*
diff --git a/hw/misc/imx6ul_ccm.c b/hw/misc/imx6ul_ccm.c
index a65d0314556..e01bb68ac72 100644
--- a/hw/misc/imx6ul_ccm.c
+++ b/hw/misc/imx6ul_ccm.c
@@ -522,12 +522,6 @@ static uint32_t imx6ul_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
     case CLK_32k:
         freq = CKIL_FREQ;
         break;
-    case CLK_HIGH:
-        freq = CKIH_FREQ;
-        break;
-    case CLK_HIGH_DIV:
-        freq = CKIH_FREQ / 8;
-        break;
     default:
         qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n",
                       TYPE_IMX6UL_CCM, __func__, clock);
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index 80b83026399..7222b1b3874 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -115,6 +115,17 @@ static const IMXClk imx6_gpt_clocks[] = {
     CLK_HIGH,      /* 111 reference clock */
 };
 
+static const IMXClk imx6ul_gpt_clocks[] = {
+    CLK_NONE,      /* 000 No clock source */
+    CLK_IPG,       /* 001 ipg_clk, 532MHz*/
+    CLK_IPG_HIGH,  /* 010 ipg_clk_highfreq */
+    CLK_EXT,       /* 011 External clock */
+    CLK_32k,       /* 100 ipg_clk_32k */
+    CLK_NONE,      /* 101 not defined */
+    CLK_NONE,      /* 110 not defined */
+    CLK_NONE,      /* 111 not defined */
+};
+
 static const IMXClk imx7_gpt_clocks[] = {
     CLK_NONE,      /* 000 No clock source */
     CLK_IPG,       /* 001 ipg_clk, 532MHz*/
@@ -539,6 +550,13 @@ static void imx6_gpt_init(Object *obj)
     s->clocks = imx6_gpt_clocks;
 }
 
+static void imx6ul_gpt_init(Object *obj)
+{
+    IMXGPTState *s = IMX_GPT(obj);
+
+    s->clocks = imx6ul_gpt_clocks;
+}
+
 static void imx7_gpt_init(Object *obj)
 {
     IMXGPTState *s = IMX_GPT(obj);
@@ -566,6 +584,12 @@ static const TypeInfo imx6_gpt_info = {
     .instance_init = imx6_gpt_init,
 };
 
+static const TypeInfo imx6ul_gpt_info = {
+    .name = TYPE_IMX6UL_GPT,
+    .parent = TYPE_IMX25_GPT,
+    .instance_init = imx6ul_gpt_init,
+};
+
 static const TypeInfo imx7_gpt_info = {
     .name = TYPE_IMX7_GPT,
     .parent = TYPE_IMX25_GPT,
@@ -577,6 +601,7 @@ static void imx_gpt_register_types(void)
     type_register_static(&imx25_gpt_info);
     type_register_static(&imx31_gpt_info);
     type_register_static(&imx6_gpt_info);
+    type_register_static(&imx6ul_gpt_info);
     type_register_static(&imx7_gpt_info);
 }
 
-- 
2.25.1



  parent reply	other threads:[~2023-01-05 17:17 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-05 16:43 [PULL 00/34] target-arm queue Peter Maydell
2023-01-05 16:43 ` [PULL 01/34] target/arm:Set lg_page_size to 0 if either S1 or S2 asks for it Peter Maydell
2023-01-05 16:43 ` [PULL 02/34] target/arm: Don't add all MIDR aliases for cores that implement PMSA Peter Maydell
2023-01-05 16:43 ` [PULL 03/34] target/arm: Make RVBAR available for all ARMv8 CPUs Peter Maydell
2023-01-05 16:43 ` [PULL 04/34] target/arm: Make stage_2_format for cache attributes optional Peter Maydell
2023-01-05 16:43 ` [PULL 05/34] target/arm: Enable TTBCR_EAE for ARMv8-R AArch32 Peter Maydell
2023-01-05 16:43 ` [PULL 06/34] target/arm: Add PMSAv8r registers Peter Maydell
2023-01-05 16:43 ` [PULL 07/34] target/arm: Add PMSAv8r functionality Peter Maydell
2023-01-05 16:43 ` [PULL 08/34] target/arm: Add ARM Cortex-R52 CPU Peter Maydell
2023-01-05 16:43 ` [PULL 09/34] target/arm: fix handling of HLT semihosting in system mode Peter Maydell
2023-01-05 16:43 ` [PULL 10/34] hw/timer/imx_epit: improve comments Peter Maydell
2023-01-05 16:43 ` [PULL 11/34] hw/timer/imx_epit: cleanup CR defines Peter Maydell
2023-01-05 16:43 ` [PULL 12/34] hw/timer/imx_epit: define SR_OCIF Peter Maydell
2023-01-05 16:43 ` [PULL 13/34] hw/timer/imx_epit: update interrupt state on CR write access Peter Maydell
2023-01-05 16:43 ` [PULL 14/34] hw/timer/imx_epit: hard reset initializes CR with 0 Peter Maydell
2023-01-05 16:43 ` [PULL 15/34] hw/timer/imx_epit: factor out register write handlers Peter Maydell
2023-01-05 16:43 ` [PULL 16/34] hw/timer/imx_epit: remove explicit fields cnt and freq Peter Maydell
2023-01-05 16:44 ` [PULL 17/34] hw/timer/imx_epit: fix compare timer handling Peter Maydell
2023-01-05 16:44 ` [PULL 18/34] target/arm: Fix checkpatch comment style warnings in helper.c Peter Maydell
2023-01-05 16:44 ` [PULL 19/34] target/arm: Fix checkpatch space errors " Peter Maydell
2023-01-05 16:44 ` [PULL 20/34] target/arm: Fix checkpatch brace " Peter Maydell
2023-01-05 16:44 ` [PULL 21/34] target/arm: Remove unused includes from m_helper.c Peter Maydell
2023-01-05 16:44 ` [PULL 22/34] target/arm: Remove unused includes from helper.c Peter Maydell
2023-01-05 16:44 ` [PULL 23/34] target/arm: cleanup cpu includes Peter Maydell
2023-01-05 16:44 ` [PULL 24/34] hw/input/tsc2xxx: Constify set_transform()'s MouseTransformInfo arg Peter Maydell
2023-01-05 16:44 ` [PULL 25/34] hw/arm/nseries: Constify various read-only arrays Peter Maydell
2023-01-05 16:44 ` [PULL 26/34] hw/arm/nseries: Silent -Wmissing-field-initializers warning Peter Maydell
2023-01-05 16:44 ` [PULL 27/34] target/arm: align exposed ID registers with Linux Peter Maydell
2023-01-05 16:44 ` [PULL 28/34] hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope Peter Maydell
2023-01-05 16:44 ` [PULL 29/34] hw/arm/smmu-common: Avoid using inlined functions with external linkage Peter Maydell
2023-01-05 16:44 ` [PULL 30/34] i.MX7D: Connect GPT timers to IRQ Peter Maydell
2023-01-05 16:44 ` [PULL 31/34] i.MX7D: Compute clock frequency for the fixed frequency clocks Peter Maydell
2023-01-05 16:44 ` Peter Maydell [this message]
2023-01-05 16:44 ` [PULL 33/34] i.MX7D: Connect IRQs to GPIO devices Peter Maydell
2023-01-05 16:44 ` [PULL 34/34] hw/net: Fix read of uninitialized memory in imx_fec Peter Maydell
2023-01-06 12:10 ` [PULL 00/34] target-arm queue Peter Maydell

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