* [PULL 1/3] hw/intc/loongarch_pch_msi: add irq number property
2023-01-06 6:33 [PULL 0/3] loongarch-to-apply queue Song Gao
@ 2023-01-06 6:33 ` Song Gao
2023-01-06 6:33 ` [PULL 2/3] hw/intc/loongarch_pch_pic: " Song Gao
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Song Gao @ 2023-01-06 6:33 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, richard.henderson, Tianrui Zhao,
Philippe Mathieu-Daudé
From: Tianrui Zhao <zhaotianrui@loongson.cn>
This patch adds irq number property for loongarch msi interrupt
controller, and remove hard coding irq number macro.
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230104020518.2564263-2-zhaotianrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_pch_msi.c | 29 ++++++++++++++++++++++++++---
hw/loongarch/virt.c | 13 ++++++++-----
include/hw/intc/loongarch_pch_msi.h | 3 ++-
include/hw/pci-host/ls7a.h | 1 -
4 files changed, 36 insertions(+), 10 deletions(-)
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
index b36d6d76e4..ecf3ed0267 100644
--- a/hw/intc/loongarch_pch_msi.c
+++ b/hw/intc/loongarch_pch_msi.c
@@ -32,7 +32,7 @@ static void loongarch_msi_mem_write(void *opaque, hwaddr addr,
*/
irq_num = (val & 0xff) - s->irq_base;
trace_loongarch_msi_set_irq(irq_num);
- assert(irq_num < PCH_MSI_IRQ_NUM);
+ assert(irq_num < s->irq_num);
qemu_set_irq(s->pch_msi_irq[irq_num], 1);
}
@@ -49,6 +49,28 @@ static void pch_msi_irq_handler(void *opaque, int irq, int level)
qemu_set_irq(s->pch_msi_irq[irq], level);
}
+static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp)
+{
+ LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev);
+
+ if (!s->irq_num || s->irq_num > PCH_MSI_IRQ_NUM) {
+ error_setg(errp, "Invalid 'msi_irq_num'");
+ return;
+ }
+
+ s->pch_msi_irq = g_new(qemu_irq, s->irq_num);
+
+ qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num);
+ qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num);
+}
+
+static void loongarch_pch_msi_unrealize(DeviceState *dev)
+{
+ LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev);
+
+ g_free(s->pch_msi_irq);
+}
+
static void loongarch_pch_msi_init(Object *obj)
{
LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(obj);
@@ -59,12 +81,11 @@ static void loongarch_pch_msi_init(Object *obj)
sysbus_init_mmio(sbd, &s->msi_mmio);
msi_nonbroken = true;
- qdev_init_gpio_out(DEVICE(obj), s->pch_msi_irq, PCH_MSI_IRQ_NUM);
- qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM);
}
static Property loongarch_msi_properties[] = {
DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
+ DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -72,6 +93,8 @@ static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = loongarch_pch_msi_realize;
+ dc->unrealize = loongarch_pch_msi_unrealize;
device_class_set_props(dc, loongarch_msi_properties);
}
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index c8a495ea30..82b2fb6a10 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -553,7 +553,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
LoongArchCPU *lacpu;
CPULoongArchState *env;
CPUState *cpu_state;
- int cpu, pin, i;
+ int cpu, pin, i, start, num;
ipi = qdev_new(TYPE_LOONGARCH_IPI);
sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
@@ -633,14 +633,17 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
}
pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
- qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START);
+ start = PCH_PIC_IRQ_NUM;
+ num = EXTIOI_IRQS - start;
+ qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
+ qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
d = SYS_BUS_DEVICE(pch_msi);
sysbus_realize_and_unref(d, &error_fatal);
sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
- for (i = 0; i < PCH_MSI_IRQ_NUM; i++) {
- /* Connect 192 pch_msi irqs to extioi */
+ for (i = 0; i < num; i++) {
+ /* Connect pch_msi irqs to extioi */
qdev_connect_gpio_out(DEVICE(d), i,
- qdev_get_gpio_in(extioi, i + PCH_MSI_IRQ_START));
+ qdev_get_gpio_in(extioi, i + start));
}
loongarch_devices_init(pch_pic, lams);
diff --git a/include/hw/intc/loongarch_pch_msi.h b/include/hw/intc/loongarch_pch_msi.h
index 6d67560dea..c5a52bc327 100644
--- a/include/hw/intc/loongarch_pch_msi.h
+++ b/include/hw/intc/loongarch_pch_msi.h
@@ -15,8 +15,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
struct LoongArchPCHMSI {
SysBusDevice parent_obj;
- qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM];
+ qemu_irq *pch_msi_irq;
MemoryRegion msi_mmio;
/* irq base passed to upper extioi intc */
unsigned int irq_base;
+ unsigned int irq_num;
};
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index df7fa55a30..6443327bd7 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -34,7 +34,6 @@
*/
#define PCH_PIC_IRQ_OFFSET 64
#define VIRT_DEVICE_IRQS 16
-#define VIRT_PCI_IRQS 48
#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
#define VIRT_UART_BASE 0x1fe001e0
#define VIRT_UART_SIZE 0X100
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PULL 2/3] hw/intc/loongarch_pch_pic: add irq number property
2023-01-06 6:33 [PULL 0/3] loongarch-to-apply queue Song Gao
2023-01-06 6:33 ` [PULL 1/3] hw/intc/loongarch_pch_msi: add irq number property Song Gao
@ 2023-01-06 6:33 ` Song Gao
2023-01-06 6:33 ` [PULL 3/3] hw/intc/loongarch_pch: Change default irq number of pch irq controller Song Gao
2023-01-07 21:29 ` [PULL 0/3] loongarch-to-apply queue Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Song Gao @ 2023-01-06 6:33 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, richard.henderson, Tianrui Zhao
From: Tianrui Zhao <zhaotianrui@loongson.cn>
With loongarch 7A1000 manual, irq number supported can be set
in PCH_PIC_INT_ID_HI register. This patch adds irq number property
for loongarch_pch_pic, so that virt machine can set different
irq number when pch_pic intc is added.
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230104020518.2564263-3-zhaotianrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_pch_pic.c | 34 +++++++++++++++++++++++++----
hw/loongarch/virt.c | 8 ++++---
include/hw/intc/loongarch_pch_pic.h | 5 ++---
3 files changed, 37 insertions(+), 10 deletions(-)
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index 3380b09807..33966e7bac 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -6,12 +6,15 @@
*/
#include "qemu/osdep.h"
+#include "qemu/bitops.h"
#include "hw/sysbus.h"
#include "hw/loongarch/virt.h"
#include "hw/irq.h"
#include "hw/intc/loongarch_pch_pic.h"
+#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "trace.h"
+#include "qapi/error.h"
static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
{
@@ -40,7 +43,7 @@ static void pch_pic_irq_handler(void *opaque, int irq, int level)
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
uint64_t mask = 1ULL << irq;
- assert(irq < PCH_PIC_IRQ_NUM);
+ assert(irq < s->irq_num);
trace_loongarch_pch_pic_irq_handler(irq, level);
if (s->intedge & mask) {
@@ -78,7 +81,12 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
val = PCH_PIC_INT_ID_VAL;
break;
case PCH_PIC_INT_ID_HI:
- val = PCH_PIC_INT_ID_NUM;
+ /*
+ * With 7A1000 manual
+ * bit 0-15 pch irqchip version
+ * bit 16-31 irq number supported with pch irqchip
+ */
+ val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1);
break;
case PCH_PIC_INT_MASK_LO:
val = (uint32_t)s->int_mask;
@@ -365,6 +373,19 @@ static void loongarch_pch_pic_reset(DeviceState *d)
s->int_polarity = 0x0;
}
+static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+{
+ LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
+
+ if (!s->irq_num || s->irq_num > PCH_PIC_IRQ_NUM) {
+ error_setg(errp, "Invalid 'pic_irq_num'");
+ return;
+ }
+
+ qdev_init_gpio_out(dev, s->parent_irq, s->irq_num);
+ qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);
+}
+
static void loongarch_pch_pic_init(Object *obj)
{
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj);
@@ -382,10 +403,13 @@ static void loongarch_pch_pic_init(Object *obj)
sysbus_init_mmio(sbd, &s->iomem8);
sysbus_init_mmio(sbd, &s->iomem32_high);
- qdev_init_gpio_out(DEVICE(obj), s->parent_irq, PCH_PIC_IRQ_NUM);
- qdev_init_gpio_in(DEVICE(obj), pch_pic_irq_handler, PCH_PIC_IRQ_NUM);
}
+static Property loongarch_pch_pic_properties[] = {
+ DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static const VMStateDescription vmstate_loongarch_pch_pic = {
.name = TYPE_LOONGARCH_PCH_PIC,
.version_id = 1,
@@ -411,8 +435,10 @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ dc->realize = loongarch_pch_pic_realize;
dc->reset = loongarch_pch_pic_reset;
dc->vmsd = &vmstate_loongarch_pch_pic;
+ device_class_set_props(dc, loongarch_pch_pic_properties);
}
static const TypeInfo loongarch_pch_pic_info = {
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 82b2fb6a10..35d4bce3b3 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -616,6 +616,8 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
}
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+ num = PCH_PIC_IRQ_NUM;
+ qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
d = SYS_BUS_DEVICE(pch_pic);
sysbus_realize_and_unref(d, &error_fatal);
memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE,
@@ -627,13 +629,13 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO,
sysbus_mmio_get_region(d, 2));
- /* Connect 64 pch_pic irqs to extioi */
- for (int i = 0; i < PCH_PIC_IRQ_NUM; i++) {
+ /* Connect pch_pic irqs to extioi */
+ for (int i = 0; i < num; i++) {
qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
}
pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
- start = PCH_PIC_IRQ_NUM;
+ start = num;
num = EXTIOI_IRQS - start;
qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index 2d4aa9ed6f..efae5fa8e9 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -9,11 +9,9 @@
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
-#define PCH_PIC_IRQ_START 0
-#define PCH_PIC_IRQ_END 63
#define PCH_PIC_IRQ_NUM 64
#define PCH_PIC_INT_ID_VAL 0x7000000UL
-#define PCH_PIC_INT_ID_NUM 0x3f0001UL
+#define PCH_PIC_INT_ID_VER 0x1UL
#define PCH_PIC_INT_ID_LO 0x00
#define PCH_PIC_INT_ID_HI 0x04
@@ -66,4 +64,5 @@ struct LoongArchPCHPIC {
MemoryRegion iomem32_low;
MemoryRegion iomem32_high;
MemoryRegion iomem8;
+ unsigned int irq_num;
};
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PULL 3/3] hw/intc/loongarch_pch: Change default irq number of pch irq controller
2023-01-06 6:33 [PULL 0/3] loongarch-to-apply queue Song Gao
2023-01-06 6:33 ` [PULL 1/3] hw/intc/loongarch_pch_msi: add irq number property Song Gao
2023-01-06 6:33 ` [PULL 2/3] hw/intc/loongarch_pch_pic: " Song Gao
@ 2023-01-06 6:33 ` Song Gao
2023-01-07 21:29 ` [PULL 0/3] loongarch-to-apply queue Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Song Gao @ 2023-01-06 6:33 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, richard.henderson, Tianrui Zhao,
Philippe Mathieu-Daudé
From: Tianrui Zhao <zhaotianrui@loongson.cn>
Change the default irq number of pch pic to 32, so that the irq
number of pch msi is 224(256 - 32), and move the 'PCH_PIC_IRQ_NUM'
macro to pci-host/ls7a.h and add prefix 'VIRT' on it to keep standard
format.
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230104020518.2564263-4-zhaotianrui@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_pch_pic.c | 3 ++-
hw/loongarch/virt.c | 2 +-
include/hw/intc/loongarch_pch_msi.h | 6 +++---
include/hw/intc/loongarch_pch_pic.h | 1 -
include/hw/pci-host/ls7a.h | 1 +
5 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index 33966e7bac..9208fc4460 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -9,6 +9,7 @@
#include "qemu/bitops.h"
#include "hw/sysbus.h"
#include "hw/loongarch/virt.h"
+#include "hw/pci-host/ls7a.h"
#include "hw/irq.h"
#include "hw/intc/loongarch_pch_pic.h"
#include "hw/qdev-properties.h"
@@ -377,7 +378,7 @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
{
LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
- if (!s->irq_num || s->irq_num > PCH_PIC_IRQ_NUM) {
+ if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
error_setg(errp, "Invalid 'pic_irq_num'");
return;
}
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 35d4bce3b3..66be925068 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -616,7 +616,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
}
pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
- num = PCH_PIC_IRQ_NUM;
+ num = VIRT_PCH_PIC_IRQ_NUM;
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
d = SYS_BUS_DEVICE(pch_pic);
sysbus_realize_and_unref(d, &error_fatal);
diff --git a/include/hw/intc/loongarch_pch_msi.h b/include/hw/intc/loongarch_pch_msi.h
index c5a52bc327..832e69fa32 100644
--- a/include/hw/intc/loongarch_pch_msi.h
+++ b/include/hw/intc/loongarch_pch_msi.h
@@ -8,10 +8,10 @@
#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
-/* Msi irq start start from 64 to 255 */
-#define PCH_MSI_IRQ_START 64
+/* MSI irq start from 32 to 255 */
+#define PCH_MSI_IRQ_START 32
#define PCH_MSI_IRQ_END 255
-#define PCH_MSI_IRQ_NUM 192
+#define PCH_MSI_IRQ_NUM 224
struct LoongArchPCHMSI {
SysBusDevice parent_obj;
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index efae5fa8e9..258e3b3294 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -9,7 +9,6 @@
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
-#define PCH_PIC_IRQ_NUM 64
#define PCH_PIC_INT_ID_VAL 0x7000000UL
#define PCH_PIC_INT_ID_VER 0x1UL
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index 6443327bd7..8061c4bbbf 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -32,6 +32,7 @@
* 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs
* used for pci device.
*/
+#define VIRT_PCH_PIC_IRQ_NUM 32
#define PCH_PIC_IRQ_OFFSET 64
#define VIRT_DEVICE_IRQS 16
#define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2)
--
2.31.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PULL 0/3] loongarch-to-apply queue
2023-01-06 6:33 [PULL 0/3] loongarch-to-apply queue Song Gao
` (2 preceding siblings ...)
2023-01-06 6:33 ` [PULL 3/3] hw/intc/loongarch_pch: Change default irq number of pch irq controller Song Gao
@ 2023-01-07 21:29 ` Peter Maydell
3 siblings, 0 replies; 5+ messages in thread
From: Peter Maydell @ 2023-01-07 21:29 UTC (permalink / raw)
To: Song Gao; +Cc: qemu-devel, richard.henderson
On Fri, 6 Jan 2023 at 06:33, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit d1852caab131ea898134fdcea8c14bc2ee75fbe9:
>
> Merge tag 'python-pull-request' of https://gitlab.com/jsnow/qemu into staging (2023-01-05 16:59:22 +0000)
>
> are available in the Git repository at:
>
> https://gitlab.com/gaosong/qemu.git pull-loongarch-20230106
>
> for you to fetch changes up to f4d10ce8aa545266a0b6df223a7f8ea2afca18b2:
>
> hw/intc/loongarch_pch: Change default irq number of pch irq controller (2023-01-06 14:12:43 +0800)
>
> ----------------------------------------------------------------
>
> Add irq number property for loongarch pch interrupt controller
>
> ----------------------------------------------------------------
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread