From: Jonathan Cameron <Jonathan.Cameron@huawei.com> To: <qemu-devel@nongnu.org>, Michael Tsirkin <mst@redhat.com> Cc: "Ben Widawsky" <bwidawsk@kernel.org>, linux-cxl@vger.kernel.org, linuxarm@huawei.com, "Ira Weiny" <ira.weiny@intel.com>, "Gregory Price" <gourry.memverge@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org> Subject: [PATCH v2 0/8] hw/cxl: CXL emulation cleanups and minor fixes for upstream Date: Thu, 12 Jan 2023 10:26:36 +0000 [thread overview] Message-ID: <20230112102644.27830-1-Jonathan.Cameron@huawei.com> (raw) V2: - Various minor issues found by Philippe, see individual patches. Note that the const_le64() patch matches changes in a set of Philippe's that was never applied. Philippe may send an update of that series before this merges. If that occurs, drop "qemu/bswap: Add const_le64()" - Picked up tags. V1 Cover letter. A small collection of misc fixes and tidying up pulled out from various series. I've pulled this to the top of my queue of CXL related work as they stand fine on their own and it will reduce the noise in the larger patch sets if these go upstream first. Gregory's patches were posted as part of his work on adding volatile support. https://lore.kernel.org/linux-cxl/20221006233702.18532-1-gregory.price@memverge.com/ https://lore.kernel.org/linux-cxl/20221128150157.97724-2-gregory.price@memverge.com/ I might propose this for upstream inclusion this cycle, but testing is currently limited by lack of suitable kernel support. Ira's patches were part of his event injection series. https://lore.kernel.org/linux-cxl/20221221-ira-cxl-events-2022-11-17-v2-0-2ce2ecc06219@intel.com/ Intent is to propose for upstream the rest of that series shortly after some minor changes from earlier review. My three patches have not previously been posted. For the curious, the current state of QEMU CXL emulation that we are working through the backlog wrt to final cleanup before proposing for upstreaming can be found at. https://gitlab.com/jic23/qemu/-/commits/cxl-2023-01-11 Gregory Price (2): hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Ira Weiny (3): qemu/bswap: Add const_le64() qemu/uuid: Add UUID static initializer hw/cxl/mailbox: Use new UUID network order define for cel_uuid Jonathan Cameron (3): hw/mem/cxl_type3: Improve error handling in realize() hw/pci-bridge/cxl_downstream: Fix type naming mismatch hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge hw/cxl/cxl-device-utils.c | 2 +- hw/cxl/cxl-mailbox-utils.c | 28 +++++++++++++++------------- hw/i386/acpi-build.c | 1 - hw/mem/cxl_type3.c | 15 +++++++++++---- hw/pci-bridge/cxl_downstream.c | 2 +- include/hw/cxl/cxl_device.h | 2 +- include/qemu/bswap.h | 12 +++++++++++- include/qemu/uuid.h | 12 ++++++++++++ 8 files changed, 52 insertions(+), 22 deletions(-) -- 2.37.2
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org> To: <qemu-devel@nongnu.org>, Michael Tsirkin <mst@redhat.com> Cc: "Ben Widawsky" <bwidawsk@kernel.org>, linux-cxl@vger.kernel.org, linuxarm@huawei.com, "Ira Weiny" <ira.weiny@intel.com>, "Gregory Price" <gourry.memverge@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org> Subject: [PATCH v2 0/8] hw/cxl: CXL emulation cleanups and minor fixes for upstream Date: Thu, 12 Jan 2023 10:26:36 +0000 [thread overview] Message-ID: <20230112102644.27830-1-Jonathan.Cameron@huawei.com> (raw) V2: - Various minor issues found by Philippe, see individual patches. Note that the const_le64() patch matches changes in a set of Philippe's that was never applied. Philippe may send an update of that series before this merges. If that occurs, drop "qemu/bswap: Add const_le64()" - Picked up tags. V1 Cover letter. A small collection of misc fixes and tidying up pulled out from various series. I've pulled this to the top of my queue of CXL related work as they stand fine on their own and it will reduce the noise in the larger patch sets if these go upstream first. Gregory's patches were posted as part of his work on adding volatile support. https://lore.kernel.org/linux-cxl/20221006233702.18532-1-gregory.price@memverge.com/ https://lore.kernel.org/linux-cxl/20221128150157.97724-2-gregory.price@memverge.com/ I might propose this for upstream inclusion this cycle, but testing is currently limited by lack of suitable kernel support. Ira's patches were part of his event injection series. https://lore.kernel.org/linux-cxl/20221221-ira-cxl-events-2022-11-17-v2-0-2ce2ecc06219@intel.com/ Intent is to propose for upstream the rest of that series shortly after some minor changes from earlier review. My three patches have not previously been posted. For the curious, the current state of QEMU CXL emulation that we are working through the backlog wrt to final cleanup before proposing for upstreaming can be found at. https://gitlab.com/jic23/qemu/-/commits/cxl-2023-01-11 Gregory Price (2): hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Ira Weiny (3): qemu/bswap: Add const_le64() qemu/uuid: Add UUID static initializer hw/cxl/mailbox: Use new UUID network order define for cel_uuid Jonathan Cameron (3): hw/mem/cxl_type3: Improve error handling in realize() hw/pci-bridge/cxl_downstream: Fix type naming mismatch hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge hw/cxl/cxl-device-utils.c | 2 +- hw/cxl/cxl-mailbox-utils.c | 28 +++++++++++++++------------- hw/i386/acpi-build.c | 1 - hw/mem/cxl_type3.c | 15 +++++++++++---- hw/pci-bridge/cxl_downstream.c | 2 +- include/hw/cxl/cxl_device.h | 2 +- include/qemu/bswap.h | 12 +++++++++++- include/qemu/uuid.h | 12 ++++++++++++ 8 files changed, 52 insertions(+), 22 deletions(-) -- 2.37.2
next reply other threads:[~2023-01-12 10:30 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-12 10:26 Jonathan Cameron [this message] 2023-01-12 10:26 ` [PATCH v2 0/8] hw/cxl: CXL emulation cleanups and minor fixes for upstream Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 1/8] hw/mem/cxl_type3: Improve error handling in realize() Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 2/8] hw/pci-bridge/cxl_downstream: Fix type naming mismatch Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 3/8] hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 4/8] hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:37 ` Philippe Mathieu-Daudé 2023-01-12 10:26 ` [PATCH v2 5/8] hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-28 2:38 ` Michael S. Tsirkin 2023-01-31 8:49 ` Jonathan Cameron via 2023-01-31 8:49 ` Jonathan Cameron 2023-01-12 10:26 ` [PATCH v2 6/8] qemu/bswap: Add const_le64() Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 7/8] qemu/uuid: Add UUID static initializer Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via 2023-01-12 10:26 ` [PATCH v2 8/8] hw/cxl/mailbox: Use new UUID network order define for cel_uuid Jonathan Cameron 2023-01-12 10:26 ` Jonathan Cameron via
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