From: Poovendhan Selvaraj <quic_poovendh@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <lee@kernel.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <shawnguo@kernel.org>, <arnd@arndb.de>, <marcel.ziswiler@toradex.com>, <dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>, <broonie@kernel.org>, <robimarko@gmail.com>, <quic_gurus@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Cc: <quic_srichara@quicinc.com>, <quic_gokulsri@quicinc.com>, <quic_sjaganat@quicinc.com>, <quic_kathirav@quicinc.com>, <quic_arajkuma@quicinc.com>, <quic_anusha@quicinc.com>, <quic_devipriy@quicinc.com> Subject: [PATCH 2/5] arm64: dts: Add support for Crashdump collection on IPQ9574 Date: Fri, 13 Jan 2023 21:30:09 +0530 [thread overview] Message-ID: <20230113160012.14893-3-quic_poovendh@quicinc.com> (raw) In-Reply-To: <20230113160012.14893-1-quic_poovendh@quicinc.com> Enable Crashdump collection in ipq9574 Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 79fa5d91882c..349955bad386 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -166,6 +166,13 @@ reg = <0x0 0x40000000 0x0 0x0>; }; + firmware { + scm { + compatible = "qcom,scm-ipq9574", "qcom,scm"; + qcom,dload-mode = <&tcsr_boot_misc 0>; + }; + }; + pmu { compatible = "arm,cortex-a73-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; @@ -190,6 +197,13 @@ reg = <0x0 0x4a600000 0x0 0x400000>; no-map; }; + + smem@4aa00000 { + compatible = "qcom,smem"; + reg = <0x0 0x4aa00000 0x0 0x00100000>; + hwlocks = <&tcsr_mutex 0>; + no-map; + }; }; soc: soc@0 { @@ -240,6 +254,17 @@ #reset-cells = <1>; }; + tcsr_mutex: hwlock@1905000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01905000 0x8000>; + #hwlock-cells = <1>; + }; + + tcsr_boot_misc: syscon@193d100 { + compatible = "qcom,tcsr-ipq9574", "syscon"; + reg = <0x0193d100 0x4>; + }; + sdhc_1: sdhci@7804000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x7804000 0x1000>, <0x7805000 0x1000>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Poovendhan Selvaraj <quic_poovendh@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <lee@kernel.org>, <catalin.marinas@arm.com>, <will@kernel.org>, <shawnguo@kernel.org>, <arnd@arndb.de>, <marcel.ziswiler@toradex.com>, <dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>, <broonie@kernel.org>, <robimarko@gmail.com>, <quic_gurus@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org> Cc: <quic_srichara@quicinc.com>, <quic_gokulsri@quicinc.com>, <quic_sjaganat@quicinc.com>, <quic_kathirav@quicinc.com>, <quic_arajkuma@quicinc.com>, <quic_anusha@quicinc.com>, <quic_devipriy@quicinc.com> Subject: [PATCH 2/5] arm64: dts: Add support for Crashdump collection on IPQ9574 Date: Fri, 13 Jan 2023 21:30:09 +0530 [thread overview] Message-ID: <20230113160012.14893-3-quic_poovendh@quicinc.com> (raw) In-Reply-To: <20230113160012.14893-1-quic_poovendh@quicinc.com> Enable Crashdump collection in ipq9574 Co-developed-by: Anusha Rao <quic_anusha@quicinc.com> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> Co-developed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Signed-off-by: Poovendhan Selvaraj <quic_poovendh@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 79fa5d91882c..349955bad386 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -166,6 +166,13 @@ reg = <0x0 0x40000000 0x0 0x0>; }; + firmware { + scm { + compatible = "qcom,scm-ipq9574", "qcom,scm"; + qcom,dload-mode = <&tcsr_boot_misc 0>; + }; + }; + pmu { compatible = "arm,cortex-a73-pmu"; interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; @@ -190,6 +197,13 @@ reg = <0x0 0x4a600000 0x0 0x400000>; no-map; }; + + smem@4aa00000 { + compatible = "qcom,smem"; + reg = <0x0 0x4aa00000 0x0 0x00100000>; + hwlocks = <&tcsr_mutex 0>; + no-map; + }; }; soc: soc@0 { @@ -240,6 +254,17 @@ #reset-cells = <1>; }; + tcsr_mutex: hwlock@1905000 { + compatible = "qcom,tcsr-mutex"; + reg = <0x01905000 0x8000>; + #hwlock-cells = <1>; + }; + + tcsr_boot_misc: syscon@193d100 { + compatible = "qcom,tcsr-ipq9574", "syscon"; + reg = <0x0193d100 0x4>; + }; + sdhc_1: sdhci@7804000 { compatible = "qcom,sdhci-msm-v5"; reg = <0x7804000 0x1000>, <0x7805000 0x1000>; -- 2.17.1
next prev parent reply other threads:[~2023-01-13 16:02 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-01-13 16:00 [PATCH 0/5] Enable crashdump collection support for IPQ9574 Poovendhan Selvaraj 2023-01-13 16:00 ` Poovendhan Selvaraj 2023-01-13 16:00 ` [PATCH 1/5] dt-bindings: scm: Add compatible " Poovendhan Selvaraj 2023-01-13 16:00 ` Poovendhan Selvaraj 2023-01-13 16:35 ` Krzysztof Kozlowski 2023-01-13 16:35 ` Krzysztof Kozlowski 2023-01-27 14:38 ` POOVENDHAN SELVARAJ 2023-01-27 14:38 ` POOVENDHAN SELVARAJ 2023-01-13 16:00 ` Poovendhan Selvaraj [this message] 2023-01-13 16:00 ` [PATCH 2/5] arm64: dts: Add support for Crashdump collection on IPQ9574 Poovendhan Selvaraj 2023-01-13 16:00 ` [PATCH 3/5] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Poovendhan Selvaraj 2023-01-13 16:00 ` Poovendhan Selvaraj 2023-01-14 1:16 ` Guru Das Srinagesh 2023-01-14 1:16 ` Guru Das Srinagesh 2023-01-27 15:00 ` POOVENDHAN SELVARAJ 2023-01-27 15:00 ` POOVENDHAN SELVARAJ 2023-01-27 17:17 ` Lee Jones 2023-01-27 17:17 ` Lee Jones 2023-02-01 7:37 ` POOVENDHAN SELVARAJ 2023-02-01 7:37 ` POOVENDHAN SELVARAJ 2023-01-13 16:00 ` [PATCH 4/5] arm64: defconfig: Enable scm download mode config for IPQ9574 SoC Poovendhan Selvaraj 2023-01-13 16:00 ` Poovendhan Selvaraj 2023-01-13 16:41 ` Krzysztof Kozlowski 2023-01-13 16:41 ` Krzysztof Kozlowski 2023-01-13 16:00 ` [PATCH 5/5] dt-bindings: tcsr: Add compatible for IPQ9574 Poovendhan Selvaraj 2023-01-13 16:00 ` Poovendhan Selvaraj 2023-01-13 16:40 ` Krzysztof Kozlowski 2023-01-13 16:40 ` Krzysztof Kozlowski 2023-01-27 14:40 ` POOVENDHAN SELVARAJ 2023-01-27 14:40 ` POOVENDHAN SELVARAJ
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230113160012.14893-3-quic_poovendh@quicinc.com \ --to=quic_poovendh@quicinc.com \ --cc=agross@kernel.org \ --cc=andersson@kernel.org \ --cc=arnd@arndb.de \ --cc=broonie@kernel.org \ --cc=catalin.marinas@arm.com \ --cc=devicetree@vger.kernel.org \ --cc=dmitry.baryshkov@linaro.org \ --cc=konrad.dybcio@linaro.org \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=lee@kernel.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=marcel.ziswiler@toradex.com \ --cc=nfraprado@collabora.com \ --cc=quic_anusha@quicinc.com \ --cc=quic_arajkuma@quicinc.com \ --cc=quic_devipriy@quicinc.com \ --cc=quic_gokulsri@quicinc.com \ --cc=quic_gurus@quicinc.com \ --cc=quic_kathirav@quicinc.com \ --cc=quic_sjaganat@quicinc.com \ --cc=quic_srichara@quicinc.com \ --cc=robh+dt@kernel.org \ --cc=robimarko@gmail.com \ --cc=shawnguo@kernel.org \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.