All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andrew Jones <ajones@ventanamicro.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Bin Meng <bin.meng@windriver.com>,
	Frank Chang <frank.chang@sifive.com>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v6 4/5] riscv: Correctly set the device-tree entry 'mmu-type'
Date: Mon, 23 Jan 2023 11:12:29 +0100	[thread overview]
Message-ID: <20230123101229.okef2kaqubwvybfh@orel> (raw)
In-Reply-To: <20230123090324.732681-5-alexghiti@rivosinc.com>

On Mon, Jan 23, 2023 at 10:03:23AM +0100, Alexandre Ghiti wrote:
> The 'mmu-type' should reflect what the hardware is capable of so use the
> new satp_mode field in RISCVCPUConfig to do that.
> 
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
>  hw/riscv/virt.c | 19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)


Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


  reply	other threads:[~2023-01-23 10:12 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-23  9:03 [PATCH v6 0/5] riscv: Allow user to set the satp mode Alexandre Ghiti
2023-01-23  9:03 ` [PATCH v6 1/5] riscv: Pass Object to register_cpu_props instead of DeviceState Alexandre Ghiti
2023-01-23  9:03 ` [PATCH v6 2/5] riscv: Change type of valid_vm_1_10_[32|64] to bool Alexandre Ghiti
2023-01-23  9:48   ` Andrew Jones
2023-01-24  0:02   ` Alistair Francis
2023-01-23  9:03 ` [PATCH v6 3/5] riscv: Allow user to set the satp mode Alexandre Ghiti
2023-01-23 10:11   ` Andrew Jones
2023-01-24  9:56     ` Alexandre Ghiti
2023-01-23 10:14   ` Andrew Jones
2023-01-24  9:56     ` Alexandre Ghiti
2023-01-23 10:29   ` Andrew Jones
2023-01-24 10:00     ` Alexandre Ghiti
2023-01-23  9:03 ` [PATCH v6 4/5] riscv: Correctly set the device-tree entry 'mmu-type' Alexandre Ghiti
2023-01-23 10:12   ` Andrew Jones [this message]
2023-01-24  0:35   ` Alistair Francis
2023-01-23  9:03 ` [PATCH v6 5/5] riscv: Introduce satp mode hw capabilities Alexandre Ghiti
2023-01-23 10:51   ` Andrew Jones
2023-01-23 11:15     ` Alexandre Ghiti
2023-01-23 13:31       ` Andrew Jones
2023-01-24 13:13         ` Alexandre Ghiti
2023-01-24 10:07     ` Alexandre Ghiti
2023-01-24 15:31       ` Andrew Jones
2023-01-23 13:51   ` Andrew Jones
2023-01-24 13:24     ` Alexandre Ghiti
2023-01-24  0:41   ` Alistair Francis
2023-01-24  9:13     ` Alexandre Ghiti

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230123101229.okef2kaqubwvybfh@orel \
    --to=ajones@ventanamicro.com \
    --cc=alexghiti@rivosinc.com \
    --cc=alistair.francis@wdc.com \
    --cc=bin.meng@windriver.com \
    --cc=frank.chang@sifive.com \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.