From: Bjorn Helgaas <helgaas@kernel.org>
To: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Cc: alberto.dassatti@heig-vd.ch, xxm@rock-chips.com,
wenrui.li@rock-chips.com, rick.wertenbroek@heig-vd.ch,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jani Nikula" <jani.nikula@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked
Date: Thu, 26 Jan 2023 08:42:27 -0600 [thread overview]
Message-ID: <20230126144227.GA1271912@bhelgaas> (raw)
In-Reply-To: <20230126135049.708524-5-rick.wertenbroek@gmail.com>
On Thu, Jan 26, 2023 at 02:50:44PM +0100, Rick Wertenbroek wrote:
> The Rockchip PCIe controller did not wait until the PHY PLLs were locked.
> This could cause hangs. Now the PHY PLLs status is checked through a side
> channel bit with a poll and timeout. If the PHY PLLs cannot lock an error
> is generated. This is documented in the TRM section 17.5.8.1 PCIe
> Initalization Sequence.
s/Initalization/Initialization/
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <helgaas@kernel.org>
To: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Cc: alberto.dassatti@heig-vd.ch, xxm@rock-chips.com,
wenrui.li@rock-chips.com, rick.wertenbroek@heig-vd.ch,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jani Nikula" <jani.nikula@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked
Date: Thu, 26 Jan 2023 08:42:27 -0600 [thread overview]
Message-ID: <20230126144227.GA1271912@bhelgaas> (raw)
In-Reply-To: <20230126135049.708524-5-rick.wertenbroek@gmail.com>
On Thu, Jan 26, 2023 at 02:50:44PM +0100, Rick Wertenbroek wrote:
> The Rockchip PCIe controller did not wait until the PHY PLLs were locked.
> This could cause hangs. Now the PHY PLLs status is checked through a side
> channel bit with a poll and timeout. If the PHY PLLs cannot lock an error
> is generated. This is documented in the TRM section 17.5.8.1 PCIe
> Initalization Sequence.
s/Initalization/Initialization/
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Bjorn Helgaas <helgaas@kernel.org>
To: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Cc: alberto.dassatti@heig-vd.ch, xxm@rock-chips.com,
wenrui.li@rock-chips.com, rick.wertenbroek@heig-vd.ch,
"Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Jani Nikula" <jani.nikula@intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mikko Kovanen" <mikko.kovanen@aavamobile.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked
Date: Thu, 26 Jan 2023 08:42:27 -0600 [thread overview]
Message-ID: <20230126144227.GA1271912@bhelgaas> (raw)
In-Reply-To: <20230126135049.708524-5-rick.wertenbroek@gmail.com>
On Thu, Jan 26, 2023 at 02:50:44PM +0100, Rick Wertenbroek wrote:
> The Rockchip PCIe controller did not wait until the PHY PLLs were locked.
> This could cause hangs. Now the PHY PLLs status is checked through a side
> channel bit with a poll and timeout. If the PHY PLLs cannot lock an error
> is generated. This is documented in the TRM section 17.5.8.1 PCIe
> Initalization Sequence.
s/Initalization/Initialization/
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-01-26 14:42 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 13:50 [PATCH 0/8] PCI: rockchip: Fix PCIe endpoint controller driver Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 1/8] PCI: rockchip: Removed writes to unused registers Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 2/8] PCI: rockchip: Fixed setup of Device ID Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 3/8] PCI: rockchip: Fixed endpoint controller Configuration Request Retry Status Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 4/8] PCI: rockchip: Added poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 14:42 ` Bjorn Helgaas [this message]
2023-01-26 14:42 ` Bjorn Helgaas
2023-01-26 14:42 ` Bjorn Helgaas
2023-01-26 13:50 ` [PATCH 5/8] PCI: rockchip: Added dtsi entry for PCIe endpoint controller Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 15:23 ` Krzysztof Kozlowski
2023-01-26 15:23 ` Krzysztof Kozlowski
2023-01-26 15:23 ` Krzysztof Kozlowski
2023-01-26 15:30 ` Rick Wertenbroek
2023-01-26 15:30 ` Rick Wertenbroek
2023-01-26 15:30 ` Rick Wertenbroek
2023-01-26 15:43 ` Krzysztof Kozlowski
2023-01-26 15:43 ` Krzysztof Kozlowski
2023-01-26 15:43 ` Krzysztof Kozlowski
2023-01-27 8:42 ` ALOK TIWARI
2023-01-27 8:42 ` ALOK TIWARI
2023-01-27 8:42 ` ALOK TIWARI
2023-01-30 13:52 ` Rick Wertenbroek
2023-01-30 13:52 ` Rick Wertenbroek
2023-01-30 13:52 ` Rick Wertenbroek
2023-01-30 15:04 ` Rob Herring
2023-01-30 15:04 ` Rob Herring
2023-01-30 15:04 ` Rob Herring
2023-01-26 13:50 ` [PATCH 6/8] PCI: rockchip: Fixed window mapping and address translation for endpoint Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` [PATCH 7/8] PCI: rockchip: Fixed legacy IRQ generation " Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 15:25 ` Krzysztof Kozlowski
2023-01-26 15:25 ` Krzysztof Kozlowski
2023-01-26 15:25 ` Krzysztof Kozlowski
2023-01-28 9:19 ` kernel test robot
2023-01-28 9:19 ` kernel test robot
2023-01-28 9:19 ` kernel test robot
2023-01-26 13:50 ` [PATCH 8/8] PCI: rockchip: Fixed MSI generation from PCIe endpoint core Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 13:50 ` Rick Wertenbroek
2023-01-26 15:26 ` Krzysztof Kozlowski
2023-01-26 15:26 ` Krzysztof Kozlowski
2023-01-26 15:26 ` Krzysztof Kozlowski
2023-01-26 14:52 ` [PATCH 0/8] PCI: rockchip: Fix PCIe endpoint controller driver Bjorn Helgaas
2023-01-26 14:52 ` Bjorn Helgaas
2023-01-26 14:52 ` Bjorn Helgaas
2023-01-26 15:23 ` Rick Wertenbroek
2023-01-26 15:23 ` Rick Wertenbroek
2023-01-26 15:23 ` Rick Wertenbroek
2023-01-26 15:49 ` Bjorn Helgaas
2023-01-26 15:49 ` Bjorn Helgaas
2023-01-26 15:49 ` Bjorn Helgaas
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