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From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<jeeheng.sia@starfivetech.com>, <leyfoon.tan@starfivetech.com>,
	<mason.huo@starfivetech.com>
Subject: [PATCH v3 1/4] RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function
Date: Fri, 27 Jan 2023 17:10:48 +0800	[thread overview]
Message-ID: <20230127091051.1465278-2-jeeheng.sia@starfivetech.com> (raw)
In-Reply-To: <20230127091051.1465278-1-jeeheng.sia@starfivetech.com>

Currently suspend_save_csrs() and suspend_restore_csrs() functions are
statically defined in the suspend.c. Change the function's attribute
to public so that the functions can be used by hibernation as well.

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Mason Huo <mason.huo@starfivetech.com>
---
 arch/riscv/include/asm/suspend.h | 3 +++
 arch/riscv/kernel/suspend.c      | 4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h
index 8be391c2aecb..75419c5ca272 100644
--- a/arch/riscv/include/asm/suspend.h
+++ b/arch/riscv/include/asm/suspend.h
@@ -33,4 +33,7 @@ int cpu_suspend(unsigned long arg,
 /* Low-level CPU resume entry function */
 int __cpu_resume_enter(unsigned long hartid, unsigned long context);
 
+/* Used to save and restore the csr */
+void suspend_save_csrs(struct suspend_context *context);
+void suspend_restore_csrs(struct suspend_context *context);
 #endif
diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c
index 9ba24fb8cc93..3c89b8ec69c4 100644
--- a/arch/riscv/kernel/suspend.c
+++ b/arch/riscv/kernel/suspend.c
@@ -8,7 +8,7 @@
 #include <asm/csr.h>
 #include <asm/suspend.h>
 
-static void suspend_save_csrs(struct suspend_context *context)
+void suspend_save_csrs(struct suspend_context *context)
 {
 	context->scratch = csr_read(CSR_SCRATCH);
 	context->tvec = csr_read(CSR_TVEC);
@@ -29,7 +29,7 @@ static void suspend_save_csrs(struct suspend_context *context)
 #endif
 }
 
-static void suspend_restore_csrs(struct suspend_context *context)
+void suspend_restore_csrs(struct suspend_context *context)
 {
 	csr_write(CSR_SCRATCH, context->scratch);
 	csr_write(CSR_TVEC, context->tvec);
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
To: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<aou@eecs.berkeley.edu>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<jeeheng.sia@starfivetech.com>, <leyfoon.tan@starfivetech.com>,
	<mason.huo@starfivetech.com>
Subject: [PATCH v3 1/4] RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function
Date: Fri, 27 Jan 2023 17:10:48 +0800	[thread overview]
Message-ID: <20230127091051.1465278-2-jeeheng.sia@starfivetech.com> (raw)
In-Reply-To: <20230127091051.1465278-1-jeeheng.sia@starfivetech.com>

Currently suspend_save_csrs() and suspend_restore_csrs() functions are
statically defined in the suspend.c. Change the function's attribute
to public so that the functions can be used by hibernation as well.

Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Mason Huo <mason.huo@starfivetech.com>
---
 arch/riscv/include/asm/suspend.h | 3 +++
 arch/riscv/kernel/suspend.c      | 4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h
index 8be391c2aecb..75419c5ca272 100644
--- a/arch/riscv/include/asm/suspend.h
+++ b/arch/riscv/include/asm/suspend.h
@@ -33,4 +33,7 @@ int cpu_suspend(unsigned long arg,
 /* Low-level CPU resume entry function */
 int __cpu_resume_enter(unsigned long hartid, unsigned long context);
 
+/* Used to save and restore the csr */
+void suspend_save_csrs(struct suspend_context *context);
+void suspend_restore_csrs(struct suspend_context *context);
 #endif
diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c
index 9ba24fb8cc93..3c89b8ec69c4 100644
--- a/arch/riscv/kernel/suspend.c
+++ b/arch/riscv/kernel/suspend.c
@@ -8,7 +8,7 @@
 #include <asm/csr.h>
 #include <asm/suspend.h>
 
-static void suspend_save_csrs(struct suspend_context *context)
+void suspend_save_csrs(struct suspend_context *context)
 {
 	context->scratch = csr_read(CSR_SCRATCH);
 	context->tvec = csr_read(CSR_TVEC);
@@ -29,7 +29,7 @@ static void suspend_save_csrs(struct suspend_context *context)
 #endif
 }
 
-static void suspend_restore_csrs(struct suspend_context *context)
+void suspend_restore_csrs(struct suspend_context *context)
 {
 	csr_write(CSR_SCRATCH, context->scratch);
 	csr_write(CSR_TVEC, context->tvec);
-- 
2.34.1


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  reply	other threads:[~2023-01-27  9:11 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-27  9:10 [PATCH v3 0/4] RISC-V Hibernation Support Sia Jee Heng
2023-01-27  9:10 ` Sia Jee Heng
2023-01-27  9:10 ` Sia Jee Heng [this message]
2023-01-27  9:10   ` [PATCH v3 1/4] RISC-V: Change suspend_save_csrs and suspend_restore_csrs to public function Sia Jee Heng
2023-01-30 23:31   ` Conor Dooley
2023-01-30 23:31     ` Conor Dooley
2023-01-27  9:10 ` [PATCH v3 2/4] RISC-V: Factor out common code of __cpu_resume_enter() Sia Jee Heng
2023-01-27  9:10   ` Sia Jee Heng
2023-01-30 21:49   ` Conor Dooley
2023-01-30 21:49     ` Conor Dooley
2023-02-01  6:19     ` JeeHeng Sia
2023-02-01  6:19       ` JeeHeng Sia
2023-01-27  9:10 ` [PATCH v3 3/4] RISC-V: mm: Enable huge page support to kernel_page_present() function Sia Jee Heng
2023-01-27  9:10   ` Sia Jee Heng
2023-01-30 21:57   ` Conor Dooley
2023-01-30 21:57     ` Conor Dooley
2023-01-31  8:19     ` Alexandre Ghiti
2023-01-31  8:19       ` Alexandre Ghiti
2023-02-01  5:48       ` JeeHeng Sia
2023-02-01  5:48         ` JeeHeng Sia
2023-01-27  9:10 ` [PATCH v3 4/4] RISC-V: Add arch functions to support hibernation/suspend-to-disk Sia Jee Heng
2023-01-27  9:10   ` Sia Jee Heng
2023-01-30 23:30   ` Conor Dooley
2023-01-30 23:30     ` Conor Dooley
2023-01-31  9:59     ` Alexandre Ghiti
2023-01-31  9:59       ` Alexandre Ghiti
2023-02-07  4:58       ` JeeHeng Sia
2023-02-07  4:58         ` JeeHeng Sia
2023-02-07  5:27         ` Alexandre Ghiti
2023-02-07  5:27           ` Alexandre Ghiti
2023-02-02  2:43     ` JeeHeng Sia
2023-02-02  2:43       ` JeeHeng Sia
2023-02-03  3:43     ` JeeHeng Sia
2023-02-03  3:43       ` JeeHeng Sia
2023-02-03  6:30       ` Conor Dooley
2023-02-03  6:30         ` Conor Dooley
2023-02-04 20:42   ` kernel test robot
2023-02-04 20:42     ` kernel test robot
2023-02-07 15:46   ` Alexandre Ghiti
2023-02-07 15:46     ` Alexandre Ghiti
2023-02-08  4:43     ` JeeHeng Sia
2023-02-08  4:43       ` JeeHeng Sia
2023-02-08 12:04       ` Alexandre Ghiti
2023-02-08 12:04         ` Alexandre Ghiti
2023-02-09  6:12         ` JeeHeng Sia
2023-02-09  6:12           ` JeeHeng Sia
2023-02-10 13:24           ` Alexandre Ghiti
2023-02-10 13:24             ` Alexandre Ghiti
2023-02-13  1:51             ` JeeHeng Sia
2023-02-13  1:51               ` JeeHeng Sia
2023-02-14  6:57               ` Alexandre Ghiti
2023-02-14  6:57                 ` Alexandre Ghiti

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