* [PATCH 1/2] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
@ 2023-01-31 9:24 Dmitry Baryshkov
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
2023-01-31 20:58 ` [PATCH 1/2] clk: qcom: gpucc-sc7180: " Stephen Boyd
0 siblings, 2 replies; 6+ messages in thread
From: Dmitry Baryshkov @ 2023-01-31 9:24 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Taniya Das
Cc: linux-arm-msm, linux-clk
The gdsc_init() function will rewrite the CLK_DIS_WAIT field while
registering the GDSC (writing the value 0x2 by default). This will
override the setting done in the driver's probe function.
Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe
function.
Fixes: 745ff069a49c ("clk: qcom: Add graphics clock controller driver for SC7180")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gpucc-sc7180.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/clk/qcom/gpucc-sc7180.c b/drivers/clk/qcom/gpucc-sc7180.c
index c0b2c7af5f93..3f92f0b43be6 100644
--- a/drivers/clk/qcom/gpucc-sc7180.c
+++ b/drivers/clk/qcom/gpucc-sc7180.c
@@ -21,8 +21,6 @@
#define CX_GMU_CBCR_SLEEP_SHIFT 4
#define CX_GMU_CBCR_WAKE_MASK 0xF
#define CX_GMU_CBCR_WAKE_SHIFT 8
-#define CLK_DIS_WAIT_SHIFT 12
-#define CLK_DIS_WAIT_MASK (0xf << CLK_DIS_WAIT_SHIFT)
enum {
P_BI_TCXO,
@@ -160,6 +158,7 @@ static struct clk_branch gpu_cc_cxo_clk = {
static struct gdsc cx_gdsc = {
.gdscr = 0x106c,
.gds_hw_ctrl = 0x1540,
+ .clk_dis_wait_val = 8,
.pd = {
.name = "cx_gdsc",
},
@@ -242,10 +241,6 @@ static int gpu_cc_sc7180_probe(struct platform_device *pdev)
value = 0xF << CX_GMU_CBCR_WAKE_SHIFT | 0xF << CX_GMU_CBCR_SLEEP_SHIFT;
regmap_update_bits(regmap, 0x1098, mask, value);
- /* Configure clk_dis_wait for gpu_cx_gdsc */
- regmap_update_bits(regmap, 0x106c, CLK_DIS_WAIT_MASK,
- 8 << CLK_DIS_WAIT_SHIFT);
-
return qcom_cc_really_probe(pdev, &gpu_cc_sc7180_desc, regmap);
}
--
2.39.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
2023-01-31 9:24 [PATCH 1/2] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC Dmitry Baryshkov
@ 2023-01-31 9:24 ` Dmitry Baryshkov
2023-01-31 19:19 ` kernel test robot
` (2 more replies)
2023-01-31 20:58 ` [PATCH 1/2] clk: qcom: gpucc-sc7180: " Stephen Boyd
1 sibling, 3 replies; 6+ messages in thread
From: Dmitry Baryshkov @ 2023-01-31 9:24 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Stephen Boyd,
Michael Turquette, Taniya Das
Cc: linux-arm-msm, linux-clk
The gdsc_init() function will rewrite the CLK_DIS_WAIT field while
registering the GDSC (writing the value 0x2 by default). This will
override the setting done in the driver's probe function.
Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe
function.
Fixes: 453361cdd757 ("clk: qcom: Add graphics clock controller driver for SDM845")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/clk/qcom/gpucc-sdm845.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/clk/qcom/gpucc-sdm845.c b/drivers/clk/qcom/gpucc-sdm845.c
index 622a54a67d32..c51feb556f41 100644
--- a/drivers/clk/qcom/gpucc-sdm845.c
+++ b/drivers/clk/qcom/gpucc-sdm845.c
@@ -22,8 +22,6 @@
#define CX_GMU_CBCR_SLEEP_SHIFT 4
#define CX_GMU_CBCR_WAKE_MASK 0xf
#define CX_GMU_CBCR_WAKE_SHIFT 8
-#define CLK_DIS_WAIT_SHIFT 12
-#define CLK_DIS_WAIT_MASK (0xf << CLK_DIS_WAIT_SHIFT)
enum {
P_BI_TCXO,
@@ -121,6 +119,7 @@ static struct clk_branch gpu_cc_cxo_clk = {
static struct gdsc gpu_cx_gdsc = {
.gdscr = 0x106c,
.gds_hw_ctrl = 0x1540,
+ .clk_dis_wait = 0x8,
.pd = {
.name = "gpu_cx_gdsc",
},
@@ -193,10 +192,6 @@ static int gpu_cc_sdm845_probe(struct platform_device *pdev)
value = 0xf << CX_GMU_CBCR_WAKE_SHIFT | 0xf << CX_GMU_CBCR_SLEEP_SHIFT;
regmap_update_bits(regmap, 0x1098, mask, value);
- /* Configure clk_dis_wait for gpu_cx_gdsc */
- regmap_update_bits(regmap, 0x106c, CLK_DIS_WAIT_MASK,
- 8 << CLK_DIS_WAIT_SHIFT);
-
return qcom_cc_really_probe(pdev, &gpu_cc_sdm845_desc, regmap);
}
--
2.39.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
@ 2023-01-31 19:19 ` kernel test robot
2023-01-31 20:59 ` Stephen Boyd
2023-01-31 22:33 ` kernel test robot
2 siblings, 0 replies; 6+ messages in thread
From: kernel test robot @ 2023-01-31 19:19 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Stephen Boyd, Michael Turquette, Taniya Das
Cc: oe-kbuild-all, linux-arm-msm, linux-clk
Hi Dmitry,
I love your patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on linus/master v6.2-rc6 next-20230131]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Dmitry-Baryshkov/clk-qcom-gpucc-sdm845-fix-clk_dis_wait-being-programmed-for-CX-GDSC/20230131-172656
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20230131092432.122711-2-dmitry.baryshkov%40linaro.org
patch subject: [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
config: arm-randconfig-r046-20230130 (https://download.01.org/0day-ci/archive/20230201/202302010346.2R8hxnlM-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/8222d81144cbdf9b51ffe1ffc61e16b471456329
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Dmitry-Baryshkov/clk-qcom-gpucc-sdm845-fix-clk_dis_wait-being-programmed-for-CX-GDSC/20230131-172656
git checkout 8222d81144cbdf9b51ffe1ffc61e16b471456329
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/clk/qcom/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/clk/qcom/gpucc-sdm845.c:122:10: error: 'struct gdsc' has no member named 'clk_dis_wait'; did you mean 'clk_dis_wait_val'?
122 | .clk_dis_wait = 0x8,
| ^~~~~~~~~~~~
| clk_dis_wait_val
vim +122 drivers/clk/qcom/gpucc-sdm845.c
118
119 static struct gdsc gpu_cx_gdsc = {
120 .gdscr = 0x106c,
121 .gds_hw_ctrl = 0x1540,
> 122 .clk_dis_wait = 0x8,
123 .pd = {
124 .name = "gpu_cx_gdsc",
125 },
126 .pwrsts = PWRSTS_OFF_ON,
127 .flags = VOTABLE,
128 };
129
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
2023-01-31 9:24 [PATCH 1/2] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC Dmitry Baryshkov
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
@ 2023-01-31 20:58 ` Stephen Boyd
1 sibling, 0 replies; 6+ messages in thread
From: Stephen Boyd @ 2023-01-31 20:58 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Michael Turquette, Taniya Das
Cc: linux-arm-msm, linux-clk
Quoting Dmitry Baryshkov (2023-01-31 01:24:31)
> The gdsc_init() function will rewrite the CLK_DIS_WAIT field while
> registering the GDSC (writing the value 0x2 by default). This will
> override the setting done in the driver's probe function.
>
> Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe
> function.
>
> Fixes: 745ff069a49c ("clk: qcom: Add graphics clock controller driver for SC7180")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
2023-01-31 19:19 ` kernel test robot
@ 2023-01-31 20:59 ` Stephen Boyd
2023-01-31 22:33 ` kernel test robot
2 siblings, 0 replies; 6+ messages in thread
From: Stephen Boyd @ 2023-01-31 20:59 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Dmitry Baryshkov, Konrad Dybcio,
Michael Turquette, Taniya Das
Cc: linux-arm-msm, linux-clk
Quoting Dmitry Baryshkov (2023-01-31 01:24:32)
> The gdsc_init() function will rewrite the CLK_DIS_WAIT field while
> registering the GDSC (writing the value 0x2 by default). This will
> override the setting done in the driver's probe function.
>
> Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe
> function.
>
> Fixes: 453361cdd757 ("clk: qcom: Add graphics clock controller driver for SDM845")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
With the _val postfix
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
2023-01-31 19:19 ` kernel test robot
2023-01-31 20:59 ` Stephen Boyd
@ 2023-01-31 22:33 ` kernel test robot
2 siblings, 0 replies; 6+ messages in thread
From: kernel test robot @ 2023-01-31 22:33 UTC (permalink / raw)
To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Konrad Dybcio,
Stephen Boyd, Michael Turquette, Taniya Das
Cc: llvm, oe-kbuild-all, linux-arm-msm, linux-clk
Hi Dmitry,
I love your patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on linus/master v6.2-rc6 next-20230131]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Dmitry-Baryshkov/clk-qcom-gpucc-sdm845-fix-clk_dis_wait-being-programmed-for-CX-GDSC/20230131-172656
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link: https://lore.kernel.org/r/20230131092432.122711-2-dmitry.baryshkov%40linaro.org
patch subject: [PATCH 2/2] clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC
config: arm64-randconfig-r016-20230130 (https://download.01.org/0day-ci/archive/20230201/202302010608.GDyw4Xuo-lkp@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 4196ca3278f78c6e19246e54ab0ecb364e37d66a)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm64 cross compiling tool for clang build
# apt-get install binutils-aarch64-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/8222d81144cbdf9b51ffe1ffc61e16b471456329
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Dmitry-Baryshkov/clk-qcom-gpucc-sdm845-fix-clk_dis_wait-being-programmed-for-CX-GDSC/20230131-172656
git checkout 8222d81144cbdf9b51ffe1ffc61e16b471456329
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/clk/qcom/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/clk/qcom/gpucc-sdm845.c:122:3: error: field designator 'clk_dis_wait' does not refer to any field in type 'struct gdsc'; did you mean 'clk_dis_wait_val'?
.clk_dis_wait = 0x8,
^~~~~~~~~~~~
clk_dis_wait_val
drivers/clk/qcom/gdsc.h:47:17: note: 'clk_dis_wait_val' declared here
unsigned int clk_dis_wait_val;
^
1 error generated.
vim +122 drivers/clk/qcom/gpucc-sdm845.c
118
119 static struct gdsc gpu_cx_gdsc = {
120 .gdscr = 0x106c,
121 .gds_hw_ctrl = 0x1540,
> 122 .clk_dis_wait = 0x8,
123 .pd = {
124 .name = "gpu_cx_gdsc",
125 },
126 .pwrsts = PWRSTS_OFF_ON,
127 .flags = VOTABLE,
128 };
129
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-01-31 22:34 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-31 9:24 [PATCH 1/2] clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC Dmitry Baryshkov
2023-01-31 9:24 ` [PATCH 2/2] clk: qcom: gpucc-sdm845: " Dmitry Baryshkov
2023-01-31 19:19 ` kernel test robot
2023-01-31 20:59 ` Stephen Boyd
2023-01-31 22:33 ` kernel test robot
2023-01-31 20:58 ` [PATCH 1/2] clk: qcom: gpucc-sc7180: " Stephen Boyd
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