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* [PATCH] drm: Rename headers to match DP2.1 spec
@ 2023-02-06 19:37 ` jdhillon
  0 siblings, 0 replies; 4+ messages in thread
From: jdhillon @ 2023-02-06 19:37 UTC (permalink / raw)
  To: amd-gfx
  Cc: Leo Li, Rodrigo Siqueira, dri-devel, Jonathan Hunter,
	Thierry Reding, Jasdeep Dhillon, Alex Deucher,
	Christian König

This patch changes the headers defined in drm_dp.h to match
the DP 2.1 spec.

Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
---
 drivers/gpu/drm/tegra/dp.c   |  2 +-
 include/drm/display/drm_dp.h | 13 +++++++------
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
index 08fbd8f151a1..f33e468ece0a 100644
--- a/drivers/gpu/drm/tegra/dp.c
+++ b/drivers/gpu/drm/tegra/dp.c
@@ -499,7 +499,7 @@ static int drm_dp_link_apply_training(struct drm_dp_link *link)
 		for (i = 0; i < lanes; i++)
 			values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
 
-		err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
+		err = drm_dp_dpcd_write(aux, DP_LINK_SQUARE_PATTERN, values,
 					DIV_ROUND_UP(lanes, 2));
 		if (err < 0) {
 			DRM_ERROR("failed to set post-cursor: %d\n", err);
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index ed10e6b6f99d..2093c1f8d8e0 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -641,12 +641,11 @@
 # define DP_LINK_QUAL_PATTERN_CUSTOM        0x40
 # define DP_LINK_QUAL_PATTERN_SQUARE        0x48
 
-#define DP_TRAINING_LANE0_1_SET2	    0x10f
-#define DP_TRAINING_LANE2_3_SET2	    0x110
-# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
-# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
-# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
-# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+#define DP_LINK_SQUARE_PATTERN				0x10f
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPTX	0x110
+# define DP_UHBR10_20_CAPABILITY			(3 << 0)
+# define DP_UHBR13_5_CAPABILITY				(1 << 2)
+# define DP_CABLE_TYPE						(7 << 3)
 
 #define DP_MSTM_CTRL			    0x111   /* 1.2 */
 # define DP_MST_EN			    (1 << 0)
@@ -1127,6 +1126,8 @@
 # define DP_128B132B_TRAINING_AUX_RD_INTERVAL_32_MS             0x05
 # define DP_128B132B_TRAINING_AUX_RD_INTERVAL_64_MS             0x06
 
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPRX					0x2217 /* 2.0 */
+
 #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0		0x2230
 #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256	0x2250
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH] drm: Rename headers to match DP2.1 spec
@ 2023-02-06 19:37 ` jdhillon
  0 siblings, 0 replies; 4+ messages in thread
From: jdhillon @ 2023-02-06 19:37 UTC (permalink / raw)
  To: amd-gfx
  Cc: Leo Li,  Harry Wentland, Rodrigo Siqueira, dri-devel,
	Jonathan Hunter, Thierry Reding, Daniel Vetter, Jasdeep Dhillon,
	Alex Deucher, David Airlie, Christian König

This patch changes the headers defined in drm_dp.h to match
the DP 2.1 spec.

Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
---
 drivers/gpu/drm/tegra/dp.c   |  2 +-
 include/drm/display/drm_dp.h | 13 +++++++------
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
index 08fbd8f151a1..f33e468ece0a 100644
--- a/drivers/gpu/drm/tegra/dp.c
+++ b/drivers/gpu/drm/tegra/dp.c
@@ -499,7 +499,7 @@ static int drm_dp_link_apply_training(struct drm_dp_link *link)
 		for (i = 0; i < lanes; i++)
 			values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
 
-		err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
+		err = drm_dp_dpcd_write(aux, DP_LINK_SQUARE_PATTERN, values,
 					DIV_ROUND_UP(lanes, 2));
 		if (err < 0) {
 			DRM_ERROR("failed to set post-cursor: %d\n", err);
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index ed10e6b6f99d..2093c1f8d8e0 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -641,12 +641,11 @@
 # define DP_LINK_QUAL_PATTERN_CUSTOM        0x40
 # define DP_LINK_QUAL_PATTERN_SQUARE        0x48
 
-#define DP_TRAINING_LANE0_1_SET2	    0x10f
-#define DP_TRAINING_LANE2_3_SET2	    0x110
-# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
-# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
-# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
-# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+#define DP_LINK_SQUARE_PATTERN				0x10f
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPTX	0x110
+# define DP_UHBR10_20_CAPABILITY			(3 << 0)
+# define DP_UHBR13_5_CAPABILITY				(1 << 2)
+# define DP_CABLE_TYPE						(7 << 3)
 
 #define DP_MSTM_CTRL			    0x111   /* 1.2 */
 # define DP_MST_EN			    (1 << 0)
@@ -1127,6 +1126,8 @@
 # define DP_128B132B_TRAINING_AUX_RD_INTERVAL_32_MS             0x05
 # define DP_128B132B_TRAINING_AUX_RD_INTERVAL_64_MS             0x06
 
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPRX					0x2217 /* 2.0 */
+
 #define DP_TEST_264BIT_CUSTOM_PATTERN_7_0		0x2230
 #define DP_TEST_264BIT_CUSTOM_PATTERN_263_256	0x2250
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm: Rename headers to match DP2.1 spec
  2023-02-06 19:37 ` jdhillon
@ 2023-02-08 12:05   ` Thierry Reding
  -1 siblings, 0 replies; 4+ messages in thread
From: Thierry Reding @ 2023-02-08 12:05 UTC (permalink / raw)
  To: jdhillon
  Cc: Leo Li, Rodrigo Siqueira, amd-gfx, Jonathan Hunter, dri-devel,
	Alex Deucher, Christian König

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On Mon, Feb 06, 2023 at 02:37:08PM -0500, jdhillon wrote:
> This patch changes the headers defined in drm_dp.h to match
> the DP 2.1 spec.
> 
> Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
> ---
>  drivers/gpu/drm/tegra/dp.c   |  2 +-
>  include/drm/display/drm_dp.h | 13 +++++++------
>  2 files changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
> index 08fbd8f151a1..f33e468ece0a 100644
> --- a/drivers/gpu/drm/tegra/dp.c
> +++ b/drivers/gpu/drm/tegra/dp.c
> @@ -499,7 +499,7 @@ static int drm_dp_link_apply_training(struct drm_dp_link *link)
>  		for (i = 0; i < lanes; i++)
>  			values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
>  
> -		err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
> +		err = drm_dp_dpcd_write(aux, DP_LINK_SQUARE_PATTERN, values,
>  					DIV_ROUND_UP(lanes, 2));
>  		if (err < 0) {
>  			DRM_ERROR("failed to set post-cursor: %d\n", err);
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index ed10e6b6f99d..2093c1f8d8e0 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -641,12 +641,11 @@
>  # define DP_LINK_QUAL_PATTERN_CUSTOM        0x40
>  # define DP_LINK_QUAL_PATTERN_SQUARE        0x48
>  
> -#define DP_TRAINING_LANE0_1_SET2	    0x10f
> -#define DP_TRAINING_LANE2_3_SET2	    0x110
> -# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
> -# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
> -# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
> -# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
> +#define DP_LINK_SQUARE_PATTERN				0x10f

I think it'd be better to add new definitions for these rather than
replace the existing ones. DP v1.2 calls these TRAINING_LANE0_1_SET2 and
TRAINING_LANE2_3_SET2, respectively, so within the context of DP v1.2
hardware the new names don't make any sense.

While at it, maybe add a comment to the new definitions that the old
ones were deprecated in DP v1.3 and have been repurposed in v2.0 and
v2.1, respectively.

Thierry

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^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm: Rename headers to match DP2.1 spec
@ 2023-02-08 12:05   ` Thierry Reding
  0 siblings, 0 replies; 4+ messages in thread
From: Thierry Reding @ 2023-02-08 12:05 UTC (permalink / raw)
  To: jdhillon
  Cc: Leo Li, David Airlie, Rodrigo Siqueira, amd-gfx, Jonathan Hunter,
	dri-devel, Daniel Vetter, Alex Deucher,  Harry Wentland,
	Christian König

[-- Attachment #1: Type: text/plain, Size: 2106 bytes --]

On Mon, Feb 06, 2023 at 02:37:08PM -0500, jdhillon wrote:
> This patch changes the headers defined in drm_dp.h to match
> the DP 2.1 spec.
> 
> Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
> ---
>  drivers/gpu/drm/tegra/dp.c   |  2 +-
>  include/drm/display/drm_dp.h | 13 +++++++------
>  2 files changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
> index 08fbd8f151a1..f33e468ece0a 100644
> --- a/drivers/gpu/drm/tegra/dp.c
> +++ b/drivers/gpu/drm/tegra/dp.c
> @@ -499,7 +499,7 @@ static int drm_dp_link_apply_training(struct drm_dp_link *link)
>  		for (i = 0; i < lanes; i++)
>  			values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
>  
> -		err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
> +		err = drm_dp_dpcd_write(aux, DP_LINK_SQUARE_PATTERN, values,
>  					DIV_ROUND_UP(lanes, 2));
>  		if (err < 0) {
>  			DRM_ERROR("failed to set post-cursor: %d\n", err);
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index ed10e6b6f99d..2093c1f8d8e0 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -641,12 +641,11 @@
>  # define DP_LINK_QUAL_PATTERN_CUSTOM        0x40
>  # define DP_LINK_QUAL_PATTERN_SQUARE        0x48
>  
> -#define DP_TRAINING_LANE0_1_SET2	    0x10f
> -#define DP_TRAINING_LANE2_3_SET2	    0x110
> -# define DP_LANE02_POST_CURSOR2_SET_MASK    (3 << 0)
> -# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
> -# define DP_LANE13_POST_CURSOR2_SET_MASK    (3 << 4)
> -# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
> +#define DP_LINK_SQUARE_PATTERN				0x10f

I think it'd be better to add new definitions for these rather than
replace the existing ones. DP v1.2 calls these TRAINING_LANE0_1_SET2 and
TRAINING_LANE2_3_SET2, respectively, so within the context of DP v1.2
hardware the new names don't make any sense.

While at it, maybe add a comment to the new definitions that the old
ones were deprecated in DP v1.3 and have been repurposed in v2.0 and
v2.1, respectively.

Thierry

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^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-02-08 12:05 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-06 19:37 [PATCH] drm: Rename headers to match DP2.1 spec jdhillon
2023-02-06 19:37 ` jdhillon
2023-02-08 12:05 ` Thierry Reding
2023-02-08 12:05   ` Thierry Reding

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