* [PATCH 1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
Instead of resource->start use the cursor to get this.
v2 (chk): remove changes to amdgpu_bo_gpu_offset_no_check(), that
won't work with the AGP aperture otherwise.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++++--
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 +++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 2cd081cbf706..f62e5398e620 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -845,6 +845,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(ttm);
+ struct amdgpu_res_cursor cursor;
uint64_t flags;
int r;
@@ -892,7 +893,8 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem);
/* bind pages into GART page tables */
- gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
+ amdgpu_res_first(bo_mem, 0, bo_mem->size, &cursor);
+ gtt->offset = cursor.start;
amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,
gtt->ttm.dma_address, flags);
gtt->bound = true;
@@ -912,6 +914,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
struct ttm_operation_ctx ctx = { false, false };
struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(bo->ttm);
+ struct amdgpu_res_cursor cursor;
struct ttm_placement placement;
struct ttm_place placements;
struct ttm_resource *tmp;
@@ -945,7 +948,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, tmp);
/* Bind pages */
- gtt->offset = (u64)tmp->start << PAGE_SHIFT;
+ amdgpu_res_first(tmp, 0, tmp->size, &cursor);
+ gtt->offset = cursor.start;
amdgpu_ttm_gart_bind(adev, bo, flags);
amdgpu_gart_invalidate_tlb(adev);
ttm_resource_free(bo, &bo->resource);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index c06ada0844ba..9114393d2ee6 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -200,8 +200,12 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
queue_input.wptr_addr = (uint64_t)q->properties.write_ptr;
if (q->wptr_bo) {
+ struct amdgpu_res_cursor cursor;
+
wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1);
- queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off;
+ amdgpu_res_first(q->wptr_bo->tbo.resource, 0,
+ q->wptr_bo->tbo.resource->size, &cursor);
+ queue_input.wptr_mc_addr = cursor.start + wptr_addr_off;
}
queue_input.is_kfd_process = 1;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
Instead of resource->start use the cursor to get this.
v2 (chk): remove changes to amdgpu_bo_gpu_offset_no_check(), that
won't work with the AGP aperture otherwise.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++++--
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6 +++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 2cd081cbf706..f62e5398e620 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -845,6 +845,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bdev);
struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(ttm);
+ struct amdgpu_res_cursor cursor;
uint64_t flags;
int r;
@@ -892,7 +893,8 @@ static int amdgpu_ttm_backend_bind(struct ttm_device *bdev,
flags = amdgpu_ttm_tt_pte_flags(adev, ttm, bo_mem);
/* bind pages into GART page tables */
- gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
+ amdgpu_res_first(bo_mem, 0, bo_mem->size, &cursor);
+ gtt->offset = cursor.start;
amdgpu_gart_bind(adev, gtt->offset, ttm->num_pages,
gtt->ttm.dma_address, flags);
gtt->bound = true;
@@ -912,6 +914,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
struct ttm_operation_ctx ctx = { false, false };
struct amdgpu_ttm_tt *gtt = ttm_to_amdgpu_ttm_tt(bo->ttm);
+ struct amdgpu_res_cursor cursor;
struct ttm_placement placement;
struct ttm_place placements;
struct ttm_resource *tmp;
@@ -945,7 +948,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
flags = amdgpu_ttm_tt_pte_flags(adev, bo->ttm, tmp);
/* Bind pages */
- gtt->offset = (u64)tmp->start << PAGE_SHIFT;
+ amdgpu_res_first(tmp, 0, tmp->size, &cursor);
+ gtt->offset = cursor.start;
amdgpu_ttm_gart_bind(adev, bo, flags);
amdgpu_gart_invalidate_tlb(adev);
ttm_resource_free(bo, &bo->resource);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index c06ada0844ba..9114393d2ee6 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -200,8 +200,12 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
queue_input.wptr_addr = (uint64_t)q->properties.write_ptr;
if (q->wptr_bo) {
+ struct amdgpu_res_cursor cursor;
+
wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1);
- queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off;
+ amdgpu_res_first(q->wptr_bo->tbo.resource, 0,
+ q->wptr_bo->tbo.resource->size, &cursor);
+ queue_input.wptr_mc_addr = cursor.start + wptr_addr_off;
}
queue_input.is_kfd_process = 1;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/7] drm/ttm: Change the parameters of ttm_range_man_init() from pages to bytes
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the parameters of ttm_range_man_init_nocheck()
size from page size to byte size.
Cleanup the PAGE_SHIFT operation on the depended caller functions.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/drm_gem_vram_helper.c | 2 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 4 ++--
drivers/gpu/drm/ttm/ttm_range_manager.c | 8 ++++----
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +-
include/drm/ttm/ttm_range_manager.h | 6 +++---
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index f62e5398e620..77c2da886f5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -75,10 +75,10 @@ static void amdgpu_ttm_backend_unbind(struct ttm_device *bdev,
static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
unsigned int type,
- uint64_t size_in_page)
+ uint64_t size)
{
return ttm_range_man_init(&adev->mman.bdev, type,
- false, size_in_page);
+ false, size << PAGE_SHIFT);
}
/**
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c
index d40b3edb52d0..f70d11e1cd47 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -999,7 +999,7 @@ static int drm_vram_mm_init(struct drm_vram_mm *vmm, struct drm_device *dev,
return ret;
ret = ttm_range_man_init(&vmm->bdev, TTM_PL_VRAM,
- false, vram_size >> PAGE_SHIFT);
+ false, vram_size);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 67075c85f847..78dd6a87fb65 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -70,13 +70,13 @@ struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
static int radeon_ttm_init_vram(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
- false, rdev->mc.real_vram_size >> PAGE_SHIFT);
+ false, rdev->mc.real_vram_size);
}
static int radeon_ttm_init_gtt(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
- true, rdev->mc.gtt_size >> PAGE_SHIFT);
+ true, rdev->mc.gtt_size);
}
static void radeon_evict_flags(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index ae11d07eb63a..62fddcc59f02 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -169,7 +169,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = {
* @bdev: ttm device
* @type: memory manager type
* @use_tt: if the memory manager uses tt
- * @p_size: size of area to be managed in pages.
+ * @size: size of area to be managed in bytes.
*
* The range manager is installed for this device in the type slot.
*
@@ -177,7 +177,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = {
*/
int ttm_range_man_init_nocheck(struct ttm_device *bdev,
unsigned type, bool use_tt,
- unsigned long p_size)
+ u64 size)
{
struct ttm_resource_manager *man;
struct ttm_range_manager *rman;
@@ -191,9 +191,9 @@ int ttm_range_man_init_nocheck(struct ttm_device *bdev,
man->func = &ttm_range_manager_func;
- ttm_resource_manager_init(man, bdev, p_size);
+ ttm_resource_manager_init(man, bdev, size);
- drm_mm_init(&rman->mm, 0, p_size);
+ drm_mm_init(&rman->mm, 0, size);
spin_lock_init(&rman->lock);
ttm_set_driver_manager(bdev, type, &rman->manager);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 2588615a2a38..18cf4edea197 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -706,7 +706,7 @@ static int vmw_vram_manager_init(struct vmw_private *dev_priv)
{
int ret;
ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM, false,
- dev_priv->vram_size >> PAGE_SHIFT);
+ dev_priv->vram_size);
ttm_resource_manager_set_used(ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM), false);
return ret;
}
diff --git a/include/drm/ttm/ttm_range_manager.h b/include/drm/ttm/ttm_range_manager.h
index 7963b957e9ef..05bffded1b53 100644
--- a/include/drm/ttm/ttm_range_manager.h
+++ b/include/drm/ttm/ttm_range_manager.h
@@ -36,15 +36,15 @@ to_ttm_range_mgr_node(struct ttm_resource *res)
int ttm_range_man_init_nocheck(struct ttm_device *bdev,
unsigned type, bool use_tt,
- unsigned long p_size);
+ u64 size);
int ttm_range_man_fini_nocheck(struct ttm_device *bdev,
unsigned type);
static __always_inline int ttm_range_man_init(struct ttm_device *bdev,
unsigned int type, bool use_tt,
- unsigned long p_size)
+ u64 size)
{
BUILD_BUG_ON(__builtin_constant_p(type) && type >= TTM_NUM_MEM_TYPES);
- return ttm_range_man_init_nocheck(bdev, type, use_tt, p_size);
+ return ttm_range_man_init_nocheck(bdev, type, use_tt, size);
}
static __always_inline int ttm_range_man_fini(struct ttm_device *bdev,
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 2/7] drm/ttm: Change the parameters of ttm_range_man_init() from pages to bytes
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the parameters of ttm_range_man_init_nocheck()
size from page size to byte size.
Cleanup the PAGE_SHIFT operation on the depended caller functions.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/drm_gem_vram_helper.c | 2 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 4 ++--
drivers/gpu/drm/ttm/ttm_range_manager.c | 8 ++++----
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 2 +-
include/drm/ttm/ttm_range_manager.h | 6 +++---
6 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index f62e5398e620..77c2da886f5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -75,10 +75,10 @@ static void amdgpu_ttm_backend_unbind(struct ttm_device *bdev,
static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
unsigned int type,
- uint64_t size_in_page)
+ uint64_t size)
{
return ttm_range_man_init(&adev->mman.bdev, type,
- false, size_in_page);
+ false, size << PAGE_SHIFT);
}
/**
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c
index d40b3edb52d0..f70d11e1cd47 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -999,7 +999,7 @@ static int drm_vram_mm_init(struct drm_vram_mm *vmm, struct drm_device *dev,
return ret;
ret = ttm_range_man_init(&vmm->bdev, TTM_PL_VRAM,
- false, vram_size >> PAGE_SHIFT);
+ false, vram_size);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 67075c85f847..78dd6a87fb65 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -70,13 +70,13 @@ struct radeon_device *radeon_get_rdev(struct ttm_device *bdev)
static int radeon_ttm_init_vram(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
- false, rdev->mc.real_vram_size >> PAGE_SHIFT);
+ false, rdev->mc.real_vram_size);
}
static int radeon_ttm_init_gtt(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
- true, rdev->mc.gtt_size >> PAGE_SHIFT);
+ true, rdev->mc.gtt_size);
}
static void radeon_evict_flags(struct ttm_buffer_object *bo,
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index ae11d07eb63a..62fddcc59f02 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -169,7 +169,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = {
* @bdev: ttm device
* @type: memory manager type
* @use_tt: if the memory manager uses tt
- * @p_size: size of area to be managed in pages.
+ * @size: size of area to be managed in bytes.
*
* The range manager is installed for this device in the type slot.
*
@@ -177,7 +177,7 @@ static const struct ttm_resource_manager_func ttm_range_manager_func = {
*/
int ttm_range_man_init_nocheck(struct ttm_device *bdev,
unsigned type, bool use_tt,
- unsigned long p_size)
+ u64 size)
{
struct ttm_resource_manager *man;
struct ttm_range_manager *rman;
@@ -191,9 +191,9 @@ int ttm_range_man_init_nocheck(struct ttm_device *bdev,
man->func = &ttm_range_manager_func;
- ttm_resource_manager_init(man, bdev, p_size);
+ ttm_resource_manager_init(man, bdev, size);
- drm_mm_init(&rman->mm, 0, p_size);
+ drm_mm_init(&rman->mm, 0, size);
spin_lock_init(&rman->lock);
ttm_set_driver_manager(bdev, type, &rman->manager);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 2588615a2a38..18cf4edea197 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -706,7 +706,7 @@ static int vmw_vram_manager_init(struct vmw_private *dev_priv)
{
int ret;
ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM, false,
- dev_priv->vram_size >> PAGE_SHIFT);
+ dev_priv->vram_size);
ttm_resource_manager_set_used(ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM), false);
return ret;
}
diff --git a/include/drm/ttm/ttm_range_manager.h b/include/drm/ttm/ttm_range_manager.h
index 7963b957e9ef..05bffded1b53 100644
--- a/include/drm/ttm/ttm_range_manager.h
+++ b/include/drm/ttm/ttm_range_manager.h
@@ -36,15 +36,15 @@ to_ttm_range_mgr_node(struct ttm_resource *res)
int ttm_range_man_init_nocheck(struct ttm_device *bdev,
unsigned type, bool use_tt,
- unsigned long p_size);
+ u64 size);
int ttm_range_man_fini_nocheck(struct ttm_device *bdev,
unsigned type);
static __always_inline int ttm_range_man_init(struct ttm_device *bdev,
unsigned int type, bool use_tt,
- unsigned long p_size)
+ u64 size)
{
BUILD_BUG_ON(__builtin_constant_p(type) && type >= TTM_NUM_MEM_TYPES);
- return ttm_range_man_init_nocheck(bdev, type, use_tt, p_size);
+ return ttm_range_man_init_nocheck(bdev, type, use_tt, size);
}
static __always_inline int ttm_range_man_fini(struct ttm_device *bdev,
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/7] drm/ttm: Change the meaning of the fields in the drm_mm_nodes structure from pfn to bytes v3
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the ttm_range_man_alloc() allocation from pages to size in bytes.
Fix the dependent drm_mm_nodes start and size from pages to bytes.
v2 (chk): Change the drm_mm_node usage in amdgpu as well. re-order the
patch to be independent of the resource->start change.
v3 (chk): add some more missing u64 casts
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 15 ++++++------
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 8 +++----
drivers/gpu/drm/i915/i915_scatterlist.c | 6 ++---
drivers/gpu/drm/ttm/ttm_range_manager.c | 24 +++++++++----------
4 files changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 44367f03316f..d66b5fcbadf2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -116,7 +116,6 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
struct ttm_resource **res)
{
struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
- uint32_t num_pages = PFN_UP(tbo->base.size);
struct ttm_range_mgr_node *node;
int r;
@@ -134,17 +133,19 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (place->lpfn) {
spin_lock(&mgr->lock);
r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
- num_pages, tbo->page_alignment,
- 0, place->fpfn, place->lpfn,
+ tbo->base.size,
+ tbo->page_alignment << PAGE_SHIFT, 0,
+ (u64)place->fpfn << PAGE_SHIFT,
+ (u64)place->lpfn << PAGE_SHIFT,
DRM_MM_INSERT_BEST);
spin_unlock(&mgr->lock);
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
} else {
node->mm_nodes[0].start = 0;
- node->mm_nodes[0].size = PFN_UP(node->base.size);
+ node->mm_nodes[0].size = node->base.size;
node->base.start = AMDGPU_BO_INVALID_OFFSET;
}
@@ -285,8 +286,8 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size)
ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size);
- start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
- size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
+ start = (AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS) << PAGE_SHIFT;
+ size = adev->gmc.gart_size - start;
drm_mm_init(&mgr->mm, start, size);
spin_lock_init(&mgr->lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 5c4f93ee0c57..5c78f0b09351 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -94,8 +94,8 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
while (start >= node->size << PAGE_SHIFT)
start -= node++->size << PAGE_SHIFT;
- cur->start = (node->start << PAGE_SHIFT) + start;
- cur->size = min((node->size << PAGE_SHIFT) - start, size);
+ cur->start = node->start + start;
+ cur->size = min(node->size - start, size);
cur->remaining = size;
cur->node = node;
break;
@@ -155,8 +155,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
node = cur->node;
cur->node = ++node;
- cur->start = node->start << PAGE_SHIFT;
- cur->size = min(node->size << PAGE_SHIFT, cur->remaining);
+ cur->start = node->start;
+ cur->size = min(node->size, cur->remaining);
break;
default:
return;
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c b/drivers/gpu/drm/i915/i915_scatterlist.c
index 756289e43dff..7defda1219d0 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.c
+++ b/drivers/gpu/drm/i915/i915_scatterlist.c
@@ -94,7 +94,7 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
if (!rsgt)
return ERR_PTR(-ENOMEM);
- i915_refct_sgt_init(rsgt, node->size << PAGE_SHIFT);
+ i915_refct_sgt_init(rsgt, node->size);
st = &rsgt->table;
/* restricted by sg_alloc_table */
if (WARN_ON(overflows_type(DIV_ROUND_UP_ULL(node->size, segment_pages),
@@ -110,8 +110,8 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
sg = st->sgl;
st->nents = 0;
prev_end = (resource_size_t)-1;
- block_size = node->size << PAGE_SHIFT;
- offset = node->start << PAGE_SHIFT;
+ block_size = node->size;
+ offset = node->start;
while (block_size) {
u64 len;
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index 62fddcc59f02..b8cb72432a2a 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -64,10 +64,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
struct ttm_range_mgr_node *node;
struct drm_mm *mm = &rman->mm;
enum drm_mm_insert_mode mode;
- unsigned long lpfn;
+ u64 lpfn;
int ret;
- lpfn = place->lpfn;
+ lpfn = place->lpfn << PAGE_SHIFT;
if (!lpfn)
lpfn = man->size;
@@ -83,9 +83,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
spin_lock(&rman->lock);
ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0],
- PFN_UP(node->base.size),
- bo->page_alignment, 0,
- place->fpfn, lpfn, mode);
+ node->base.size,
+ bo->page_alignment << PAGE_SHIFT, 0,
+ (u64)place->fpfn << PAGE_SHIFT, lpfn,
+ mode);
spin_unlock(&rman->lock);
if (unlikely(ret)) {
@@ -94,7 +95,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
*res = &node->base;
return 0;
}
@@ -119,11 +120,10 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man,
size_t size)
{
struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
- u32 num_pages = PFN_UP(size);
/* Don't evict BOs outside of the requested placement range */
- if (place->fpfn >= (node->start + num_pages) ||
- (place->lpfn && place->lpfn <= node->start))
+ if (((u64)place->fpfn << PAGE_SHIFT) >= (node->start + size) ||
+ (place->lpfn && ((u64)place->lpfn << PAGE_SHIFT) <= node->start))
return false;
return true;
@@ -135,10 +135,10 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man,
size_t size)
{
struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
- u32 num_pages = PFN_UP(size);
- if (node->start < place->fpfn ||
- (place->lpfn && (node->start + num_pages) > place->lpfn))
+ if (node->start < (u64)place->fpfn << PAGE_SHIFT ||
+ (place->lpfn && (node->start + size) >
+ (u64)place->lpfn << PAGE_SHIFT))
return false;
return true;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 3/7] drm/ttm: Change the meaning of the fields in the drm_mm_nodes structure from pfn to bytes v3
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the ttm_range_man_alloc() allocation from pages to size in bytes.
Fix the dependent drm_mm_nodes start and size from pages to bytes.
v2 (chk): Change the drm_mm_node usage in amdgpu as well. re-order the
patch to be independent of the resource->start change.
v3 (chk): add some more missing u64 casts
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 15 ++++++------
.../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 8 +++----
drivers/gpu/drm/i915/i915_scatterlist.c | 6 ++---
drivers/gpu/drm/ttm/ttm_range_manager.c | 24 +++++++++----------
4 files changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 44367f03316f..d66b5fcbadf2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -116,7 +116,6 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
struct ttm_resource **res)
{
struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
- uint32_t num_pages = PFN_UP(tbo->base.size);
struct ttm_range_mgr_node *node;
int r;
@@ -134,17 +133,19 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (place->lpfn) {
spin_lock(&mgr->lock);
r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
- num_pages, tbo->page_alignment,
- 0, place->fpfn, place->lpfn,
+ tbo->base.size,
+ tbo->page_alignment << PAGE_SHIFT, 0,
+ (u64)place->fpfn << PAGE_SHIFT,
+ (u64)place->lpfn << PAGE_SHIFT,
DRM_MM_INSERT_BEST);
spin_unlock(&mgr->lock);
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
} else {
node->mm_nodes[0].start = 0;
- node->mm_nodes[0].size = PFN_UP(node->base.size);
+ node->mm_nodes[0].size = node->base.size;
node->base.start = AMDGPU_BO_INVALID_OFFSET;
}
@@ -285,8 +286,8 @@ int amdgpu_gtt_mgr_init(struct amdgpu_device *adev, uint64_t gtt_size)
ttm_resource_manager_init(man, &adev->mman.bdev, gtt_size);
- start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
- size = (adev->gmc.gart_size >> PAGE_SHIFT) - start;
+ start = (AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS) << PAGE_SHIFT;
+ size = adev->gmc.gart_size - start;
drm_mm_init(&mgr->mm, start, size);
spin_lock_init(&mgr->lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 5c4f93ee0c57..5c78f0b09351 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -94,8 +94,8 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
while (start >= node->size << PAGE_SHIFT)
start -= node++->size << PAGE_SHIFT;
- cur->start = (node->start << PAGE_SHIFT) + start;
- cur->size = min((node->size << PAGE_SHIFT) - start, size);
+ cur->start = node->start + start;
+ cur->size = min(node->size - start, size);
cur->remaining = size;
cur->node = node;
break;
@@ -155,8 +155,8 @@ static inline void amdgpu_res_next(struct amdgpu_res_cursor *cur, uint64_t size)
node = cur->node;
cur->node = ++node;
- cur->start = node->start << PAGE_SHIFT;
- cur->size = min(node->size << PAGE_SHIFT, cur->remaining);
+ cur->start = node->start;
+ cur->size = min(node->size, cur->remaining);
break;
default:
return;
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c b/drivers/gpu/drm/i915/i915_scatterlist.c
index 756289e43dff..7defda1219d0 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.c
+++ b/drivers/gpu/drm/i915/i915_scatterlist.c
@@ -94,7 +94,7 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
if (!rsgt)
return ERR_PTR(-ENOMEM);
- i915_refct_sgt_init(rsgt, node->size << PAGE_SHIFT);
+ i915_refct_sgt_init(rsgt, node->size);
st = &rsgt->table;
/* restricted by sg_alloc_table */
if (WARN_ON(overflows_type(DIV_ROUND_UP_ULL(node->size, segment_pages),
@@ -110,8 +110,8 @@ struct i915_refct_sgt *i915_rsgt_from_mm_node(const struct drm_mm_node *node,
sg = st->sgl;
st->nents = 0;
prev_end = (resource_size_t)-1;
- block_size = node->size << PAGE_SHIFT;
- offset = node->start << PAGE_SHIFT;
+ block_size = node->size;
+ offset = node->start;
while (block_size) {
u64 len;
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index 62fddcc59f02..b8cb72432a2a 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -64,10 +64,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
struct ttm_range_mgr_node *node;
struct drm_mm *mm = &rman->mm;
enum drm_mm_insert_mode mode;
- unsigned long lpfn;
+ u64 lpfn;
int ret;
- lpfn = place->lpfn;
+ lpfn = place->lpfn << PAGE_SHIFT;
if (!lpfn)
lpfn = man->size;
@@ -83,9 +83,10 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
spin_lock(&rman->lock);
ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0],
- PFN_UP(node->base.size),
- bo->page_alignment, 0,
- place->fpfn, lpfn, mode);
+ node->base.size,
+ bo->page_alignment << PAGE_SHIFT, 0,
+ (u64)place->fpfn << PAGE_SHIFT, lpfn,
+ mode);
spin_unlock(&rman->lock);
if (unlikely(ret)) {
@@ -94,7 +95,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
*res = &node->base;
return 0;
}
@@ -119,11 +120,10 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man,
size_t size)
{
struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
- u32 num_pages = PFN_UP(size);
/* Don't evict BOs outside of the requested placement range */
- if (place->fpfn >= (node->start + num_pages) ||
- (place->lpfn && place->lpfn <= node->start))
+ if (((u64)place->fpfn << PAGE_SHIFT) >= (node->start + size) ||
+ (place->lpfn && ((u64)place->lpfn << PAGE_SHIFT) <= node->start))
return false;
return true;
@@ -135,10 +135,10 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man,
size_t size)
{
struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
- u32 num_pages = PFN_UP(size);
- if (node->start < place->fpfn ||
- (place->lpfn && (node->start + num_pages) > place->lpfn))
+ if (node->start < (u64)place->fpfn << PAGE_SHIFT ||
+ (place->lpfn && (node->start + size) >
+ (u64)place->lpfn << PAGE_SHIFT))
return false;
return true;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/7] drm/ttm: Change the meaning of resource->start from pfn to bytes v2
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change resource->start from pfn to bytes to allow allocating objects
smaller than a page and adjust all DRM drivers still using this.
v2 (chk): inline drm_gem_vram_pg_offset(), move amdgpu cursor changes to
separate patch, make resource->start 64bit on all platforms,
fix missing removals of PAGE_SHIFT.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 7 +++----
drivers/gpu/drm/drm_gem_vram_helper.c | 18 +++++++-----------
drivers/gpu/drm/nouveau/nouveau_bo.c | 13 ++++++-------
drivers/gpu/drm/nouveau/nouveau_bo0039.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_mem.c | 10 +++++-----
drivers/gpu/drm/nouveau/nouveau_ttm.c | 2 +-
drivers/gpu/drm/nouveau/nv17_fence.c | 2 +-
drivers/gpu/drm/nouveau/nv50_fence.c | 2 +-
drivers/gpu/drm/qxl/qxl_drv.h | 2 +-
drivers/gpu/drm/qxl/qxl_object.c | 2 +-
drivers/gpu/drm/qxl/qxl_ttm.c | 5 ++---
drivers/gpu/drm/radeon/radeon_object.c | 6 +++---
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 13 ++++++-------
drivers/gpu/drm/radeon/radeon_vm.c | 2 +-
drivers/gpu/drm/ttm/ttm_range_manager.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 4 ++--
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 3 +--
include/drm/ttm/ttm_resource.h | 2 +-
24 files changed, 53 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index d66b5fcbadf2..a48ed9027fee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -142,7 +142,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
+ node->base.start = node->mm_nodes[0].start;
} else {
node->mm_nodes[0].start = 0;
node->mm_nodes[0].size = node->base.size;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 283e8fe608ce..05fc6bda5f58 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1490,8 +1490,8 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
uint64_t offset;
- offset = (bo->tbo.resource->start << PAGE_SHIFT) +
- amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
+ offset = amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
+ offset += bo->tbo.resource->start;
return amdgpu_gmc_sign_extend(offset);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 77c2da886f5b..9009b5477faa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -569,7 +569,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
case AMDGPU_PL_PREEMPT:
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start;
/* check if it's visible */
if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size)
return -EINVAL;
@@ -926,7 +926,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
addr = amdgpu_gmc_agp_addr(bo);
if (addr != AMDGPU_BO_INVALID_OFFSET) {
- bo->resource->start = addr >> PAGE_SHIFT;
+ bo->resource->start = addr;
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 9fa1d814508a..5e1e24d3b88e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -527,14 +527,13 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
vres->base.start = 0;
list_for_each_entry(block, &vres->blocks, link) {
- unsigned long start;
+ uint64_t start;
start = amdgpu_vram_mgr_block_start(block) +
amdgpu_vram_mgr_block_size(block);
- start >>= PAGE_SHIFT;
- if (start > PFN_UP(vres->base.size))
- start -= PFN_UP(vres->base.size);
+ if (start > vres->base.size)
+ start -= vres->base.size;
else
start = 0;
vres->base.start = max(vres->base.start, start);
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c
index f70d11e1cd47..c69f2f6bd5c4 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -249,16 +249,6 @@ void drm_gem_vram_put(struct drm_gem_vram_object *gbo)
}
EXPORT_SYMBOL(drm_gem_vram_put);
-static u64 drm_gem_vram_pg_offset(struct drm_gem_vram_object *gbo)
-{
- /* Keep TTM behavior for now, remove when drivers are audited */
- if (WARN_ON_ONCE(!gbo->bo.resource ||
- gbo->bo.resource->mem_type == TTM_PL_SYSTEM))
- return 0;
-
- return gbo->bo.resource->start;
-}
-
/**
* drm_gem_vram_offset() - \
Returns a GEM VRAM object's offset in video memory
@@ -275,7 +265,13 @@ s64 drm_gem_vram_offset(struct drm_gem_vram_object *gbo)
{
if (WARN_ON_ONCE(!gbo->bo.pin_count))
return (s64)-ENODEV;
- return drm_gem_vram_pg_offset(gbo) << PAGE_SHIFT;
+
+ /* Keep TTM behavior for now, remove when drivers are audited */
+ if (WARN_ON_ONCE(!gbo->bo.resource ||
+ gbo->bo.resource->mem_type == TTM_PL_SYSTEM))
+ return 0;
+
+ return gbo->bo.resource->start;
}
EXPORT_SYMBOL(drm_gem_vram_offset);
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index c2ec91cc845d..89fada6c2e11 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -946,7 +946,7 @@ static void nouveau_bo_move_ntfy(struct ttm_buffer_object *bo,
}
if (new_reg)
- nvbo->offset = (new_reg->start << PAGE_SHIFT);
+ nvbo->offset = new_reg->start;
}
@@ -957,7 +957,7 @@ nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct drm_device *dev = drm->dev;
struct nouveau_bo *nvbo = nouveau_bo(bo);
- u64 offset = new_reg->start << PAGE_SHIFT;
+ u64 offset = new_reg->start;
*new_tile = NULL;
if (new_reg->mem_type != TTM_PL_VRAM)
@@ -1118,8 +1118,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
case TTM_PL_TT:
#if IS_ENABLED(CONFIG_AGP)
if (drm->agp.bridge) {
- reg->bus.offset = (reg->start << PAGE_SHIFT) +
- drm->agp.base;
+ reg->bus.offset = reg->start + drm->agp.base;
reg->bus.is_iomem = !drm->agp.cma;
reg->bus.caching = ttm_write_combined;
}
@@ -1132,7 +1131,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
}
fallthrough; /* tiled memory */
case TTM_PL_VRAM:
- reg->bus.offset = (reg->start << PAGE_SHIFT) +
+ reg->bus.offset = reg->start +
device->func->resource_addr(device, 1);
reg->bus.is_iomem = true;
@@ -1222,7 +1221,7 @@ vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nvkm_device *device = nvxx_device(&drm->client.device);
- u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
+ u32 mappable = device->func->resource_size(device, 1);
int i, ret;
/* as long as the bo isn't in vram, and isn't tiled, we've got
@@ -1241,7 +1240,7 @@ vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
} else {
/* make sure bo is in mappable vram */
if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
- bo->resource->start + PFN_UP(bo->resource->size) < mappable)
+ bo->resource->start + bo->resource->size < mappable)
return 0;
for (i = 0; i < nvbo->placement.num_placement; ++i) {
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo0039.c b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
index e2ce44adaa5c..41197312f82f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo0039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
@@ -49,9 +49,9 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
{
struct nvif_push *push = chan->chan.push;
u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg);
- u32 src_offset = old_reg->start << PAGE_SHIFT;
+ u32 src_offset = old_reg->start;
u32 dst_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, new_reg);
- u32 dst_offset = new_reg->start << PAGE_SHIFT;
+ u32 dst_offset = new_reg->start;
u32 page_count = PFN_UP(new_reg->size);
int ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 25f31d5169e5..d31cc3b069d8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -158,7 +158,7 @@ nouveau_mem_vram(struct ttm_resource *reg, bool contig, u8 page)
}
mutex_unlock(&drm->master.lock);
- reg->start = mem->mem.addr >> PAGE_SHIFT;
+ reg->start = mem->mem.addr;
return ret;
}
@@ -197,8 +197,8 @@ nouveau_mem_intersects(struct ttm_resource *res,
u32 num_pages = PFN_UP(size);
/* Don't evict BOs outside of the requested placement range */
- if (place->fpfn >= (res->start + num_pages) ||
- (place->lpfn && place->lpfn <= res->start))
+ if (place->fpfn >= ((res->start >> PAGE_SHIFT) + num_pages) ||
+ (place->lpfn && place->lpfn <= (res->start >> PAGE_SHIFT)))
return false;
return true;
@@ -211,8 +211,8 @@ nouveau_mem_compatible(struct ttm_resource *res,
{
u32 num_pages = PFN_UP(size);
- if (res->start < place->fpfn ||
- (place->lpfn && (res->start + num_pages) > place->lpfn))
+ if ((res->start >> PAGE_SHIFT) < place->fpfn ||
+ (place->lpfn && ((res->start >> PAGE_SHIFT) + num_pages) > place->lpfn))
return false;
return true;
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 1469a88910e4..2127b98e033a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -145,7 +145,7 @@ nv04_gart_manager_new(struct ttm_resource_manager *man,
return ret;
}
- (*res)->start = mem->vma[0].addr >> PAGE_SHIFT;
+ (*res)->start = mem->vma[0].addr;
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c
index 07c2e0878c24..b6567e5f769c 100644
--- a/drivers/gpu/drm/nouveau/nv17_fence.c
+++ b/drivers/gpu/drm/nouveau/nv17_fence.c
@@ -79,7 +79,7 @@ nv17_fence_context_new(struct nouveau_channel *chan)
struct nv10_fence_priv *priv = chan->drm->fence;
struct ttm_resource *reg = priv->bo->bo.resource;
struct nv10_fence_chan *fctx;
- u32 start = reg->start * PAGE_SIZE;
+ u32 start = reg->start;
u32 limit = start + priv->bo->bo.base.size - 1;
int ret = 0;
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index ea1e1f480bfe..c3f1df834bb9 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -38,7 +38,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
struct nv10_fence_priv *priv = chan->drm->fence;
struct nv10_fence_chan *fctx;
struct ttm_resource *reg = priv->bo->bo.resource;
- u32 start = reg->start * PAGE_SIZE;
+ u32 start = reg->start;
u32 limit = start + priv->bo->bo.base.size - 1;
int ret;
diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h
index ea993d7162e8..994996e6a623 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -289,7 +289,7 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
/* TODO - need to hold one of the locks to read bo->tbo.resource->start */
- return slot->high_bits | ((bo->tbo.resource->start << PAGE_SHIFT) + offset);
+ return slot->high_bits | (bo->tbo.resource->start + offset);
}
/* qxl_display.c */
diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c
index 06a58dad5f5c..657b9995f4f6 100644
--- a/drivers/gpu/drm/qxl/qxl_object.c
+++ b/drivers/gpu/drm/qxl/qxl_object.c
@@ -220,7 +220,7 @@ void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev,
else
goto fallback;
- offset = bo->tbo.resource->start << PAGE_SHIFT;
+ offset = bo->tbo.resource->start;
return io_mapping_map_atomic_wc(map, offset + page_offset);
fallback:
if (bo->kptr) {
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index a92a5b0d4c25..31f96c7d89b4 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -81,13 +81,12 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev,
return 0;
case TTM_PL_VRAM:
mem->bus.is_iomem = true;
- mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base;
+ mem->bus.offset = mem->start + qdev->vram_base;
mem->bus.caching = ttm_write_combined;
break;
case TTM_PL_PRIV:
mem->bus.is_iomem = true;
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- qdev->surfaceram_base;
+ mem->bus.offset = mem->start + qdev->surfaceram_base;
mem->bus.caching = ttm_write_combined;
break;
default:
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 10c0fbd9d2b4..83d50c72aeeb 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -588,7 +588,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo)
out:
radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
- bo->tbo.resource->start << PAGE_SHIFT,
+ bo->tbo.resource->start,
bo->tbo.base.size);
return 0;
}
@@ -738,7 +738,7 @@ vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
return 0;
size = bo->resource->size;
- offset = bo->resource->start << PAGE_SHIFT;
+ offset = bo->resource->start;
if ((offset + size) <= rdev->mc.visible_vram_size)
return 0;
@@ -760,7 +760,7 @@ vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
r = ttm_bo_validate(bo, &rbo->placement, &ctx);
} else if (likely(!r)) {
- offset = bo->resource->start << PAGE_SHIFT;
+ offset = bo->resource->start;
/* this should never happen */
if ((offset + size) > rdev->mc.visible_vram_size)
return VM_FAULT_SIGBUS;
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index 0a6ef49e990a..6e0002e08c57 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -104,7 +104,7 @@ static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
break;
}
- return (bo->tbo.resource->start << PAGE_SHIFT) + start;
+ return bo->tbo.resource->start + start;
}
static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 78dd6a87fb65..aa8785b6b1e8 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -104,7 +104,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
- bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
+ bo->resource->start < rbo->rdev->mc.visible_vram_size) {
unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
int i;
@@ -149,8 +149,8 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
rdev = radeon_get_rdev(bo->bdev);
ridx = radeon_copy_ring_index(rdev);
- old_start = (u64)old_mem->start << PAGE_SHIFT;
- new_start = (u64)new_mem->start << PAGE_SHIFT;
+ old_start = (u64)old_mem->start;
+ new_start = (u64)new_mem->start;
switch (old_mem->mem_type) {
case TTM_PL_VRAM:
@@ -274,15 +274,14 @@ static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resourc
#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {
/* RADEON_IS_AGP is set only if AGP is active */
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- rdev->mc.agp_base;
+ mem->bus.offset = mem->start + rdev->mc.agp_base;
mem->bus.is_iomem = !rdev->agp->cant_use_aperture;
mem->bus.caching = ttm_write_combined;
}
#endif
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start;
/* check if it's visible */
if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
return -EINVAL;
@@ -443,7 +442,7 @@ static int radeon_ttm_backend_bind(struct ttm_device *bdev,
flags &= ~RADEON_GART_PAGE_WRITE;
}
- gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
+ gtt->offset = (unsigned long)bo_mem->start;
if (!ttm->num_pages) {
WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
ttm->num_pages, bo_mem, ttm);
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index 987cabbf1318..27ba2f6c4ac5 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -945,7 +945,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
bo_va->flags &= ~RADEON_VM_PAGE_WRITEABLE;
if (mem) {
- addr = (u64)mem->start << PAGE_SHIFT;
+ addr = (u64)mem->start;
if (mem->mem_type != TTM_PL_SYSTEM)
bo_va->flags |= RADEON_VM_PAGE_VALID;
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index b8cb72432a2a..c3cd7c6dd816 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -95,7 +95,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
+ node->base.start = node->mm_nodes[0].start;
*res = &node->base;
return 0;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 82094c137855..811e1fb22840 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -188,7 +188,7 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv,
* that situation.
*/
if (bo->resource->mem_type == TTM_PL_VRAM &&
- bo->resource->start < PFN_UP(bo->resource->size) &&
+ bo->resource->start < bo->resource->size &&
bo->resource->start > 0 &&
buf->tbo.pin_count == 0) {
ctx.interruptible = false;
@@ -258,7 +258,7 @@ void vmw_bo_get_guest_ptr(const struct ttm_buffer_object *bo,
{
if (bo->resource->mem_type == TTM_PL_VRAM) {
ptr->gmrId = SVGA_GMR_FRAMEBUFFER;
- ptr->offset = bo->resource->start << PAGE_SHIFT;
+ ptr->offset = bo->resource->start;
} else {
ptr->gmrId = bo->resource->start;
ptr->offset = 0;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
index 195ff8792e5a..38b08a47199b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
@@ -584,7 +584,7 @@ static int vmw_cmd_emit_dummy_legacy_query(struct vmw_private *dev_priv,
if (bo->resource->mem_type == TTM_PL_VRAM) {
cmd->body.guestResult.gmrId = SVGA_GMR_FRAMEBUFFER;
- cmd->body.guestResult.offset = bo->resource->start << PAGE_SHIFT;
+ cmd->body.guestResult.offset = bo->resource->start;
} else {
cmd->body.guestResult.gmrId = bo->resource->start;
cmd->body.guestResult.offset = 0;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 6b9aa2b4ef54..190ba76a6a97 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -3764,7 +3764,7 @@ static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
bo = &reloc->vbo->tbo;
switch (bo->resource->mem_type) {
case TTM_PL_VRAM:
- reloc->location->offset += bo->resource->start << PAGE_SHIFT;
+ reloc->location->offset += bo->resource->start;
reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
break;
case VMW_PL_GMR:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
index af8562c95cc3..9476b527b3fd 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
@@ -462,8 +462,7 @@ static int vmw_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *
case VMW_PL_MOB:
return 0;
case TTM_PL_VRAM:
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- dev_priv->vram_start;
+ mem->bus.offset = mem->start + dev_priv->vram_start;
mem->bus.is_iomem = true;
mem->bus.caching = ttm_cached;
break;
diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
index 78a226eba953..cf6cd4425354 100644
--- a/include/drm/ttm/ttm_resource.h
+++ b/include/drm/ttm/ttm_resource.h
@@ -207,7 +207,7 @@ struct ttm_bus_placement {
* buffer object.
*/
struct ttm_resource {
- unsigned long start;
+ uint64_t start;
size_t size;
uint32_t mem_type;
uint32_t placement;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 4/7] drm/ttm: Change the meaning of resource->start from pfn to bytes v2
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change resource->start from pfn to bytes to allow allocating objects
smaller than a page and adjust all DRM drivers still using this.
v2 (chk): inline drm_gem_vram_pg_offset(), move amdgpu cursor changes to
separate patch, make resource->start 64bit on all platforms,
fix missing removals of PAGE_SHIFT.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 7 +++----
drivers/gpu/drm/drm_gem_vram_helper.c | 18 +++++++-----------
drivers/gpu/drm/nouveau/nouveau_bo.c | 13 ++++++-------
drivers/gpu/drm/nouveau/nouveau_bo0039.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_mem.c | 10 +++++-----
drivers/gpu/drm/nouveau/nouveau_ttm.c | 2 +-
drivers/gpu/drm/nouveau/nv17_fence.c | 2 +-
drivers/gpu/drm/nouveau/nv50_fence.c | 2 +-
drivers/gpu/drm/qxl/qxl_drv.h | 2 +-
drivers/gpu/drm/qxl/qxl_object.c | 2 +-
drivers/gpu/drm/qxl/qxl_ttm.c | 5 ++---
drivers/gpu/drm/radeon/radeon_object.c | 6 +++---
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 13 ++++++-------
drivers/gpu/drm/radeon/radeon_vm.c | 2 +-
drivers/gpu/drm/ttm/ttm_range_manager.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 4 ++--
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 2 +-
drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 3 +--
include/drm/ttm/ttm_resource.h | 2 +-
24 files changed, 53 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index d66b5fcbadf2..a48ed9027fee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -142,7 +142,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
+ node->base.start = node->mm_nodes[0].start;
} else {
node->mm_nodes[0].start = 0;
node->mm_nodes[0].size = node->base.size;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 283e8fe608ce..05fc6bda5f58 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1490,8 +1490,8 @@ u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
uint64_t offset;
- offset = (bo->tbo.resource->start << PAGE_SHIFT) +
- amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
+ offset = amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
+ offset += bo->tbo.resource->start;
return amdgpu_gmc_sign_extend(offset);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 77c2da886f5b..9009b5477faa 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -569,7 +569,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
case AMDGPU_PL_PREEMPT:
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start;
/* check if it's visible */
if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size)
return -EINVAL;
@@ -926,7 +926,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
addr = amdgpu_gmc_agp_addr(bo);
if (addr != AMDGPU_BO_INVALID_OFFSET) {
- bo->resource->start = addr >> PAGE_SHIFT;
+ bo->resource->start = addr;
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 9fa1d814508a..5e1e24d3b88e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -527,14 +527,13 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
vres->base.start = 0;
list_for_each_entry(block, &vres->blocks, link) {
- unsigned long start;
+ uint64_t start;
start = amdgpu_vram_mgr_block_start(block) +
amdgpu_vram_mgr_block_size(block);
- start >>= PAGE_SHIFT;
- if (start > PFN_UP(vres->base.size))
- start -= PFN_UP(vres->base.size);
+ if (start > vres->base.size)
+ start -= vres->base.size;
else
start = 0;
vres->base.start = max(vres->base.start, start);
diff --git a/drivers/gpu/drm/drm_gem_vram_helper.c b/drivers/gpu/drm/drm_gem_vram_helper.c
index f70d11e1cd47..c69f2f6bd5c4 100644
--- a/drivers/gpu/drm/drm_gem_vram_helper.c
+++ b/drivers/gpu/drm/drm_gem_vram_helper.c
@@ -249,16 +249,6 @@ void drm_gem_vram_put(struct drm_gem_vram_object *gbo)
}
EXPORT_SYMBOL(drm_gem_vram_put);
-static u64 drm_gem_vram_pg_offset(struct drm_gem_vram_object *gbo)
-{
- /* Keep TTM behavior for now, remove when drivers are audited */
- if (WARN_ON_ONCE(!gbo->bo.resource ||
- gbo->bo.resource->mem_type == TTM_PL_SYSTEM))
- return 0;
-
- return gbo->bo.resource->start;
-}
-
/**
* drm_gem_vram_offset() - \
Returns a GEM VRAM object's offset in video memory
@@ -275,7 +265,13 @@ s64 drm_gem_vram_offset(struct drm_gem_vram_object *gbo)
{
if (WARN_ON_ONCE(!gbo->bo.pin_count))
return (s64)-ENODEV;
- return drm_gem_vram_pg_offset(gbo) << PAGE_SHIFT;
+
+ /* Keep TTM behavior for now, remove when drivers are audited */
+ if (WARN_ON_ONCE(!gbo->bo.resource ||
+ gbo->bo.resource->mem_type == TTM_PL_SYSTEM))
+ return 0;
+
+ return gbo->bo.resource->start;
}
EXPORT_SYMBOL(drm_gem_vram_offset);
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index c2ec91cc845d..89fada6c2e11 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -946,7 +946,7 @@ static void nouveau_bo_move_ntfy(struct ttm_buffer_object *bo,
}
if (new_reg)
- nvbo->offset = (new_reg->start << PAGE_SHIFT);
+ nvbo->offset = new_reg->start;
}
@@ -957,7 +957,7 @@ nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct drm_device *dev = drm->dev;
struct nouveau_bo *nvbo = nouveau_bo(bo);
- u64 offset = new_reg->start << PAGE_SHIFT;
+ u64 offset = new_reg->start;
*new_tile = NULL;
if (new_reg->mem_type != TTM_PL_VRAM)
@@ -1118,8 +1118,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
case TTM_PL_TT:
#if IS_ENABLED(CONFIG_AGP)
if (drm->agp.bridge) {
- reg->bus.offset = (reg->start << PAGE_SHIFT) +
- drm->agp.base;
+ reg->bus.offset = reg->start + drm->agp.base;
reg->bus.is_iomem = !drm->agp.cma;
reg->bus.caching = ttm_write_combined;
}
@@ -1132,7 +1131,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
}
fallthrough; /* tiled memory */
case TTM_PL_VRAM:
- reg->bus.offset = (reg->start << PAGE_SHIFT) +
+ reg->bus.offset = reg->start +
device->func->resource_addr(device, 1);
reg->bus.is_iomem = true;
@@ -1222,7 +1221,7 @@ vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
struct nouveau_bo *nvbo = nouveau_bo(bo);
struct nvkm_device *device = nvxx_device(&drm->client.device);
- u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
+ u32 mappable = device->func->resource_size(device, 1);
int i, ret;
/* as long as the bo isn't in vram, and isn't tiled, we've got
@@ -1241,7 +1240,7 @@ vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
} else {
/* make sure bo is in mappable vram */
if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
- bo->resource->start + PFN_UP(bo->resource->size) < mappable)
+ bo->resource->start + bo->resource->size < mappable)
return 0;
for (i = 0; i < nvbo->placement.num_placement; ++i) {
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo0039.c b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
index e2ce44adaa5c..41197312f82f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo0039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
@@ -49,9 +49,9 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
{
struct nvif_push *push = chan->chan.push;
u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg);
- u32 src_offset = old_reg->start << PAGE_SHIFT;
+ u32 src_offset = old_reg->start;
u32 dst_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, new_reg);
- u32 dst_offset = new_reg->start << PAGE_SHIFT;
+ u32 dst_offset = new_reg->start;
u32 page_count = PFN_UP(new_reg->size);
int ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 25f31d5169e5..d31cc3b069d8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -158,7 +158,7 @@ nouveau_mem_vram(struct ttm_resource *reg, bool contig, u8 page)
}
mutex_unlock(&drm->master.lock);
- reg->start = mem->mem.addr >> PAGE_SHIFT;
+ reg->start = mem->mem.addr;
return ret;
}
@@ -197,8 +197,8 @@ nouveau_mem_intersects(struct ttm_resource *res,
u32 num_pages = PFN_UP(size);
/* Don't evict BOs outside of the requested placement range */
- if (place->fpfn >= (res->start + num_pages) ||
- (place->lpfn && place->lpfn <= res->start))
+ if (place->fpfn >= ((res->start >> PAGE_SHIFT) + num_pages) ||
+ (place->lpfn && place->lpfn <= (res->start >> PAGE_SHIFT)))
return false;
return true;
@@ -211,8 +211,8 @@ nouveau_mem_compatible(struct ttm_resource *res,
{
u32 num_pages = PFN_UP(size);
- if (res->start < place->fpfn ||
- (place->lpfn && (res->start + num_pages) > place->lpfn))
+ if ((res->start >> PAGE_SHIFT) < place->fpfn ||
+ (place->lpfn && ((res->start >> PAGE_SHIFT) + num_pages) > place->lpfn))
return false;
return true;
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 1469a88910e4..2127b98e033a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -145,7 +145,7 @@ nv04_gart_manager_new(struct ttm_resource_manager *man,
return ret;
}
- (*res)->start = mem->vma[0].addr >> PAGE_SHIFT;
+ (*res)->start = mem->vma[0].addr;
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c
index 07c2e0878c24..b6567e5f769c 100644
--- a/drivers/gpu/drm/nouveau/nv17_fence.c
+++ b/drivers/gpu/drm/nouveau/nv17_fence.c
@@ -79,7 +79,7 @@ nv17_fence_context_new(struct nouveau_channel *chan)
struct nv10_fence_priv *priv = chan->drm->fence;
struct ttm_resource *reg = priv->bo->bo.resource;
struct nv10_fence_chan *fctx;
- u32 start = reg->start * PAGE_SIZE;
+ u32 start = reg->start;
u32 limit = start + priv->bo->bo.base.size - 1;
int ret = 0;
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index ea1e1f480bfe..c3f1df834bb9 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -38,7 +38,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
struct nv10_fence_priv *priv = chan->drm->fence;
struct nv10_fence_chan *fctx;
struct ttm_resource *reg = priv->bo->bo.resource;
- u32 start = reg->start * PAGE_SIZE;
+ u32 start = reg->start;
u32 limit = start + priv->bo->bo.base.size - 1;
int ret;
diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h
index ea993d7162e8..994996e6a623 100644
--- a/drivers/gpu/drm/qxl/qxl_drv.h
+++ b/drivers/gpu/drm/qxl/qxl_drv.h
@@ -289,7 +289,7 @@ qxl_bo_physical_address(struct qxl_device *qdev, struct qxl_bo *bo,
/* TODO - need to hold one of the locks to read bo->tbo.resource->start */
- return slot->high_bits | ((bo->tbo.resource->start << PAGE_SHIFT) + offset);
+ return slot->high_bits | (bo->tbo.resource->start + offset);
}
/* qxl_display.c */
diff --git a/drivers/gpu/drm/qxl/qxl_object.c b/drivers/gpu/drm/qxl/qxl_object.c
index 06a58dad5f5c..657b9995f4f6 100644
--- a/drivers/gpu/drm/qxl/qxl_object.c
+++ b/drivers/gpu/drm/qxl/qxl_object.c
@@ -220,7 +220,7 @@ void *qxl_bo_kmap_atomic_page(struct qxl_device *qdev,
else
goto fallback;
- offset = bo->tbo.resource->start << PAGE_SHIFT;
+ offset = bo->tbo.resource->start;
return io_mapping_map_atomic_wc(map, offset + page_offset);
fallback:
if (bo->kptr) {
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index a92a5b0d4c25..31f96c7d89b4 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -81,13 +81,12 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev,
return 0;
case TTM_PL_VRAM:
mem->bus.is_iomem = true;
- mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base;
+ mem->bus.offset = mem->start + qdev->vram_base;
mem->bus.caching = ttm_write_combined;
break;
case TTM_PL_PRIV:
mem->bus.is_iomem = true;
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- qdev->surfaceram_base;
+ mem->bus.offset = mem->start + qdev->surfaceram_base;
mem->bus.caching = ttm_write_combined;
break;
default:
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 10c0fbd9d2b4..83d50c72aeeb 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -588,7 +588,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo)
out:
radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
- bo->tbo.resource->start << PAGE_SHIFT,
+ bo->tbo.resource->start,
bo->tbo.base.size);
return 0;
}
@@ -738,7 +738,7 @@ vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
return 0;
size = bo->resource->size;
- offset = bo->resource->start << PAGE_SHIFT;
+ offset = bo->resource->start;
if ((offset + size) <= rdev->mc.visible_vram_size)
return 0;
@@ -760,7 +760,7 @@ vm_fault_t radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
r = ttm_bo_validate(bo, &rbo->placement, &ctx);
} else if (likely(!r)) {
- offset = bo->resource->start << PAGE_SHIFT;
+ offset = bo->resource->start;
/* this should never happen */
if ((offset + size) > rdev->mc.visible_vram_size)
return VM_FAULT_SIGBUS;
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index 0a6ef49e990a..6e0002e08c57 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -104,7 +104,7 @@ static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
break;
}
- return (bo->tbo.resource->start << PAGE_SHIFT) + start;
+ return bo->tbo.resource->start + start;
}
static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 78dd6a87fb65..aa8785b6b1e8 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -104,7 +104,7 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
- bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
+ bo->resource->start < rbo->rdev->mc.visible_vram_size) {
unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
int i;
@@ -149,8 +149,8 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
rdev = radeon_get_rdev(bo->bdev);
ridx = radeon_copy_ring_index(rdev);
- old_start = (u64)old_mem->start << PAGE_SHIFT;
- new_start = (u64)new_mem->start << PAGE_SHIFT;
+ old_start = (u64)old_mem->start;
+ new_start = (u64)new_mem->start;
switch (old_mem->mem_type) {
case TTM_PL_VRAM:
@@ -274,15 +274,14 @@ static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resourc
#if IS_ENABLED(CONFIG_AGP)
if (rdev->flags & RADEON_IS_AGP) {
/* RADEON_IS_AGP is set only if AGP is active */
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- rdev->mc.agp_base;
+ mem->bus.offset = mem->start + rdev->mc.agp_base;
mem->bus.is_iomem = !rdev->agp->cant_use_aperture;
mem->bus.caching = ttm_write_combined;
}
#endif
break;
case TTM_PL_VRAM:
- mem->bus.offset = mem->start << PAGE_SHIFT;
+ mem->bus.offset = mem->start;
/* check if it's visible */
if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
return -EINVAL;
@@ -443,7 +442,7 @@ static int radeon_ttm_backend_bind(struct ttm_device *bdev,
flags &= ~RADEON_GART_PAGE_WRITE;
}
- gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
+ gtt->offset = (unsigned long)bo_mem->start;
if (!ttm->num_pages) {
WARN(1, "nothing to bind %u pages for mreg %p back %p!\n",
ttm->num_pages, bo_mem, ttm);
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index 987cabbf1318..27ba2f6c4ac5 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -945,7 +945,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
bo_va->flags &= ~RADEON_VM_PAGE_WRITEABLE;
if (mem) {
- addr = (u64)mem->start << PAGE_SHIFT;
+ addr = (u64)mem->start;
if (mem->mem_type != TTM_PL_SYSTEM)
bo_va->flags |= RADEON_VM_PAGE_VALID;
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index b8cb72432a2a..c3cd7c6dd816 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -95,7 +95,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start >> PAGE_SHIFT;
+ node->base.start = node->mm_nodes[0].start;
*res = &node->base;
return 0;
}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
index 82094c137855..811e1fb22840 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c
@@ -188,7 +188,7 @@ int vmw_bo_pin_in_start_of_vram(struct vmw_private *dev_priv,
* that situation.
*/
if (bo->resource->mem_type == TTM_PL_VRAM &&
- bo->resource->start < PFN_UP(bo->resource->size) &&
+ bo->resource->start < bo->resource->size &&
bo->resource->start > 0 &&
buf->tbo.pin_count == 0) {
ctx.interruptible = false;
@@ -258,7 +258,7 @@ void vmw_bo_get_guest_ptr(const struct ttm_buffer_object *bo,
{
if (bo->resource->mem_type == TTM_PL_VRAM) {
ptr->gmrId = SVGA_GMR_FRAMEBUFFER;
- ptr->offset = bo->resource->start << PAGE_SHIFT;
+ ptr->offset = bo->resource->start;
} else {
ptr->gmrId = bo->resource->start;
ptr->offset = 0;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
index 195ff8792e5a..38b08a47199b 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
@@ -584,7 +584,7 @@ static int vmw_cmd_emit_dummy_legacy_query(struct vmw_private *dev_priv,
if (bo->resource->mem_type == TTM_PL_VRAM) {
cmd->body.guestResult.gmrId = SVGA_GMR_FRAMEBUFFER;
- cmd->body.guestResult.offset = bo->resource->start << PAGE_SHIFT;
+ cmd->body.guestResult.offset = bo->resource->start;
} else {
cmd->body.guestResult.gmrId = bo->resource->start;
cmd->body.guestResult.offset = 0;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 6b9aa2b4ef54..190ba76a6a97 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -3764,7 +3764,7 @@ static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
bo = &reloc->vbo->tbo;
switch (bo->resource->mem_type) {
case TTM_PL_VRAM:
- reloc->location->offset += bo->resource->start << PAGE_SHIFT;
+ reloc->location->offset += bo->resource->start;
reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
break;
case VMW_PL_GMR:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
index af8562c95cc3..9476b527b3fd 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c
@@ -462,8 +462,7 @@ static int vmw_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *
case VMW_PL_MOB:
return 0;
case TTM_PL_VRAM:
- mem->bus.offset = (mem->start << PAGE_SHIFT) +
- dev_priv->vram_start;
+ mem->bus.offset = mem->start + dev_priv->vram_start;
mem->bus.is_iomem = true;
mem->bus.caching = ttm_cached;
break;
diff --git a/include/drm/ttm/ttm_resource.h b/include/drm/ttm/ttm_resource.h
index 78a226eba953..cf6cd4425354 100644
--- a/include/drm/ttm/ttm_resource.h
+++ b/include/drm/ttm/ttm_resource.h
@@ -207,7 +207,7 @@ struct ttm_bus_placement {
* buffer object.
*/
struct ttm_resource {
- unsigned long start;
+ uint64_t start;
size_t size;
uint32_t mem_type;
uint32_t placement;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 5/7] drm/gem: Remove BUG_ON in drm_gem_private_object_init
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
ttm_resource can allocate size in bytes to support less than page size.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230208090106.9659-1-Amaranath.Somalapuram@amd.com
---
drivers/gpu/drm/drm_gem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index aa15c52ae182..5a3ca3363f82 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -152,8 +152,6 @@ EXPORT_SYMBOL(drm_gem_object_init);
void drm_gem_private_object_init(struct drm_device *dev,
struct drm_gem_object *obj, size_t size)
{
- BUG_ON((size & (PAGE_SIZE - 1)) != 0);
-
obj->dev = dev;
obj->filp = NULL;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 5/7] drm/gem: Remove BUG_ON in drm_gem_private_object_init
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
ttm_resource can allocate size in bytes to support less than page size.
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230208090106.9659-1-Amaranath.Somalapuram@amd.com
---
drivers/gpu/drm/drm_gem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index aa15c52ae182..5a3ca3363f82 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -152,8 +152,6 @@ EXPORT_SYMBOL(drm_gem_object_init);
void drm_gem_private_object_init(struct drm_device *dev,
struct drm_gem_object *obj, size_t size)
{
- BUG_ON((size & (PAGE_SIZE - 1)) != 0);
-
obj->dev = dev;
obj->filp = NULL;
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 6/7] drm/amdgpu: Cleanup the GDS, GWS and OA allocations
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the size of GDS, GWS and OA from pages to bytes.
The initialized gds_size, gws_size and oa_size in bytes,
remove PAGE_SHIFT in amdgpu_ttm_init_on_chip().
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +--
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index c3d9d75143f4..4641b25956fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -142,16 +142,16 @@ void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds,
struct amdgpu_bo *gws, struct amdgpu_bo *oa)
{
if (gds) {
- job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT;
- job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT;
+ job->gds_base = amdgpu_bo_gpu_offset(gds);
+ job->gds_size = amdgpu_bo_size(gds);
}
if (gws) {
- job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT;
- job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT;
+ job->gws_base = amdgpu_bo_gpu_offset(gws);
+ job->gws_size = amdgpu_bo_size(gws);
}
if (oa) {
- job->oa_base = amdgpu_bo_gpu_offset(oa) >> PAGE_SHIFT;
- job->oa_size = amdgpu_bo_size(oa) >> PAGE_SHIFT;
+ job->oa_base = amdgpu_bo_gpu_offset(oa);
+ job->oa_size = amdgpu_bo_size(oa);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 05fc6bda5f58..d95c61b79b4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -541,12 +541,11 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
/* GWS and OA don't need any alignment. */
page_align = bp->byte_align;
- size <<= PAGE_SHIFT;
} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
/* Both size and alignment must be a multiple of 4. */
page_align = ALIGN(bp->byte_align, 4);
- size = ALIGN(size, 4) << PAGE_SHIFT;
+ size = ALIGN(size, 4);
} else {
/* Memory should be aligned at least to a page size. */
page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 9009b5477faa..449b2344af27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -77,8 +77,7 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
unsigned int type,
uint64_t size)
{
- return ttm_range_man_init(&adev->mman.bdev, type,
- false, size << PAGE_SHIFT);
+ return ttm_range_man_init(&adev->mman.bdev, type, false, size);
}
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 6/7] drm/amdgpu: Cleanup the GDS, GWS and OA allocations
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
Change the size of GDS, GWS and OA from pages to bytes.
The initialized gds_size, gws_size and oa_size in bytes,
remove PAGE_SHIFT in amdgpu_ttm_init_on_chip().
Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 12 ++++++------
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +--
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index c3d9d75143f4..4641b25956fd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -142,16 +142,16 @@ void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds,
struct amdgpu_bo *gws, struct amdgpu_bo *oa)
{
if (gds) {
- job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT;
- job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT;
+ job->gds_base = amdgpu_bo_gpu_offset(gds);
+ job->gds_size = amdgpu_bo_size(gds);
}
if (gws) {
- job->gws_base = amdgpu_bo_gpu_offset(gws) >> PAGE_SHIFT;
- job->gws_size = amdgpu_bo_size(gws) >> PAGE_SHIFT;
+ job->gws_base = amdgpu_bo_gpu_offset(gws);
+ job->gws_size = amdgpu_bo_size(gws);
}
if (oa) {
- job->oa_base = amdgpu_bo_gpu_offset(oa) >> PAGE_SHIFT;
- job->oa_size = amdgpu_bo_size(oa) >> PAGE_SHIFT;
+ job->oa_base = amdgpu_bo_gpu_offset(oa);
+ job->oa_size = amdgpu_bo_size(oa);
}
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 05fc6bda5f58..d95c61b79b4f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -541,12 +541,11 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
/* GWS and OA don't need any alignment. */
page_align = bp->byte_align;
- size <<= PAGE_SHIFT;
} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
/* Both size and alignment must be a multiple of 4. */
page_align = ALIGN(bp->byte_align, 4);
- size = ALIGN(size, 4) << PAGE_SHIFT;
+ size = ALIGN(size, 4);
} else {
/* Memory should be aligned at least to a page size. */
page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 9009b5477faa..449b2344af27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -77,8 +77,7 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
unsigned int type,
uint64_t size)
{
- return ttm_range_man_init(&adev->mman.bdev, type,
- false, size << PAGE_SHIFT);
+ return ttm_range_man_init(&adev->mman.bdev, type, false, size);
}
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 7/7] drm/ttm: cleanup ttm_range_mgr_node
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-17 12:22 ` Christian König
-1 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
We don't need multiple drm_mm nodes any more. Clean that up and remove
the extra complexity.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 18 +++++++++---------
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 2 +-
drivers/gpu/drm/i915/intel_region_ttm.c | 2 +-
drivers/gpu/drm/ttm/ttm_range_manager.c | 13 ++++++-------
include/drm/ttm/ttm_range_manager.h | 6 +++---
5 files changed, 20 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index a48ed9027fee..f128a886a89b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -97,7 +97,7 @@ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res)
{
struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
- return drm_mm_node_allocated(&node->mm_nodes[0]);
+ return drm_mm_node_allocated(&node->mm_node);
}
/**
@@ -119,7 +119,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
struct ttm_range_mgr_node *node;
int r;
- node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
if (!node)
return -ENOMEM;
@@ -132,7 +132,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (place->lpfn) {
spin_lock(&mgr->lock);
- r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
+ r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_node,
tbo->base.size,
tbo->page_alignment << PAGE_SHIFT, 0,
(u64)place->fpfn << PAGE_SHIFT,
@@ -142,10 +142,10 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_node.start;
} else {
- node->mm_nodes[0].start = 0;
- node->mm_nodes[0].size = node->base.size;
+ node->mm_node.start = 0;
+ node->mm_node.size = node->base.size;
node->base.start = AMDGPU_BO_INVALID_OFFSET;
}
@@ -173,8 +173,8 @@ static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man,
struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
spin_lock(&mgr->lock);
- if (drm_mm_node_allocated(&node->mm_nodes[0]))
- drm_mm_remove_node(&node->mm_nodes[0]);
+ if (drm_mm_node_allocated(&node->mm_node))
+ drm_mm_remove_node(&node->mm_node);
spin_unlock(&mgr->lock);
ttm_resource_fini(man, res);
@@ -197,7 +197,7 @@ void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr)
adev = container_of(mgr, typeof(*adev), mman.gtt_mgr);
spin_lock(&mgr->lock);
drm_mm_for_each_node(mm_node, &mgr->mm) {
- node = container_of(mm_node, typeof(*node), mm_nodes[0]);
+ node = container_of(mm_node, typeof(*node), mm_node);
amdgpu_ttm_recover_gart(node->base.bo);
}
spin_unlock(&mgr->lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 5c78f0b09351..684cd8c0aa27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -90,7 +90,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
cur->node = block;
break;
case TTM_PL_TT:
- node = to_ttm_range_mgr_node(res)->mm_nodes;
+ node = &to_ttm_range_mgr_node(res)->mm_node;
while (start >= node->size << PAGE_SHIFT)
start -= node++->size << PAGE_SHIFT;
diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c b/drivers/gpu/drm/i915/intel_region_ttm.c
index b7fbd5abb42a..057329d05d0d 100644
--- a/drivers/gpu/drm/i915/intel_region_ttm.c
+++ b/drivers/gpu/drm/i915/intel_region_ttm.c
@@ -168,7 +168,7 @@ intel_region_ttm_resource_to_rsgt(struct intel_memory_region *mem,
struct ttm_range_mgr_node *range_node =
to_ttm_range_mgr_node(res);
- return i915_rsgt_from_mm_node(&range_node->mm_nodes[0],
+ return i915_rsgt_from_mm_node(&range_node->mm_node,
mem->region.start,
page_alignment);
} else {
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index c3cd7c6dd816..62eb101e3d33 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -71,7 +71,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
if (!lpfn)
lpfn = man->size;
- node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
if (!node)
return -ENOMEM;
@@ -82,8 +82,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
ttm_resource_init(bo, place, &node->base);
spin_lock(&rman->lock);
- ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0],
- node->base.size,
+ ret = drm_mm_insert_node_in_range(mm, &node->mm_node, node->base.size,
bo->page_alignment << PAGE_SHIFT, 0,
(u64)place->fpfn << PAGE_SHIFT, lpfn,
mode);
@@ -95,7 +94,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_node.start;
*res = &node->base;
return 0;
}
@@ -107,7 +106,7 @@ static void ttm_range_man_free(struct ttm_resource_manager *man,
struct ttm_range_manager *rman = to_range_manager(man);
spin_lock(&rman->lock);
- drm_mm_remove_node(&node->mm_nodes[0]);
+ drm_mm_remove_node(&node->mm_node);
spin_unlock(&rman->lock);
ttm_resource_fini(man, res);
@@ -119,7 +118,7 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
+ struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_node;
/* Don't evict BOs outside of the requested placement range */
if (((u64)place->fpfn << PAGE_SHIFT) >= (node->start + size) ||
@@ -134,7 +133,7 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
+ struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_node;
if (node->start < (u64)place->fpfn << PAGE_SHIFT ||
(place->lpfn && (node->start + size) >
diff --git a/include/drm/ttm/ttm_range_manager.h b/include/drm/ttm/ttm_range_manager.h
index 05bffded1b53..9dc76a51be1f 100644
--- a/include/drm/ttm/ttm_range_manager.h
+++ b/include/drm/ttm/ttm_range_manager.h
@@ -11,14 +11,14 @@
* struct ttm_range_mgr_node
*
* @base: base clase we extend
- * @mm_nodes: MM nodes, usually 1
+ * @mm_node: MM node
*
* Extending the ttm_resource object to manage an address space allocation with
- * one or more drm_mm_nodes.
+ * a drm_mm_nodes.
*/
struct ttm_range_mgr_node {
struct ttm_resource base;
- struct drm_mm_node mm_nodes[];
+ struct drm_mm_node mm_node;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH 7/7] drm/ttm: cleanup ttm_range_mgr_node
@ 2023-02-17 12:22 ` Christian König
0 siblings, 0 replies; 18+ messages in thread
From: Christian König @ 2023-02-17 12:22 UTC (permalink / raw)
To: intel-gfx, amd-gfx, dri-devel
We don't need multiple drm_mm nodes any more. Clean that up and remove
the extra complexity.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 18 +++++++++---------
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 2 +-
drivers/gpu/drm/i915/intel_region_ttm.c | 2 +-
drivers/gpu/drm/ttm/ttm_range_manager.c | 13 ++++++-------
include/drm/ttm/ttm_range_manager.h | 6 +++---
5 files changed, 20 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index a48ed9027fee..f128a886a89b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -97,7 +97,7 @@ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_resource *res)
{
struct ttm_range_mgr_node *node = to_ttm_range_mgr_node(res);
- return drm_mm_node_allocated(&node->mm_nodes[0]);
+ return drm_mm_node_allocated(&node->mm_node);
}
/**
@@ -119,7 +119,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
struct ttm_range_mgr_node *node;
int r;
- node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
if (!node)
return -ENOMEM;
@@ -132,7 +132,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (place->lpfn) {
spin_lock(&mgr->lock);
- r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_nodes[0],
+ r = drm_mm_insert_node_in_range(&mgr->mm, &node->mm_node,
tbo->base.size,
tbo->page_alignment << PAGE_SHIFT, 0,
(u64)place->fpfn << PAGE_SHIFT,
@@ -142,10 +142,10 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man,
if (unlikely(r))
goto err_free;
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_node.start;
} else {
- node->mm_nodes[0].start = 0;
- node->mm_nodes[0].size = node->base.size;
+ node->mm_node.start = 0;
+ node->mm_node.size = node->base.size;
node->base.start = AMDGPU_BO_INVALID_OFFSET;
}
@@ -173,8 +173,8 @@ static void amdgpu_gtt_mgr_del(struct ttm_resource_manager *man,
struct amdgpu_gtt_mgr *mgr = to_gtt_mgr(man);
spin_lock(&mgr->lock);
- if (drm_mm_node_allocated(&node->mm_nodes[0]))
- drm_mm_remove_node(&node->mm_nodes[0]);
+ if (drm_mm_node_allocated(&node->mm_node))
+ drm_mm_remove_node(&node->mm_node);
spin_unlock(&mgr->lock);
ttm_resource_fini(man, res);
@@ -197,7 +197,7 @@ void amdgpu_gtt_mgr_recover(struct amdgpu_gtt_mgr *mgr)
adev = container_of(mgr, typeof(*adev), mman.gtt_mgr);
spin_lock(&mgr->lock);
drm_mm_for_each_node(mm_node, &mgr->mm) {
- node = container_of(mm_node, typeof(*node), mm_nodes[0]);
+ node = container_of(mm_node, typeof(*node), mm_node);
amdgpu_ttm_recover_gart(node->base.bo);
}
spin_unlock(&mgr->lock);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
index 5c78f0b09351..684cd8c0aa27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
@@ -90,7 +90,7 @@ static inline void amdgpu_res_first(struct ttm_resource *res,
cur->node = block;
break;
case TTM_PL_TT:
- node = to_ttm_range_mgr_node(res)->mm_nodes;
+ node = &to_ttm_range_mgr_node(res)->mm_node;
while (start >= node->size << PAGE_SHIFT)
start -= node++->size << PAGE_SHIFT;
diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c b/drivers/gpu/drm/i915/intel_region_ttm.c
index b7fbd5abb42a..057329d05d0d 100644
--- a/drivers/gpu/drm/i915/intel_region_ttm.c
+++ b/drivers/gpu/drm/i915/intel_region_ttm.c
@@ -168,7 +168,7 @@ intel_region_ttm_resource_to_rsgt(struct intel_memory_region *mem,
struct ttm_range_mgr_node *range_node =
to_ttm_range_mgr_node(res);
- return i915_rsgt_from_mm_node(&range_node->mm_nodes[0],
+ return i915_rsgt_from_mm_node(&range_node->mm_node,
mem->region.start,
page_alignment);
} else {
diff --git a/drivers/gpu/drm/ttm/ttm_range_manager.c b/drivers/gpu/drm/ttm/ttm_range_manager.c
index c3cd7c6dd816..62eb101e3d33 100644
--- a/drivers/gpu/drm/ttm/ttm_range_manager.c
+++ b/drivers/gpu/drm/ttm/ttm_range_manager.c
@@ -71,7 +71,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
if (!lpfn)
lpfn = man->size;
- node = kzalloc(struct_size(node, mm_nodes, 1), GFP_KERNEL);
+ node = kzalloc(sizeof(*node), GFP_KERNEL);
if (!node)
return -ENOMEM;
@@ -82,8 +82,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
ttm_resource_init(bo, place, &node->base);
spin_lock(&rman->lock);
- ret = drm_mm_insert_node_in_range(mm, &node->mm_nodes[0],
- node->base.size,
+ ret = drm_mm_insert_node_in_range(mm, &node->mm_node, node->base.size,
bo->page_alignment << PAGE_SHIFT, 0,
(u64)place->fpfn << PAGE_SHIFT, lpfn,
mode);
@@ -95,7 +94,7 @@ static int ttm_range_man_alloc(struct ttm_resource_manager *man,
return ret;
}
- node->base.start = node->mm_nodes[0].start;
+ node->base.start = node->mm_node.start;
*res = &node->base;
return 0;
}
@@ -107,7 +106,7 @@ static void ttm_range_man_free(struct ttm_resource_manager *man,
struct ttm_range_manager *rman = to_range_manager(man);
spin_lock(&rman->lock);
- drm_mm_remove_node(&node->mm_nodes[0]);
+ drm_mm_remove_node(&node->mm_node);
spin_unlock(&rman->lock);
ttm_resource_fini(man, res);
@@ -119,7 +118,7 @@ static bool ttm_range_man_intersects(struct ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
+ struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_node;
/* Don't evict BOs outside of the requested placement range */
if (((u64)place->fpfn << PAGE_SHIFT) >= (node->start + size) ||
@@ -134,7 +133,7 @@ static bool ttm_range_man_compatible(struct ttm_resource_manager *man,
const struct ttm_place *place,
size_t size)
{
- struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_nodes[0];
+ struct drm_mm_node *node = &to_ttm_range_mgr_node(res)->mm_node;
if (node->start < (u64)place->fpfn << PAGE_SHIFT ||
(place->lpfn && (node->start + size) >
diff --git a/include/drm/ttm/ttm_range_manager.h b/include/drm/ttm/ttm_range_manager.h
index 05bffded1b53..9dc76a51be1f 100644
--- a/include/drm/ttm/ttm_range_manager.h
+++ b/include/drm/ttm/ttm_range_manager.h
@@ -11,14 +11,14 @@
* struct ttm_range_mgr_node
*
* @base: base clase we extend
- * @mm_nodes: MM nodes, usually 1
+ * @mm_node: MM node
*
* Extending the ttm_resource object to manage an address space allocation with
- * one or more drm_mm_nodes.
+ * a drm_mm_nodes.
*/
struct ttm_range_mgr_node {
struct ttm_resource base;
- struct drm_mm_node mm_nodes[];
+ struct drm_mm_node mm_node;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2
2023-02-17 12:22 ` [Intel-gfx] " Christian König
` (6 preceding siblings ...)
(?)
@ 2023-02-17 15:41 ` Patchwork
-1 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2023-02-17 15:41 UTC (permalink / raw)
To: Christian König; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 16436 bytes --]
== Series Details ==
Series: series starting with [1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2
URL : https://patchwork.freedesktop.org/series/114141/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12757 -> Patchwork_114141v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114141v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114141v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/index.html
Participating hosts (38 -> 38)
------------------------------
Additional (3): fi-kbl-soraka fi-tgl-1115g4 bat-atsm-1
Missing (3): bat-rpls-1 bat-adls-5 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114141v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gtt:
- bat-dg2-11: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12757/bat-dg2-11/igt@i915_selftest@live@gtt.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-dg2-11/igt@i915_selftest@live@gtt.html
Known issues
------------
Here are the changes found in Patchwork_114141v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- fi-tgl-1115g4: NOTRUN -> [SKIP][3] ([i915#7456])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@debugfs_test@basic-hwmon.html
* igt@fbdev@eof:
- bat-atsm-1: NOTRUN -> [SKIP][4] ([i915#2582]) +4 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@fbdev@eof.html
* igt@gem_huc_copy@huc-copy:
- fi-tgl-1115g4: NOTRUN -> [SKIP][5] ([i915#2190])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][8] ([i915#4613]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@gem_lmem_swapping@parallel-random-engines.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][9] ([i915#4613]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_mmap@basic:
- bat-atsm-1: NOTRUN -> [SKIP][10] ([i915#4083])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#4077]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-atsm-1: NOTRUN -> [SKIP][12] ([i915#4079]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- bat-adlm-1: NOTRUN -> [SKIP][13] ([i915#7561])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@i915_pm_backlight@basic-brightness.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][14] ([i915#7561])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_pm_rps@basic-api:
- bat-atsm-1: NOTRUN -> [SKIP][15] ([i915#6621])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@i915_pm_rps@basic-api.html
- bat-adlm-1: NOTRUN -> [SKIP][16] ([i915#6621])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: [PASS][17] -> [ABORT][18] ([i915#7911])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12757/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][19] ([i915#7156] / [i915#7913])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][20] ([i915#5334] / [i915#7872])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][21] ([i915#1886])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-tgl-1115g4: NOTRUN -> [INCOMPLETE][22] ([i915#7443])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html
- bat-atsm-1: NOTRUN -> [SKIP][23] ([i915#6645])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@size-max:
- bat-atsm-1: NOTRUN -> [SKIP][24] ([i915#6077]) +36 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_addfb_basic@size-max.html
* igt@kms_chamelium_edid@dp-edid-read:
- fi-tgl-1115g4: NOTRUN -> [SKIP][25] ([i915#7828]) +7 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@kms_chamelium_edid@dp-edid-read.html
* igt@kms_chamelium_frames@dp-crc-fast:
- bat-adlm-1: NOTRUN -> [SKIP][26] ([i915#7828]) +8 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][27] ([fdo#109271]) +15 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-tgl-1115g4: NOTRUN -> [SKIP][28] ([i915#4103])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_cursor_legacy@basic-flip-after-cursor:
- bat-atsm-1: NOTRUN -> [SKIP][29] ([i915#6078]) +14 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_cursor_legacy@basic-flip-after-cursor.html
* igt@kms_flip@basic-plain-flip:
- bat-atsm-1: NOTRUN -> [SKIP][30] ([i915#6166]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_flip@basic-plain-flip.html
- bat-adlm-1: NOTRUN -> [SKIP][31] ([i915#3637]) +3 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adlm-1: NOTRUN -> [SKIP][32] ([fdo#109285])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_force_connector_basic@force-load-detect.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][33] ([fdo#109285])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-atsm-1: NOTRUN -> [SKIP][34] ([i915#6093]) +3 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlm-1: NOTRUN -> [SKIP][35] ([i915#1849])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][36] ([i915#1845]) +10 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_pipe_crc_basic@hang-read-crc.html
- bat-atsm-1: NOTRUN -> [SKIP][37] ([i915#1836]) +6 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_prop_blob@basic:
- bat-atsm-1: NOTRUN -> [SKIP][38] ([i915#7357])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_prop_blob@basic.html
* igt@kms_psr@cursor_plane_move:
- bat-adlm-1: NOTRUN -> [SKIP][39] ([i915#1072]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_psr@cursor_plane_move.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][40] ([fdo#110189]) +3 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@sprite_plane_onoff:
- bat-atsm-1: NOTRUN -> [SKIP][41] ([i915#1072]) +3 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-atsm-1: NOTRUN -> [SKIP][42] ([i915#6094])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adlm-1: NOTRUN -> [SKIP][43] ([i915#3555])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@kms_setmode@basic-clone-single-crtc.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][44] ([i915#3555])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-atsm-1: NOTRUN -> [SKIP][45] ([fdo#109295] / [i915#6078])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@prime_vgem@basic-fence-flip.html
- bat-adlm-1: NOTRUN -> [SKIP][46] ([i915#1845] / [i915#3708])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-atsm-1: NOTRUN -> [SKIP][47] ([fdo#109295] / [i915#4077]) +1 similar issue
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-userptr:
- fi-tgl-1115g4: NOTRUN -> [SKIP][48] ([fdo#109295] / [i915#3301])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
* igt@prime_vgem@basic-write:
- bat-atsm-1: NOTRUN -> [SKIP][49] ([fdo#109295]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-atsm-1/igt@prime_vgem@basic-write.html
- bat-adlm-1: NOTRUN -> [SKIP][50] ([i915#3708]) +3 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlm-1/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@gem_exec_gttfill@basic:
- fi-pnv-d510: [FAIL][51] ([i915#7229]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12757/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/fi-pnv-d510/igt@gem_exec_gttfill@basic.html
* igt@i915_selftest@live@slpc:
- bat-adlp-9: [DMESG-FAIL][53] ([i915#6367]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12757/bat-adlp-9/igt@i915_selftest@live@slpc.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/bat-adlp-9/igt@i915_selftest@live@slpc.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7156]: https://gitlab.freedesktop.org/drm/intel/issues/7156
[i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
[i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
Build changes
-------------
* Linux: CI_DRM_12757 -> Patchwork_114141v1
CI-20190529: 20190529
CI_DRM_12757: 6653ef2d4663783ddec0ce1622ebbb4d47a2747f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7163: a3ef8a604f21123740f644fb7b2f437d5e37e367 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114141v1: 6653ef2d4663783ddec0ce1622ebbb4d47a2747f @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
6614cfcf64fa drm/ttm: cleanup ttm_range_mgr_node
f80cf23bc985 drm/amdgpu: Cleanup the GDS, GWS and OA allocations
b61b86edb34c drm/gem: Remove BUG_ON in drm_gem_private_object_init
f629df45b1f9 drm/ttm: Change the meaning of resource->start from pfn to bytes v2
36e863a87f6b drm/ttm: Change the meaning of the fields in the drm_mm_nodes structure from pfn to bytes v3
fa1a64e782cf drm/ttm: Change the parameters of ttm_range_man_init() from pages to bytes
9df07711ea64 drm/amdgpu: use amdgpu_res_cursor in more places v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114141v1/index.html
[-- Attachment #2: Type: text/html, Size: 19485 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 5/7] drm/gem: Remove BUG_ON in drm_gem_private_object_init
2023-02-17 12:22 ` [Intel-gfx] " Christian König
@ 2023-02-21 17:28 ` Matthew Auld
-1 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2023-02-21 17:28 UTC (permalink / raw)
To: Christian König; +Cc: intel-gfx, dri-devel, amd-gfx
On Fri, 17 Feb 2023 at 12:23, Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
>
> From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
>
> ttm_resource can allocate size in bytes to support less than page size.
>
> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
> Reviewed-by: Christian König <christian.koenig@amd.com>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20230208090106.9659-1-Amaranath.Somalapuram@amd.com
> ---
> drivers/gpu/drm/drm_gem.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
> index aa15c52ae182..5a3ca3363f82 100644
> --- a/drivers/gpu/drm/drm_gem.c
> +++ b/drivers/gpu/drm/drm_gem.c
> @@ -152,8 +152,6 @@ EXPORT_SYMBOL(drm_gem_object_init);
> void drm_gem_private_object_init(struct drm_device *dev,
> struct drm_gem_object *obj, size_t size)
> {
> - BUG_ON((size & (PAGE_SIZE - 1)) != 0);
> -
There are also some comments in drm_gem_{get, put}_pages referring to
this exact BUG_ON(), which could do with updating now.
> obj->dev = dev;
> obj->filp = NULL;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 5/7] drm/gem: Remove BUG_ON in drm_gem_private_object_init
@ 2023-02-21 17:28 ` Matthew Auld
0 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2023-02-21 17:28 UTC (permalink / raw)
To: Christian König; +Cc: intel-gfx, dri-devel, amd-gfx
On Fri, 17 Feb 2023 at 12:23, Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
>
> From: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
>
> ttm_resource can allocate size in bytes to support less than page size.
>
> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram@amd.com>
> Reviewed-by: Christian König <christian.koenig@amd.com>
> Signed-off-by: Christian König <christian.koenig@amd.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20230208090106.9659-1-Amaranath.Somalapuram@amd.com
> ---
> drivers/gpu/drm/drm_gem.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
> index aa15c52ae182..5a3ca3363f82 100644
> --- a/drivers/gpu/drm/drm_gem.c
> +++ b/drivers/gpu/drm/drm_gem.c
> @@ -152,8 +152,6 @@ EXPORT_SYMBOL(drm_gem_object_init);
> void drm_gem_private_object_init(struct drm_device *dev,
> struct drm_gem_object *obj, size_t size)
> {
> - BUG_ON((size & (PAGE_SIZE - 1)) != 0);
> -
There are also some comments in drm_gem_{get, put}_pages referring to
this exact BUG_ON(), which could do with updating now.
> obj->dev = dev;
> obj->filp = NULL;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH 7/7] drm/ttm: cleanup ttm_range_mgr_node
2023-02-17 12:22 ` [Intel-gfx] " Christian König
(?)
@ 2023-02-21 17:30 ` Matthew Auld
-1 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2023-02-21 17:30 UTC (permalink / raw)
To: Christian König; +Cc: intel-gfx, dri-devel, amd-gfx
On Fri, 17 Feb 2023 at 12:23, Christian König
<ckoenig.leichtzumerken@gmail.com> wrote:
>
> We don't need multiple drm_mm nodes any more. Clean that up and remove
> the extra complexity.
>
> Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2023-02-21 17:31 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-17 12:22 [PATCH 1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2 Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-17 12:22 ` [PATCH 2/7] drm/ttm: Change the parameters of ttm_range_man_init() from pages to bytes Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-17 12:22 ` [PATCH 3/7] drm/ttm: Change the meaning of the fields in the drm_mm_nodes structure from pfn to bytes v3 Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-17 12:22 ` [PATCH 4/7] drm/ttm: Change the meaning of resource->start from pfn to bytes v2 Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-17 12:22 ` [PATCH 5/7] drm/gem: Remove BUG_ON in drm_gem_private_object_init Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-21 17:28 ` Matthew Auld
2023-02-21 17:28 ` [Intel-gfx] " Matthew Auld
2023-02-17 12:22 ` [PATCH 6/7] drm/amdgpu: Cleanup the GDS, GWS and OA allocations Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-17 12:22 ` [PATCH 7/7] drm/ttm: cleanup ttm_range_mgr_node Christian König
2023-02-17 12:22 ` [Intel-gfx] " Christian König
2023-02-21 17:30 ` Matthew Auld
2023-02-17 15:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/7] drm/amdgpu: use amdgpu_res_cursor in more places v2 Patchwork
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