* [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains
@ 2023-03-01 12:29 Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 2/5] drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly Jani Nikula
` (6 more replies)
0 siblings, 7 replies; 10+ messages in thread
From: Jani Nikula @ 2023-03-01 12:29 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
There's only one reference to the struct intel_dmc members dc_state,
target_dc_state, and allowed_dc_mask within intel_dmc.c, begging the
question why they are under struct intel_dmc to begin with.
Moreover, the only references to i915->display.dmc outside of
intel_dmc.c are to these members.
They don't belong. Move them from struct intel_dmc to struct
i915_power_domains, which seems like a more suitable place.
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_display_power.c | 25 ++++++++-------
.../drm/i915/display/intel_display_power.h | 4 +++
.../i915/display/intel_display_power_well.c | 31 +++++++++++--------
drivers/gpu/drm/i915/display/intel_dmc.c | 3 +-
drivers/gpu/drm/i915/display/intel_dmc.h | 3 --
drivers/gpu/drm/i915/display/intel_psr.c | 3 +-
6 files changed, 39 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 743b919bb2cf..f085ae971150 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -264,9 +264,10 @@ bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
}
static u32
-sanitize_target_dc_state(struct drm_i915_private *dev_priv,
+sanitize_target_dc_state(struct drm_i915_private *i915,
u32 target_dc_state)
{
+ struct i915_power_domains *power_domains = &i915->display.power.domains;
static const u32 states[] = {
DC_STATE_EN_UPTO_DC6,
DC_STATE_EN_UPTO_DC5,
@@ -279,7 +280,7 @@ sanitize_target_dc_state(struct drm_i915_private *dev_priv,
if (target_dc_state != states[i])
continue;
- if (dev_priv->display.dmc.allowed_dc_mask & target_dc_state)
+ if (power_domains->allowed_dc_mask & target_dc_state)
break;
target_dc_state = states[i + 1];
@@ -312,7 +313,7 @@ void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv,
state = sanitize_target_dc_state(dev_priv, state);
- if (state == dev_priv->display.dmc.target_dc_state)
+ if (state == power_domains->target_dc_state)
goto unlock;
dc_off_enabled = intel_power_well_is_enabled(dev_priv, power_well);
@@ -323,7 +324,7 @@ void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv,
if (!dc_off_enabled)
intel_power_well_enable(dev_priv, power_well);
- dev_priv->display.dmc.target_dc_state = state;
+ power_domains->target_dc_state = state;
if (!dc_off_enabled)
intel_power_well_disable(dev_priv, power_well);
@@ -992,10 +993,10 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
dev_priv->params.disable_power_well =
sanitize_disable_power_well_option(dev_priv,
dev_priv->params.disable_power_well);
- dev_priv->display.dmc.allowed_dc_mask =
+ power_domains->allowed_dc_mask =
get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc);
- dev_priv->display.dmc.target_dc_state =
+ power_domains->target_dc_state =
sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
mutex_init(&power_domains->lock);
@@ -2032,7 +2033,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915,
* resources as required and also enable deeper system power states
* that would be blocked if the firmware was inactive.
*/
- if (!(i915->display.dmc.allowed_dc_mask & DC_STATE_EN_DC9) &&
+ if (!(power_domains->allowed_dc_mask & DC_STATE_EN_DC9) &&
suspend_mode == I915_DRM_SUSPEND_IDLE &&
intel_dmc_has_payload(i915)) {
intel_display_power_flush_work(i915);
@@ -2221,22 +2222,22 @@ void intel_display_power_suspend(struct drm_i915_private *i915)
void intel_display_power_resume(struct drm_i915_private *i915)
{
+ struct i915_power_domains *power_domains = &i915->display.power.domains;
+
if (DISPLAY_VER(i915) >= 11) {
bxt_disable_dc9(i915);
icl_display_core_init(i915, true);
if (intel_dmc_has_payload(i915)) {
- if (i915->display.dmc.allowed_dc_mask &
- DC_STATE_EN_UPTO_DC6)
+ if (power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC6)
skl_enable_dc6(i915);
- else if (i915->display.dmc.allowed_dc_mask &
- DC_STATE_EN_UPTO_DC5)
+ else if (power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC5)
gen9_enable_dc5(i915);
}
} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
bxt_disable_dc9(i915);
bxt_display_core_init(i915, true);
if (intel_dmc_has_payload(i915) &&
- (i915->display.dmc.allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
+ (power_domains->allowed_dc_mask & DC_STATE_EN_UPTO_DC5))
gen9_enable_dc5(i915);
} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
hsw_disable_pc8(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 2154d900b1aa..8e96be8e6330 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -137,6 +137,10 @@ struct i915_power_domains {
bool display_core_suspended;
int power_well_count;
+ u32 dc_state;
+ u32 target_dc_state;
+ u32 allowed_dc_mask;
+
intel_wakeref_t init_wakeref;
intel_wakeref_t disable_wakeref;
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 49042ece9d1c..1676df1dc066 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -691,19 +691,20 @@ static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
return mask;
}
-void gen9_sanitize_dc_state(struct drm_i915_private *dev_priv)
+void gen9_sanitize_dc_state(struct drm_i915_private *i915)
{
+ struct i915_power_domains *power_domains = &i915->display.power.domains;
u32 val;
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(i915))
return;
- val = intel_de_read(dev_priv, DC_STATE_EN) & gen9_dc_mask(dev_priv);
+ val = intel_de_read(i915, DC_STATE_EN) & gen9_dc_mask(i915);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"Resetting DC state tracking from %02x to %02x\n",
- dev_priv->display.dmc.dc_state, val);
- dev_priv->display.dmc.dc_state = val;
+ power_domains->dc_state, val);
+ power_domains->dc_state = val;
}
/**
@@ -731,6 +732,7 @@ void gen9_sanitize_dc_state(struct drm_i915_private *dev_priv)
*/
void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state)
{
+ struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
u32 val;
u32 mask;
@@ -738,8 +740,8 @@ void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state)
return;
if (drm_WARN_ON_ONCE(&dev_priv->drm,
- state & ~dev_priv->display.dmc.allowed_dc_mask))
- state &= dev_priv->display.dmc.allowed_dc_mask;
+ state & ~power_domains->allowed_dc_mask))
+ state &= power_domains->allowed_dc_mask;
val = intel_de_read(dev_priv, DC_STATE_EN);
mask = gen9_dc_mask(dev_priv);
@@ -747,16 +749,16 @@ void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state)
val & mask, state);
/* Check if DMC is ignoring our DC state requests */
- if ((val & mask) != dev_priv->display.dmc.dc_state)
+ if ((val & mask) != power_domains->dc_state)
drm_err(&dev_priv->drm, "DC state mismatch (0x%x -> 0x%x)\n",
- dev_priv->display.dmc.dc_state, val & mask);
+ power_domains->dc_state, val & mask);
val &= ~mask;
val |= state;
gen9_write_dc_state(dev_priv, val);
- dev_priv->display.dmc.dc_state = val & mask;
+ power_domains->dc_state = val & mask;
}
static void tgl_enable_dc3co(struct drm_i915_private *dev_priv)
@@ -944,9 +946,10 @@ static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)
void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
{
+ struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
struct intel_cdclk_config cdclk_config = {};
- if (dev_priv->display.dmc.target_dc_state == DC_STATE_EN_DC3CO) {
+ if (power_domains->target_dc_state == DC_STATE_EN_DC3CO) {
tgl_disable_dc3co(dev_priv);
return;
}
@@ -985,10 +988,12 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
+ struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
+
if (!intel_dmc_has_payload(dev_priv))
return;
- switch (dev_priv->display.dmc.target_dc_state) {
+ switch (power_domains->target_dc_state) {
case DC_STATE_EN_DC3CO:
tgl_enable_dc3co(dev_priv);
break;
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index f70ada2357dc..ab4fdedd4c5f 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -449,6 +449,7 @@ void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe)
*/
void intel_dmc_load_program(struct drm_i915_private *dev_priv)
{
+ struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
struct intel_dmc *dmc = &dev_priv->display.dmc;
enum intel_dmc_id dmc_id;
u32 i;
@@ -481,7 +482,7 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
}
}
- dev_priv->display.dmc.dc_state = 0;
+ power_domains->dc_state = 0;
gen9_set_dc_state_debugmask(dev_priv);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index c9808bbe7162..90910cecc2f6 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -40,9 +40,6 @@ struct intel_dmc {
bool present;
} dmc_info[DMC_FW_MAX];
- u32 dc_state;
- u32 target_dc_state;
- u32 allowed_dc_mask;
intel_wakeref_t wakeref;
};
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 6d8cf3198382..c251fa4b31de 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -690,6 +690,7 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
{
const u32 crtc_vdisplay = crtc_state->uapi.adjusted_mode.crtc_vdisplay;
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
u32 exit_scanlines;
/*
@@ -706,7 +707,7 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp,
if (crtc_state->enable_psr2_sel_fetch)
return;
- if (!(dev_priv->display.dmc.allowed_dc_mask & DC_STATE_EN_DC3CO))
+ if (!(power_domains->allowed_dc_mask & DC_STATE_EN_DC3CO))
return;
if (!dc3co_is_pipe_port_compatible(intel_dp, crtc_state))
--
2.39.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v4 2/5] drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
@ 2023-03-01 12:29 ` Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 3/5] drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them Jani Nikula
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2023-03-01 12:29 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
This will help in follow-up changes.
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index ab4fdedd4c5f..599fb92a5161 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1098,12 +1098,12 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused)
seq_printf(m, "Pipe A fw needed: %s\n",
str_yes_no(GRAPHICS_VER(i915) >= 12));
seq_printf(m, "Pipe A fw loaded: %s\n",
- str_yes_no(dmc->dmc_info[DMC_FW_PIPEA].payload));
+ str_yes_no(has_dmc_id_fw(i915, DMC_FW_PIPEA)));
seq_printf(m, "Pipe B fw needed: %s\n",
str_yes_no(IS_ALDERLAKE_P(i915) ||
DISPLAY_VER(i915) >= 14));
seq_printf(m, "Pipe B fw loaded: %s\n",
- str_yes_no(dmc->dmc_info[DMC_FW_PIPEB].payload));
+ str_yes_no(has_dmc_id_fw(i915, DMC_FW_PIPEB)));
if (!intel_dmc_has_payload(i915))
goto out;
--
2.39.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v4 3/5] drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 2/5] drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly Jani Nikula
@ 2023-03-01 12:29 ` Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 4/5] drm/i915/dmc: allocate dmc structure dynamically Jani Nikula
` (4 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2023-03-01 12:29 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Start preparing for dynamically allocated struct intel_dmc by adding
i915_to_dmc() and dmc->i915, and using them. Take the future NULL dmc
pointer into account already now, and add separate logging for
initialization in the DMC debugfs.
v3:
- Obtain runtime pm reference first (Imre)
v2:
- Don't reduce debugfs output (Imre)
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 94 ++++++++++++++----------
drivers/gpu/drm/i915/display/intel_dmc.h | 1 +
2 files changed, 56 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 599fb92a5161..acd792480aba 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -38,6 +38,11 @@
* low-power state and comes back to normal.
*/
+static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915)
+{
+ return &i915->display.dmc;
+}
+
#define DMC_VERSION(major, minor) ((major) << 16 | (minor))
#define DMC_VERSION_MAJOR(version) ((version) >> 16)
#define DMC_VERSION_MINOR(version) ((version) & 0xffff)
@@ -259,7 +264,9 @@ static bool is_valid_dmc_id(enum intel_dmc_id dmc_id)
static bool has_dmc_id_fw(struct drm_i915_private *i915, enum intel_dmc_id dmc_id)
{
- return i915->display.dmc.dmc_info[dmc_id].payload;
+ struct intel_dmc *dmc = i915_to_dmc(i915);
+
+ return dmc && dmc->dmc_info[dmc_id].payload;
}
bool intel_dmc_has_payload(struct drm_i915_private *i915)
@@ -450,7 +457,7 @@ void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe)
void intel_dmc_load_program(struct drm_i915_private *dev_priv)
{
struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
- struct intel_dmc *dmc = &dev_priv->display.dmc;
+ struct intel_dmc *dmc = i915_to_dmc(dev_priv);
enum intel_dmc_id dmc_id;
u32 i;
@@ -515,8 +522,11 @@ void intel_dmc_disable_program(struct drm_i915_private *i915)
void assert_dmc_loaded(struct drm_i915_private *i915)
{
- drm_WARN_ONCE(&i915->drm,
- !intel_de_read(i915, DMC_PROGRAM(i915->display.dmc.dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)),
+ struct intel_dmc *dmc = i915_to_dmc(i915);
+
+ drm_WARN_ONCE(&i915->drm, !dmc, "DMC not initialized\n");
+ drm_WARN_ONCE(&i915->drm, dmc &&
+ !intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)),
"DMC program storage start is NULL\n");
drm_WARN_ONCE(&i915->drm, !intel_de_read(i915, DMC_SSP_BASE),
"DMC SSP Base Not fine\n");
@@ -551,11 +561,10 @@ static void dmc_set_fw_offset(struct intel_dmc *dmc,
const struct stepping_info *si,
u8 package_ver)
{
+ struct drm_i915_private *i915 = dmc->i915;
enum intel_dmc_id dmc_id;
unsigned int i;
- struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc);
-
for (i = 0; i < num_entries; i++) {
dmc_id = package_ver <= 1 ? DMC_FW_MAIN : fw_info[i].dmc_id;
@@ -582,7 +591,7 @@ static bool dmc_mmio_addr_sanity_check(struct intel_dmc *dmc,
const u32 *mmioaddr, u32 mmio_count,
int header_ver, enum intel_dmc_id dmc_id)
{
- struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc);
+ struct drm_i915_private *i915 = dmc->i915;
u32 start_range, end_range;
int i;
@@ -615,7 +624,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
const struct intel_dmc_header_base *dmc_header,
size_t rem_size, enum intel_dmc_id dmc_id)
{
- struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc);
+ struct drm_i915_private *i915 = dmc->i915;
struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id];
unsigned int header_len_bytes, dmc_header_size, payload_size, i;
const u32 *mmioaddr, *mmiodata;
@@ -726,7 +735,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc,
const struct stepping_info *si,
size_t rem_size)
{
- struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc);
+ struct drm_i915_private *i915 = dmc->i915;
u32 package_size = sizeof(struct intel_package_header);
u32 num_entries, max_entries;
const struct intel_fw_info *fw_info;
@@ -780,7 +789,7 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
struct intel_css_header *css_header,
size_t rem_size)
{
- struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), display.dmc);
+ struct drm_i915_private *i915 = dmc->i915;
if (rem_size < sizeof(struct intel_css_header)) {
drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n");
@@ -800,13 +809,12 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
return sizeof(struct intel_css_header);
}
-static void parse_dmc_fw(struct drm_i915_private *dev_priv,
- const struct firmware *fw)
+static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
{
+ struct drm_i915_private *dev_priv = dmc->i915;
struct intel_css_header *css_header;
struct intel_package_header *package_header;
struct intel_dmc_header_base *dmc_header;
- struct intel_dmc *dmc = &dev_priv->display.dmc;
struct stepping_info display_info = { '*', '*'};
const struct stepping_info *si = intel_get_stepping_info(dev_priv, &display_info);
enum intel_dmc_id dmc_id;
@@ -833,7 +841,7 @@ static void parse_dmc_fw(struct drm_i915_private *dev_priv,
readcount += r;
for_each_dmc_id(dmc_id) {
- if (!dev_priv->display.dmc.dmc_info[dmc_id].present)
+ if (!dmc->dmc_info[dmc_id].present)
continue;
offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;
@@ -872,16 +880,13 @@ static const char *dmc_fallback_path(struct drm_i915_private *i915)
static void dmc_load_work_fn(struct work_struct *work)
{
- struct drm_i915_private *dev_priv;
- struct intel_dmc *dmc;
+ struct intel_dmc *dmc = container_of(work, typeof(*dmc), work);
+ struct drm_i915_private *dev_priv = dmc->i915;
const struct firmware *fw = NULL;
const char *fallback_path;
int err;
- dev_priv = container_of(work, typeof(*dev_priv), display.dmc.work);
- dmc = &dev_priv->display.dmc;
-
- err = request_firmware(&fw, dev_priv->display.dmc.fw_path, dev_priv->drm.dev);
+ err = request_firmware(&fw, dmc->fw_path, dev_priv->drm.dev);
if (err == -ENOENT && !dev_priv->params.dmc_firmware_path) {
fallback_path = dmc_fallback_path(dev_priv);
@@ -892,11 +897,11 @@ static void dmc_load_work_fn(struct work_struct *work)
fallback_path);
err = request_firmware(&fw, fallback_path, dev_priv->drm.dev);
if (err == 0)
- dev_priv->display.dmc.fw_path = fallback_path;
+ dmc->fw_path = fallback_path;
}
}
- parse_dmc_fw(dev_priv, fw);
+ parse_dmc_fw(dmc, fw);
if (intel_dmc_has_payload(dev_priv)) {
intel_dmc_load_program(dev_priv);
@@ -904,7 +909,7 @@ static void dmc_load_work_fn(struct work_struct *work)
drm_info(&dev_priv->drm,
"Finished loading DMC firmware %s (v%u.%u)\n",
- dev_priv->display.dmc.fw_path, DMC_VERSION_MAJOR(dmc->version),
+ dmc->fw_path, DMC_VERSION_MAJOR(dmc->version),
DMC_VERSION_MINOR(dmc->version));
} else {
drm_notice(&dev_priv->drm,
@@ -927,9 +932,7 @@ static void dmc_load_work_fn(struct work_struct *work)
*/
void intel_dmc_init(struct drm_i915_private *dev_priv)
{
- struct intel_dmc *dmc = &dev_priv->display.dmc;
-
- INIT_WORK(&dev_priv->display.dmc.work, dmc_load_work_fn);
+ struct intel_dmc *dmc;
if (!HAS_DMC(dev_priv))
return;
@@ -944,6 +947,11 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
*/
intel_dmc_runtime_pm_get(dev_priv);
+ dmc = i915_to_dmc(dev_priv);
+ dmc->i915 = dev_priv;
+
+ INIT_WORK(&dmc->work, dmc_load_work_fn);
+
if (IS_DG2(dev_priv)) {
dmc->fw_path = DG2_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
@@ -999,7 +1007,7 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
}
drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dev_priv->display.dmc.work);
+ schedule_work(&dmc->work);
}
/**
@@ -1012,10 +1020,13 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
*/
void intel_dmc_suspend(struct drm_i915_private *dev_priv)
{
+ struct intel_dmc *dmc = i915_to_dmc(dev_priv);
+
if (!HAS_DMC(dev_priv))
return;
- flush_work(&dev_priv->display.dmc.work);
+ if (dmc)
+ flush_work(&dmc->work);
/* Drop the reference held in case DMC isn't loaded. */
if (!intel_dmc_has_payload(dev_priv))
@@ -1051,6 +1062,7 @@ void intel_dmc_resume(struct drm_i915_private *dev_priv)
*/
void intel_dmc_fini(struct drm_i915_private *dev_priv)
{
+ struct intel_dmc *dmc = i915_to_dmc(dev_priv);
enum intel_dmc_id dmc_id;
if (!HAS_DMC(dev_priv))
@@ -1059,42 +1071,45 @@ void intel_dmc_fini(struct drm_i915_private *dev_priv)
intel_dmc_suspend(dev_priv);
drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
- for_each_dmc_id(dmc_id)
- kfree(dev_priv->display.dmc.dmc_info[dmc_id].payload);
+ if (dmc) {
+ for_each_dmc_id(dmc_id)
+ kfree(dmc->dmc_info[dmc_id].payload);
+ }
}
void intel_dmc_print_error_state(struct drm_i915_error_state_buf *m,
struct drm_i915_private *i915)
{
- struct intel_dmc *dmc = &i915->display.dmc;
+ struct intel_dmc *dmc = i915_to_dmc(i915);
if (!HAS_DMC(i915))
return;
+ i915_error_printf(m, "DMC initialized: %s\n", str_yes_no(dmc));
i915_error_printf(m, "DMC loaded: %s\n",
str_yes_no(intel_dmc_has_payload(i915)));
- i915_error_printf(m, "DMC fw version: %d.%d\n",
- DMC_VERSION_MAJOR(dmc->version),
- DMC_VERSION_MINOR(dmc->version));
+ if (dmc)
+ i915_error_printf(m, "DMC fw version: %d.%d\n",
+ DMC_VERSION_MAJOR(dmc->version),
+ DMC_VERSION_MINOR(dmc->version));
}
static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused)
{
struct drm_i915_private *i915 = m->private;
+ struct intel_dmc *dmc = i915_to_dmc(i915);
intel_wakeref_t wakeref;
- struct intel_dmc *dmc;
i915_reg_t dc5_reg, dc6_reg = INVALID_MMIO_REG;
if (!HAS_DMC(i915))
return -ENODEV;
- dmc = &i915->display.dmc;
-
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+ seq_printf(m, "DMC initialized: %s\n", str_yes_no(dmc));
seq_printf(m, "fw loaded: %s\n",
str_yes_no(intel_dmc_has_payload(i915)));
- seq_printf(m, "path: %s\n", dmc->fw_path);
+ seq_printf(m, "path: %s\n", dmc ? dmc->fw_path : "N/A");
seq_printf(m, "Pipe A fw needed: %s\n",
str_yes_no(GRAPHICS_VER(i915) >= 12));
seq_printf(m, "Pipe A fw loaded: %s\n",
@@ -1137,9 +1152,10 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused)
seq_printf(m, "DC5 -> DC6 count: %d\n",
intel_de_read(i915, dc6_reg));
-out:
seq_printf(m, "program base: 0x%08x\n",
intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)));
+
+out:
seq_printf(m, "ssp base: 0x%08x\n",
intel_de_read(i915, DMC_SSP_BASE));
seq_printf(m, "htp: 0x%08x\n", intel_de_read(i915, DMC_HTP_SKL));
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index 90910cecc2f6..b74635497aa7 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -25,6 +25,7 @@ enum intel_dmc_id {
};
struct intel_dmc {
+ struct drm_i915_private *i915;
struct work_struct work;
const char *fw_path;
u32 max_fw_size; /* bytes */
--
2.39.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v4 4/5] drm/i915/dmc: allocate dmc structure dynamically
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 2/5] drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 3/5] drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them Jani Nikula
@ 2023-03-01 12:29 ` Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915 Jani Nikula
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2023-03-01 12:29 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
sizeof(struct intel_dmc) > 1024 bytes, allocated on all platforms as
part of struct drm_i915_private, whether they have DMC or not.
Allocate struct intel_dmc dynamically, and hide all the dmc details
behind an opaque pointer in intel_dmc.c.
Care must be taken to take into account all cases: DMC not supported on
the platform, DMC supported but not initialized, and DMC initialized but
not loaded. For the second case, we need to move the wakeref out of
struct intel_dmc.
v2:
- Rebase to kzalloc dmc after runtime pm get (Imre)
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 8 ++-
drivers/gpu/drm/i915/display/intel_dmc.c | 50 +++++++++++++++++--
drivers/gpu/drm/i915/display/intel_dmc.h | 34 +------------
.../drm/i915/display/intel_modeset_setup.c | 1 +
4 files changed, 53 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 631a7b17899e..fdab7bb93a7d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -19,7 +19,6 @@
#include "intel_cdclk.h"
#include "intel_display_limits.h"
#include "intel_display_power.h"
-#include "intel_dmc.h"
#include "intel_dpll_mgr.h"
#include "intel_fbc.h"
#include "intel_global_state.h"
@@ -40,6 +39,7 @@ struct intel_cdclk_vals;
struct intel_color_funcs;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_dmc;
struct intel_dpll_funcs;
struct intel_dpll_mgr;
struct intel_fbdev;
@@ -340,6 +340,11 @@ struct intel_display {
spinlock_t phy_lock;
} dkl;
+ struct {
+ struct intel_dmc *dmc;
+ intel_wakeref_t wakeref;
+ } dmc;
+
struct {
/* VLV/CHV/BXT/GLK DSI MMIO register base address */
u32 mmio_base;
@@ -467,7 +472,6 @@ struct intel_display {
/* Grouping using named structs. Keep sorted. */
struct intel_audio audio;
- struct intel_dmc dmc;
struct intel_dpll dpll;
struct intel_fbc *fbc[I915_MAX_FBCS];
struct intel_frontbuffer_tracking fb_tracking;
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index acd792480aba..302a465ceb1f 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -38,9 +38,37 @@
* low-power state and comes back to normal.
*/
+enum intel_dmc_id {
+ DMC_FW_MAIN = 0,
+ DMC_FW_PIPEA,
+ DMC_FW_PIPEB,
+ DMC_FW_PIPEC,
+ DMC_FW_PIPED,
+ DMC_FW_MAX
+};
+
+struct intel_dmc {
+ struct drm_i915_private *i915;
+ struct work_struct work;
+ const char *fw_path;
+ u32 max_fw_size; /* bytes */
+ u32 version;
+ struct dmc_fw_info {
+ u32 mmio_count;
+ i915_reg_t mmioaddr[20];
+ u32 mmiodata[20];
+ u32 dmc_offset;
+ u32 start_mmioaddr;
+ u32 dmc_fw_size; /*dwords */
+ u32 *payload;
+ bool present;
+ } dmc_info[DMC_FW_MAX];
+};
+
+/* Note: This may be NULL. */
static struct intel_dmc *i915_to_dmc(struct drm_i915_private *i915)
{
- return &i915->display.dmc;
+ return i915->display.dmc.dmc;
}
#define DMC_VERSION(major, minor) ((major) << 16 | (minor))
@@ -947,7 +975,10 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
*/
intel_dmc_runtime_pm_get(dev_priv);
- dmc = i915_to_dmc(dev_priv);
+ dmc = kzalloc(sizeof(*dmc), GFP_KERNEL);
+ if (!dmc)
+ return;
+
dmc->i915 = dev_priv;
INIT_WORK(&dmc->work, dmc_load_work_fn);
@@ -991,10 +1022,9 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
if (dev_priv->params.dmc_firmware_path) {
if (strlen(dev_priv->params.dmc_firmware_path) == 0) {
- dmc->fw_path = NULL;
drm_info(&dev_priv->drm,
"Disabling DMC firmware and runtime PM\n");
- return;
+ goto out;
}
dmc->fw_path = dev_priv->params.dmc_firmware_path;
@@ -1003,11 +1033,18 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
if (!dmc->fw_path) {
drm_dbg_kms(&dev_priv->drm,
"No known DMC firmware for platform, disabling runtime PM\n");
- return;
+ goto out;
}
+ dev_priv->display.dmc.dmc = dmc;
+
drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
schedule_work(&dmc->work);
+
+ return;
+
+out:
+ kfree(dmc);
}
/**
@@ -1074,6 +1111,9 @@ void intel_dmc_fini(struct drm_i915_private *dev_priv)
if (dmc) {
for_each_dmc_id(dmc_id)
kfree(dmc->dmc_info[dmc_id].payload);
+
+ kfree(dmc);
+ dev_priv->display.dmc.dmc = NULL;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h
index b74635497aa7..fd607afff2ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc.h
@@ -6,44 +6,12 @@
#ifndef __INTEL_DMC_H__
#define __INTEL_DMC_H__
-#include "i915_reg_defs.h"
-#include "intel_wakeref.h"
-#include <linux/workqueue.h>
+#include <linux/types.h>
struct drm_i915_error_state_buf;
struct drm_i915_private;
-
enum pipe;
-enum intel_dmc_id {
- DMC_FW_MAIN = 0,
- DMC_FW_PIPEA,
- DMC_FW_PIPEB,
- DMC_FW_PIPEC,
- DMC_FW_PIPED,
- DMC_FW_MAX
-};
-
-struct intel_dmc {
- struct drm_i915_private *i915;
- struct work_struct work;
- const char *fw_path;
- u32 max_fw_size; /* bytes */
- u32 version;
- struct dmc_fw_info {
- u32 mmio_count;
- i915_reg_t mmioaddr[20];
- u32 mmiodata[20];
- u32 dmc_offset;
- u32 start_mmioaddr;
- u32 dmc_fw_size; /*dwords */
- u32 *payload;
- bool present;
- } dmc_info[DMC_FW_MAX];
-
- intel_wakeref_t wakeref;
-};
-
void intel_dmc_init(struct drm_i915_private *i915);
void intel_dmc_load_program(struct drm_i915_private *i915);
void intel_dmc_disable_program(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 60f71e6f0491..0f7b414eb472 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -22,6 +22,7 @@
#include "intel_display.h"
#include "intel_display_power.h"
#include "intel_display_types.h"
+#include "intel_dmc.h"
#include "intel_fifo_underrun.h"
#include "intel_modeset_setup.h"
#include "intel_pch_display.h"
--
2.39.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
` (2 preceding siblings ...)
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 4/5] drm/i915/dmc: allocate dmc structure dynamically Jani Nikula
@ 2023-03-01 12:29 ` Jani Nikula
2023-03-02 11:35 ` Imre Deak
2023-03-01 20:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2023-03-01 12:29 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Follow the contemporary convention for struct drm_i915_private * naming.
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 166 +++++++++++------------
1 file changed, 81 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 302a465ceb1f..6b162f77340e 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -313,12 +313,12 @@ intel_get_stepping_info(struct drm_i915_private *i915,
return si;
}
-static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
+static void gen9_set_dc_state_debugmask(struct drm_i915_private *i915)
{
/* The below bit doesn't need to be cleared ever afterwards */
- intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0,
+ intel_de_rmw(i915, DC_STATE_DEBUG, 0,
DC_STATE_DEBUG_MASK_CORES | DC_STATE_DEBUG_MASK_MEMORY_UP);
- intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
+ intel_de_posting_read(i915, DC_STATE_DEBUG);
}
static void disable_event_handler(struct drm_i915_private *i915,
@@ -476,33 +476,33 @@ void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe)
/**
* intel_dmc_load_program() - write the firmware from memory to register.
- * @dev_priv: i915 drm device.
+ * @i915: i915 drm device.
*
* DMC firmware is read from a .bin file and kept in internal memory one time.
* Everytime display comes back from low power state this function is called to
* copy the firmware from internal memory to registers.
*/
-void intel_dmc_load_program(struct drm_i915_private *dev_priv)
+void intel_dmc_load_program(struct drm_i915_private *i915)
{
- struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
- struct intel_dmc *dmc = i915_to_dmc(dev_priv);
+ struct i915_power_domains *power_domains = &i915->display.power.domains;
+ struct intel_dmc *dmc = i915_to_dmc(i915);
enum intel_dmc_id dmc_id;
u32 i;
- if (!intel_dmc_has_payload(dev_priv))
+ if (!intel_dmc_has_payload(i915))
return;
- pipedmc_clock_gating_wa(dev_priv, true);
+ pipedmc_clock_gating_wa(i915, true);
- disable_all_event_handlers(dev_priv);
+ disable_all_event_handlers(i915);
- assert_rpm_wakelock_held(&dev_priv->runtime_pm);
+ assert_rpm_wakelock_held(&i915->runtime_pm);
preempt_disable();
for_each_dmc_id(dmc_id) {
for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) {
- intel_de_write_fw(dev_priv,
+ intel_de_write_fw(i915,
DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i),
dmc->dmc_info[dmc_id].payload[i]);
}
@@ -512,23 +512,23 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
for_each_dmc_id(dmc_id) {
for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) {
- intel_de_write(dev_priv, dmc->dmc_info[dmc_id].mmioaddr[i],
+ intel_de_write(i915, dmc->dmc_info[dmc_id].mmioaddr[i],
dmc->dmc_info[dmc_id].mmiodata[i]);
}
}
power_domains->dc_state = 0;
- gen9_set_dc_state_debugmask(dev_priv);
+ gen9_set_dc_state_debugmask(i915);
/*
* Flip queue events need to be disabled before enabling DC5/6.
* i915 doesn't use the flip queue feature, so disable it already
* here.
*/
- disable_all_flip_queue_events(dev_priv);
+ disable_all_flip_queue_events(i915);
- pipedmc_clock_gating_wa(dev_priv, false);
+ pipedmc_clock_gating_wa(i915, false);
}
/**
@@ -839,12 +839,12 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
{
- struct drm_i915_private *dev_priv = dmc->i915;
+ struct drm_i915_private *i915 = dmc->i915;
struct intel_css_header *css_header;
struct intel_package_header *package_header;
struct intel_dmc_header_base *dmc_header;
struct stepping_info display_info = { '*', '*'};
- const struct stepping_info *si = intel_get_stepping_info(dev_priv, &display_info);
+ const struct stepping_info *si = intel_get_stepping_info(i915, &display_info);
enum intel_dmc_id dmc_id;
u32 readcount = 0;
u32 r, offset;
@@ -874,7 +874,7 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;
if (offset > fw->size) {
- drm_err(&dev_priv->drm, "Reading beyond the fw_size\n");
+ drm_err(&i915->drm, "Reading beyond the fw_size\n");
continue;
}
@@ -883,19 +883,18 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
}
}
-static void intel_dmc_runtime_pm_get(struct drm_i915_private *dev_priv)
+static void intel_dmc_runtime_pm_get(struct drm_i915_private *i915)
{
- drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
- dev_priv->display.dmc.wakeref =
- intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+ drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
+ i915->display.dmc.wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
}
-static void intel_dmc_runtime_pm_put(struct drm_i915_private *dev_priv)
+static void intel_dmc_runtime_pm_put(struct drm_i915_private *i915)
{
intel_wakeref_t wakeref __maybe_unused =
- fetch_and_zero(&dev_priv->display.dmc.wakeref);
+ fetch_and_zero(&i915->display.dmc.wakeref);
- intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
}
static const char *dmc_fallback_path(struct drm_i915_private *i915)
@@ -909,21 +908,19 @@ static const char *dmc_fallback_path(struct drm_i915_private *i915)
static void dmc_load_work_fn(struct work_struct *work)
{
struct intel_dmc *dmc = container_of(work, typeof(*dmc), work);
- struct drm_i915_private *dev_priv = dmc->i915;
+ struct drm_i915_private *i915 = dmc->i915;
const struct firmware *fw = NULL;
const char *fallback_path;
int err;
- err = request_firmware(&fw, dmc->fw_path, dev_priv->drm.dev);
+ err = request_firmware(&fw, dmc->fw_path, i915->drm.dev);
- if (err == -ENOENT && !dev_priv->params.dmc_firmware_path) {
- fallback_path = dmc_fallback_path(dev_priv);
+ if (err == -ENOENT && !i915->params.dmc_firmware_path) {
+ fallback_path = dmc_fallback_path(i915);
if (fallback_path) {
- drm_dbg_kms(&dev_priv->drm,
- "%s not found, falling back to %s\n",
- dmc->fw_path,
- fallback_path);
- err = request_firmware(&fw, fallback_path, dev_priv->drm.dev);
+ drm_dbg_kms(&i915->drm, "%s not found, falling back to %s\n",
+ dmc->fw_path, fallback_path);
+ err = request_firmware(&fw, fallback_path, i915->drm.dev);
if (err == 0)
dmc->fw_path = fallback_path;
}
@@ -931,20 +928,19 @@ static void dmc_load_work_fn(struct work_struct *work)
parse_dmc_fw(dmc, fw);
- if (intel_dmc_has_payload(dev_priv)) {
- intel_dmc_load_program(dev_priv);
- intel_dmc_runtime_pm_put(dev_priv);
+ if (intel_dmc_has_payload(i915)) {
+ intel_dmc_load_program(i915);
+ intel_dmc_runtime_pm_put(i915);
- drm_info(&dev_priv->drm,
- "Finished loading DMC firmware %s (v%u.%u)\n",
+ drm_info(&i915->drm, "Finished loading DMC firmware %s (v%u.%u)\n",
dmc->fw_path, DMC_VERSION_MAJOR(dmc->version),
DMC_VERSION_MINOR(dmc->version));
} else {
- drm_notice(&dev_priv->drm,
+ drm_notice(&i915->drm,
"Failed to load DMC firmware %s."
" Disabling runtime power management.\n",
dmc->fw_path);
- drm_notice(&dev_priv->drm, "DMC firmware homepage: %s",
+ drm_notice(&i915->drm, "DMC firmware homepage: %s",
INTEL_UC_FIRMWARE_URL);
}
@@ -953,16 +949,16 @@ static void dmc_load_work_fn(struct work_struct *work)
/**
* intel_dmc_init() - initialize the firmware loading.
- * @dev_priv: i915 drm device.
+ * @i915: i915 drm device.
*
* This function is called at the time of loading the display driver to read
* firmware from a .bin file and copied into a internal memory.
*/
-void intel_dmc_init(struct drm_i915_private *dev_priv)
+void intel_dmc_init(struct drm_i915_private *i915)
{
struct intel_dmc *dmc;
- if (!HAS_DMC(dev_priv))
+ if (!HAS_DMC(i915))
return;
/*
@@ -973,72 +969,72 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
* suspend as runtime suspend *requires* a working DMC for whatever
* reason.
*/
- intel_dmc_runtime_pm_get(dev_priv);
+ intel_dmc_runtime_pm_get(i915);
dmc = kzalloc(sizeof(*dmc), GFP_KERNEL);
if (!dmc)
return;
- dmc->i915 = dev_priv;
+ dmc->i915 = i915;
INIT_WORK(&dmc->work, dmc_load_work_fn);
- if (IS_DG2(dev_priv)) {
+ if (IS_DG2(i915)) {
dmc->fw_path = DG2_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
- } else if (IS_ALDERLAKE_P(dev_priv)) {
+ } else if (IS_ALDERLAKE_P(i915)) {
dmc->fw_path = ADLP_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
- } else if (IS_ALDERLAKE_S(dev_priv)) {
+ } else if (IS_ALDERLAKE_S(i915)) {
dmc->fw_path = ADLS_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
- } else if (IS_DG1(dev_priv)) {
+ } else if (IS_DG1(i915)) {
dmc->fw_path = DG1_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
- } else if (IS_ROCKETLAKE(dev_priv)) {
+ } else if (IS_ROCKETLAKE(i915)) {
dmc->fw_path = RKL_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
- } else if (IS_TIGERLAKE(dev_priv)) {
+ } else if (IS_TIGERLAKE(i915)) {
dmc->fw_path = TGL_DMC_PATH;
dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
- } else if (DISPLAY_VER(dev_priv) == 11) {
+ } else if (DISPLAY_VER(i915) == 11) {
dmc->fw_path = ICL_DMC_PATH;
dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE;
- } else if (IS_GEMINILAKE(dev_priv)) {
+ } else if (IS_GEMINILAKE(i915)) {
dmc->fw_path = GLK_DMC_PATH;
dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE;
- } else if (IS_KABYLAKE(dev_priv) ||
- IS_COFFEELAKE(dev_priv) ||
- IS_COMETLAKE(dev_priv)) {
+ } else if (IS_KABYLAKE(i915) ||
+ IS_COFFEELAKE(i915) ||
+ IS_COMETLAKE(i915)) {
dmc->fw_path = KBL_DMC_PATH;
dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE;
- } else if (IS_SKYLAKE(dev_priv)) {
+ } else if (IS_SKYLAKE(i915)) {
dmc->fw_path = SKL_DMC_PATH;
dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE;
- } else if (IS_BROXTON(dev_priv)) {
+ } else if (IS_BROXTON(i915)) {
dmc->fw_path = BXT_DMC_PATH;
dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE;
}
- if (dev_priv->params.dmc_firmware_path) {
- if (strlen(dev_priv->params.dmc_firmware_path) == 0) {
- drm_info(&dev_priv->drm,
+ if (i915->params.dmc_firmware_path) {
+ if (strlen(i915->params.dmc_firmware_path) == 0) {
+ drm_info(&i915->drm,
"Disabling DMC firmware and runtime PM\n");
goto out;
}
- dmc->fw_path = dev_priv->params.dmc_firmware_path;
+ dmc->fw_path = i915->params.dmc_firmware_path;
}
if (!dmc->fw_path) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(&i915->drm,
"No known DMC firmware for platform, disabling runtime PM\n");
goto out;
}
- dev_priv->display.dmc.dmc = dmc;
+ i915->display.dmc.dmc = dmc;
- drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
+ drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
schedule_work(&dmc->work);
return;
@@ -1049,71 +1045,71 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
/**
* intel_dmc_suspend() - prepare DMC firmware before system suspend
- * @dev_priv: i915 drm device
+ * @i915: i915 drm device
*
* Prepare the DMC firmware before entering system suspend. This includes
* flushing pending work items and releasing any resources acquired during
* init.
*/
-void intel_dmc_suspend(struct drm_i915_private *dev_priv)
+void intel_dmc_suspend(struct drm_i915_private *i915)
{
- struct intel_dmc *dmc = i915_to_dmc(dev_priv);
+ struct intel_dmc *dmc = i915_to_dmc(i915);
- if (!HAS_DMC(dev_priv))
+ if (!HAS_DMC(i915))
return;
if (dmc)
flush_work(&dmc->work);
/* Drop the reference held in case DMC isn't loaded. */
- if (!intel_dmc_has_payload(dev_priv))
- intel_dmc_runtime_pm_put(dev_priv);
+ if (!intel_dmc_has_payload(i915))
+ intel_dmc_runtime_pm_put(i915);
}
/**
* intel_dmc_resume() - init DMC firmware during system resume
- * @dev_priv: i915 drm device
+ * @i915: i915 drm device
*
* Reinitialize the DMC firmware during system resume, reacquiring any
* resources released in intel_dmc_suspend().
*/
-void intel_dmc_resume(struct drm_i915_private *dev_priv)
+void intel_dmc_resume(struct drm_i915_private *i915)
{
- if (!HAS_DMC(dev_priv))
+ if (!HAS_DMC(i915))
return;
/*
* Reacquire the reference to keep RPM disabled in case DMC isn't
* loaded.
*/
- if (!intel_dmc_has_payload(dev_priv))
- intel_dmc_runtime_pm_get(dev_priv);
+ if (!intel_dmc_has_payload(i915))
+ intel_dmc_runtime_pm_get(i915);
}
/**
* intel_dmc_fini() - unload the DMC firmware.
- * @dev_priv: i915 drm device.
+ * @i915: i915 drm device.
*
* Firmmware unloading includes freeing the internal memory and reset the
* firmware loading status.
*/
-void intel_dmc_fini(struct drm_i915_private *dev_priv)
+void intel_dmc_fini(struct drm_i915_private *i915)
{
- struct intel_dmc *dmc = i915_to_dmc(dev_priv);
+ struct intel_dmc *dmc = i915_to_dmc(i915);
enum intel_dmc_id dmc_id;
- if (!HAS_DMC(dev_priv))
+ if (!HAS_DMC(i915))
return;
- intel_dmc_suspend(dev_priv);
- drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
+ intel_dmc_suspend(i915);
+ drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
if (dmc) {
for_each_dmc_id(dmc_id)
kfree(dmc->dmc_info[dmc_id].payload);
kfree(dmc);
- dev_priv->display.dmc.dmc = NULL;
+ i915->display.dmc.dmc = NULL;
}
}
--
2.39.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
` (3 preceding siblings ...)
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915 Jani Nikula
@ 2023-03-01 20:04 ` Patchwork
2023-03-01 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-04 1:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-01 20:04 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
URL : https://patchwork.freedesktop.org/series/114515/
State : warning
== Summary ==
Error: dim checkpatch failed
873ffa5c0eff drm/i915/power: move dc state members to struct i915_power_domains
b963889cc295 drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly
20363d3a692a drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them
-:66: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/display/intel_dmc.c:529:
+ !intel_de_read(i915, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)),
total: 0 errors, 1 warnings, 0 checks, 272 lines checked
96d43b5f4dc6 drm/i915/dmc: allocate dmc structure dynamically
b10c49af6653 drm/i915/dmc: mass rename dev_priv to i915
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
` (4 preceding siblings ...)
2023-03-01 20:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains Patchwork
@ 2023-03-01 20:28 ` Patchwork
2023-03-04 1:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-01 20:28 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6348 bytes --]
== Series Details ==
Series: series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
URL : https://patchwork.freedesktop.org/series/114515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12799 -> Patchwork_114515v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/index.html
Participating hosts (40 -> 39)
------------------------------
Additional (1): fi-kbl-soraka
Missing (2): fi-snb-2520m fi-pnv-d510
Known issues
------------
Here are the changes found in Patchwork_114515v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: NOTRUN -> [ABORT][1] ([i915#6687] / [i915#7978])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][4] ([i915#7913])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][5] -> [DMESG-FAIL][6] ([i915#5334])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@reset:
- bat-rpls-2: [PASS][8] -> [ABORT][9] ([i915#4983] / [i915#7913])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/bat-rpls-2/igt@i915_selftest@live@reset.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@i915_selftest@live@workarounds:
- bat-adlm-1: [PASS][10] -> [INCOMPLETE][11] ([i915#4983] / [i915#7677])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/bat-adlm-1/igt@i915_selftest@live@workarounds.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-adlm-1/igt@i915_selftest@live@workarounds.html
* igt@i915_suspend@basic-s2idle-without-i915:
- fi-kbl-x1275: [PASS][12] -> [ABORT][13] ([i915#8213])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/fi-kbl-x1275/igt@i915_suspend@basic-s2idle-without-i915.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-x1275/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-kbl-soraka: NOTRUN -> [SKIP][14] ([fdo#109271]) +16 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/fi-kbl-soraka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][15] ([i915#3546]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-adlp-9/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@migrate:
- bat-atsm-1: [DMESG-FAIL][16] ([i915#7699]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/bat-atsm-1/igt@i915_selftest@live@migrate.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-atsm-1/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: [ABORT][18] ([i915#4983]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/bat-rpls-1/igt@i915_selftest@live@reset.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/bat-rpls-1/igt@i915_selftest@live@reset.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7677]: https://gitlab.freedesktop.org/drm/intel/issues/7677
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
Build changes
-------------
* Linux: CI_DRM_12799 -> Patchwork_114515v1
CI-20190529: 20190529
CI_DRM_12799: 5f6631c00a7f226c990aecc643bc9fa70da1599a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7178: ffe3f6670b91ab975f90799ab3fd0941b6eae019 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114515v1: 5f6631c00a7f226c990aecc643bc9fa70da1599a @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
df7c5c564faf drm/i915/dmc: mass rename dev_priv to i915
e6b6f230e4f0 drm/i915/dmc: allocate dmc structure dynamically
f53b60235e11 drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them
ebc358102ebe drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly
98d9e3e9bd55 drm/i915/power: move dc state members to struct i915_power_domains
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/index.html
[-- Attachment #2: Type: text/html, Size: 7637 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915 Jani Nikula
@ 2023-03-02 11:35 ` Imre Deak
2023-03-06 17:26 ` Jani Nikula
0 siblings, 1 reply; 10+ messages in thread
From: Imre Deak @ 2023-03-02 11:35 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Wed, Mar 01, 2023 at 02:29:44PM +0200, Jani Nikula wrote:
> Follow the contemporary convention for struct drm_i915_private * naming.
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Looks ok to me, on the patchset:
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 166 +++++++++++------------
> 1 file changed, 81 insertions(+), 85 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 302a465ceb1f..6b162f77340e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -313,12 +313,12 @@ intel_get_stepping_info(struct drm_i915_private *i915,
> return si;
> }
>
> -static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
> +static void gen9_set_dc_state_debugmask(struct drm_i915_private *i915)
> {
> /* The below bit doesn't need to be cleared ever afterwards */
> - intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0,
> + intel_de_rmw(i915, DC_STATE_DEBUG, 0,
> DC_STATE_DEBUG_MASK_CORES | DC_STATE_DEBUG_MASK_MEMORY_UP);
> - intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
> + intel_de_posting_read(i915, DC_STATE_DEBUG);
> }
>
> static void disable_event_handler(struct drm_i915_private *i915,
> @@ -476,33 +476,33 @@ void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe)
>
> /**
> * intel_dmc_load_program() - write the firmware from memory to register.
> - * @dev_priv: i915 drm device.
> + * @i915: i915 drm device.
> *
> * DMC firmware is read from a .bin file and kept in internal memory one time.
> * Everytime display comes back from low power state this function is called to
> * copy the firmware from internal memory to registers.
> */
> -void intel_dmc_load_program(struct drm_i915_private *dev_priv)
> +void intel_dmc_load_program(struct drm_i915_private *i915)
> {
> - struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
> + struct i915_power_domains *power_domains = &i915->display.power.domains;
> + struct intel_dmc *dmc = i915_to_dmc(i915);
> enum intel_dmc_id dmc_id;
> u32 i;
>
> - if (!intel_dmc_has_payload(dev_priv))
> + if (!intel_dmc_has_payload(i915))
> return;
>
> - pipedmc_clock_gating_wa(dev_priv, true);
> + pipedmc_clock_gating_wa(i915, true);
>
> - disable_all_event_handlers(dev_priv);
> + disable_all_event_handlers(i915);
>
> - assert_rpm_wakelock_held(&dev_priv->runtime_pm);
> + assert_rpm_wakelock_held(&i915->runtime_pm);
>
> preempt_disable();
>
> for_each_dmc_id(dmc_id) {
> for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) {
> - intel_de_write_fw(dev_priv,
> + intel_de_write_fw(i915,
> DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i),
> dmc->dmc_info[dmc_id].payload[i]);
> }
> @@ -512,23 +512,23 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
>
> for_each_dmc_id(dmc_id) {
> for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) {
> - intel_de_write(dev_priv, dmc->dmc_info[dmc_id].mmioaddr[i],
> + intel_de_write(i915, dmc->dmc_info[dmc_id].mmioaddr[i],
> dmc->dmc_info[dmc_id].mmiodata[i]);
> }
> }
>
> power_domains->dc_state = 0;
>
> - gen9_set_dc_state_debugmask(dev_priv);
> + gen9_set_dc_state_debugmask(i915);
>
> /*
> * Flip queue events need to be disabled before enabling DC5/6.
> * i915 doesn't use the flip queue feature, so disable it already
> * here.
> */
> - disable_all_flip_queue_events(dev_priv);
> + disable_all_flip_queue_events(i915);
>
> - pipedmc_clock_gating_wa(dev_priv, false);
> + pipedmc_clock_gating_wa(i915, false);
> }
>
> /**
> @@ -839,12 +839,12 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
>
> static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
> {
> - struct drm_i915_private *dev_priv = dmc->i915;
> + struct drm_i915_private *i915 = dmc->i915;
> struct intel_css_header *css_header;
> struct intel_package_header *package_header;
> struct intel_dmc_header_base *dmc_header;
> struct stepping_info display_info = { '*', '*'};
> - const struct stepping_info *si = intel_get_stepping_info(dev_priv, &display_info);
> + const struct stepping_info *si = intel_get_stepping_info(i915, &display_info);
> enum intel_dmc_id dmc_id;
> u32 readcount = 0;
> u32 r, offset;
> @@ -874,7 +874,7 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
>
> offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;
> if (offset > fw->size) {
> - drm_err(&dev_priv->drm, "Reading beyond the fw_size\n");
> + drm_err(&i915->drm, "Reading beyond the fw_size\n");
> continue;
> }
>
> @@ -883,19 +883,18 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
> }
> }
>
> -static void intel_dmc_runtime_pm_get(struct drm_i915_private *dev_priv)
> +static void intel_dmc_runtime_pm_get(struct drm_i915_private *i915)
> {
> - drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
> - dev_priv->display.dmc.wakeref =
> - intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
> + drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
> + i915->display.dmc.wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
> }
>
> -static void intel_dmc_runtime_pm_put(struct drm_i915_private *dev_priv)
> +static void intel_dmc_runtime_pm_put(struct drm_i915_private *i915)
> {
> intel_wakeref_t wakeref __maybe_unused =
> - fetch_and_zero(&dev_priv->display.dmc.wakeref);
> + fetch_and_zero(&i915->display.dmc.wakeref);
>
> - intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
> + intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
> }
>
> static const char *dmc_fallback_path(struct drm_i915_private *i915)
> @@ -909,21 +908,19 @@ static const char *dmc_fallback_path(struct drm_i915_private *i915)
> static void dmc_load_work_fn(struct work_struct *work)
> {
> struct intel_dmc *dmc = container_of(work, typeof(*dmc), work);
> - struct drm_i915_private *dev_priv = dmc->i915;
> + struct drm_i915_private *i915 = dmc->i915;
> const struct firmware *fw = NULL;
> const char *fallback_path;
> int err;
>
> - err = request_firmware(&fw, dmc->fw_path, dev_priv->drm.dev);
> + err = request_firmware(&fw, dmc->fw_path, i915->drm.dev);
>
> - if (err == -ENOENT && !dev_priv->params.dmc_firmware_path) {
> - fallback_path = dmc_fallback_path(dev_priv);
> + if (err == -ENOENT && !i915->params.dmc_firmware_path) {
> + fallback_path = dmc_fallback_path(i915);
> if (fallback_path) {
> - drm_dbg_kms(&dev_priv->drm,
> - "%s not found, falling back to %s\n",
> - dmc->fw_path,
> - fallback_path);
> - err = request_firmware(&fw, fallback_path, dev_priv->drm.dev);
> + drm_dbg_kms(&i915->drm, "%s not found, falling back to %s\n",
> + dmc->fw_path, fallback_path);
> + err = request_firmware(&fw, fallback_path, i915->drm.dev);
> if (err == 0)
> dmc->fw_path = fallback_path;
> }
> @@ -931,20 +928,19 @@ static void dmc_load_work_fn(struct work_struct *work)
>
> parse_dmc_fw(dmc, fw);
>
> - if (intel_dmc_has_payload(dev_priv)) {
> - intel_dmc_load_program(dev_priv);
> - intel_dmc_runtime_pm_put(dev_priv);
> + if (intel_dmc_has_payload(i915)) {
> + intel_dmc_load_program(i915);
> + intel_dmc_runtime_pm_put(i915);
>
> - drm_info(&dev_priv->drm,
> - "Finished loading DMC firmware %s (v%u.%u)\n",
> + drm_info(&i915->drm, "Finished loading DMC firmware %s (v%u.%u)\n",
> dmc->fw_path, DMC_VERSION_MAJOR(dmc->version),
> DMC_VERSION_MINOR(dmc->version));
> } else {
> - drm_notice(&dev_priv->drm,
> + drm_notice(&i915->drm,
> "Failed to load DMC firmware %s."
> " Disabling runtime power management.\n",
> dmc->fw_path);
> - drm_notice(&dev_priv->drm, "DMC firmware homepage: %s",
> + drm_notice(&i915->drm, "DMC firmware homepage: %s",
> INTEL_UC_FIRMWARE_URL);
> }
>
> @@ -953,16 +949,16 @@ static void dmc_load_work_fn(struct work_struct *work)
>
> /**
> * intel_dmc_init() - initialize the firmware loading.
> - * @dev_priv: i915 drm device.
> + * @i915: i915 drm device.
> *
> * This function is called at the time of loading the display driver to read
> * firmware from a .bin file and copied into a internal memory.
> */
> -void intel_dmc_init(struct drm_i915_private *dev_priv)
> +void intel_dmc_init(struct drm_i915_private *i915)
> {
> struct intel_dmc *dmc;
>
> - if (!HAS_DMC(dev_priv))
> + if (!HAS_DMC(i915))
> return;
>
> /*
> @@ -973,72 +969,72 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
> * suspend as runtime suspend *requires* a working DMC for whatever
> * reason.
> */
> - intel_dmc_runtime_pm_get(dev_priv);
> + intel_dmc_runtime_pm_get(i915);
>
> dmc = kzalloc(sizeof(*dmc), GFP_KERNEL);
> if (!dmc)
> return;
>
> - dmc->i915 = dev_priv;
> + dmc->i915 = i915;
>
> INIT_WORK(&dmc->work, dmc_load_work_fn);
>
> - if (IS_DG2(dev_priv)) {
> + if (IS_DG2(i915)) {
> dmc->fw_path = DG2_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
> - } else if (IS_ALDERLAKE_P(dev_priv)) {
> + } else if (IS_ALDERLAKE_P(i915)) {
> dmc->fw_path = ADLP_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
> - } else if (IS_ALDERLAKE_S(dev_priv)) {
> + } else if (IS_ALDERLAKE_S(i915)) {
> dmc->fw_path = ADLS_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
> - } else if (IS_DG1(dev_priv)) {
> + } else if (IS_DG1(i915)) {
> dmc->fw_path = DG1_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
> - } else if (IS_ROCKETLAKE(dev_priv)) {
> + } else if (IS_ROCKETLAKE(i915)) {
> dmc->fw_path = RKL_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
> - } else if (IS_TIGERLAKE(dev_priv)) {
> + } else if (IS_TIGERLAKE(i915)) {
> dmc->fw_path = TGL_DMC_PATH;
> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
> - } else if (DISPLAY_VER(dev_priv) == 11) {
> + } else if (DISPLAY_VER(i915) == 11) {
> dmc->fw_path = ICL_DMC_PATH;
> dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE;
> - } else if (IS_GEMINILAKE(dev_priv)) {
> + } else if (IS_GEMINILAKE(i915)) {
> dmc->fw_path = GLK_DMC_PATH;
> dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE;
> - } else if (IS_KABYLAKE(dev_priv) ||
> - IS_COFFEELAKE(dev_priv) ||
> - IS_COMETLAKE(dev_priv)) {
> + } else if (IS_KABYLAKE(i915) ||
> + IS_COFFEELAKE(i915) ||
> + IS_COMETLAKE(i915)) {
> dmc->fw_path = KBL_DMC_PATH;
> dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE;
> - } else if (IS_SKYLAKE(dev_priv)) {
> + } else if (IS_SKYLAKE(i915)) {
> dmc->fw_path = SKL_DMC_PATH;
> dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE;
> - } else if (IS_BROXTON(dev_priv)) {
> + } else if (IS_BROXTON(i915)) {
> dmc->fw_path = BXT_DMC_PATH;
> dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE;
> }
>
> - if (dev_priv->params.dmc_firmware_path) {
> - if (strlen(dev_priv->params.dmc_firmware_path) == 0) {
> - drm_info(&dev_priv->drm,
> + if (i915->params.dmc_firmware_path) {
> + if (strlen(i915->params.dmc_firmware_path) == 0) {
> + drm_info(&i915->drm,
> "Disabling DMC firmware and runtime PM\n");
> goto out;
> }
>
> - dmc->fw_path = dev_priv->params.dmc_firmware_path;
> + dmc->fw_path = i915->params.dmc_firmware_path;
> }
>
> if (!dmc->fw_path) {
> - drm_dbg_kms(&dev_priv->drm,
> + drm_dbg_kms(&i915->drm,
> "No known DMC firmware for platform, disabling runtime PM\n");
> goto out;
> }
>
> - dev_priv->display.dmc.dmc = dmc;
> + i915->display.dmc.dmc = dmc;
>
> - drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
> + drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
> schedule_work(&dmc->work);
>
> return;
> @@ -1049,71 +1045,71 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
>
> /**
> * intel_dmc_suspend() - prepare DMC firmware before system suspend
> - * @dev_priv: i915 drm device
> + * @i915: i915 drm device
> *
> * Prepare the DMC firmware before entering system suspend. This includes
> * flushing pending work items and releasing any resources acquired during
> * init.
> */
> -void intel_dmc_suspend(struct drm_i915_private *dev_priv)
> +void intel_dmc_suspend(struct drm_i915_private *i915)
> {
> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
> + struct intel_dmc *dmc = i915_to_dmc(i915);
>
> - if (!HAS_DMC(dev_priv))
> + if (!HAS_DMC(i915))
> return;
>
> if (dmc)
> flush_work(&dmc->work);
>
> /* Drop the reference held in case DMC isn't loaded. */
> - if (!intel_dmc_has_payload(dev_priv))
> - intel_dmc_runtime_pm_put(dev_priv);
> + if (!intel_dmc_has_payload(i915))
> + intel_dmc_runtime_pm_put(i915);
> }
>
> /**
> * intel_dmc_resume() - init DMC firmware during system resume
> - * @dev_priv: i915 drm device
> + * @i915: i915 drm device
> *
> * Reinitialize the DMC firmware during system resume, reacquiring any
> * resources released in intel_dmc_suspend().
> */
> -void intel_dmc_resume(struct drm_i915_private *dev_priv)
> +void intel_dmc_resume(struct drm_i915_private *i915)
> {
> - if (!HAS_DMC(dev_priv))
> + if (!HAS_DMC(i915))
> return;
>
> /*
> * Reacquire the reference to keep RPM disabled in case DMC isn't
> * loaded.
> */
> - if (!intel_dmc_has_payload(dev_priv))
> - intel_dmc_runtime_pm_get(dev_priv);
> + if (!intel_dmc_has_payload(i915))
> + intel_dmc_runtime_pm_get(i915);
> }
>
> /**
> * intel_dmc_fini() - unload the DMC firmware.
> - * @dev_priv: i915 drm device.
> + * @i915: i915 drm device.
> *
> * Firmmware unloading includes freeing the internal memory and reset the
> * firmware loading status.
> */
> -void intel_dmc_fini(struct drm_i915_private *dev_priv)
> +void intel_dmc_fini(struct drm_i915_private *i915)
> {
> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
> + struct intel_dmc *dmc = i915_to_dmc(i915);
> enum intel_dmc_id dmc_id;
>
> - if (!HAS_DMC(dev_priv))
> + if (!HAS_DMC(i915))
> return;
>
> - intel_dmc_suspend(dev_priv);
> - drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
> + intel_dmc_suspend(i915);
> + drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
>
> if (dmc) {
> for_each_dmc_id(dmc_id)
> kfree(dmc->dmc_info[dmc_id].payload);
>
> kfree(dmc);
> - dev_priv->display.dmc.dmc = NULL;
> + i915->display.dmc.dmc = NULL;
> }
> }
>
> --
> 2.39.1
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
` (5 preceding siblings ...)
2023-03-01 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-03-04 1:24 ` Patchwork
6 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-04 1:24 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 43864 bytes --]
== Series Details ==
Series: series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains
URL : https://patchwork.freedesktop.org/series/114515/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12799_full -> Patchwork_114515v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (19 -> 19)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114515v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_atomic_transition@modeset-transition-nonblocking@3x-outputs (NEW):
- {shard-dg2-11}: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-11/igt@kms_atomic_transition@modeset-transition-nonblocking@3x-outputs.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_content_protection@atomic@pipe-a-dp-2:
- {shard-dg2-12}: NOTRUN -> [TIMEOUT][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-12/igt@kms_content_protection@atomic@pipe-a-dp-2.html
* igt@kms_hdr@static-toggle-suspend@pipe-a-dp-1:
- {shard-dg2-11}: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-11/igt@kms_hdr@static-toggle-suspend@pipe-a-dp-1.html
* {igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-0-25@pipe-d-dp-4}:
- {shard-dg2-11}: NOTRUN -> [SKIP][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-0-25@pipe-d-dp-4.html
* {igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-dp-2}:
- {shard-dg2-12}: NOTRUN -> [SKIP][5] +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-12/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-c-dp-2.html
New tests
---------
New tests have been introduced between CI_DRM_12799_full and Patchwork_114515v1_full:
### New IGT tests (23) ###
* igt@kms_atomic_transition@modeset-transition-nonblocking@3x-outputs:
- Statuses : 1 fail(s)
- Exec time: [0.0] s
* igt@kms_atomic_transition@modeset-transition-nonblocking@4x-outputs:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-flip-vs-modeset-vs-hang@ab-dp2-dp3:
- Statuses :
- Exec time: [None] s
* igt@kms_flip@2x-plain-flip@ab-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ab-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ab-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ac-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ac-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ac-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ad-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ad-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@ad-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bc-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bc-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bc-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bd-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bd-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@bd-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@cd-dp2-dp3:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@cd-dp2-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@2x-plain-flip@cd-dp3-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@flip-vs-suspend-interruptible@d-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_flip@modeset-vs-vblank-race-interruptible@d-dp4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_114515v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@device_reset@cold-reset-bound:
- shard-tglu-10: NOTRUN -> [SKIP][6] ([i915#7701])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@device_reset@cold-reset-bound.html
* igt@fbdev@read:
- shard-tglu-9: NOTRUN -> [SKIP][7] ([i915#2582])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@fbdev@read.html
* igt@feature_discovery@display-3x:
- shard-tglu-10: NOTRUN -> [SKIP][8] ([i915#1839])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@feature_discovery@display-3x.html
* igt@feature_discovery@psr1:
- shard-tglu-10: NOTRUN -> [SKIP][9] ([i915#658])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@feature_discovery@psr1.html
* igt@gem_ccs@ctrl-surf-copy:
- shard-tglu-10: NOTRUN -> [SKIP][10] ([i915#3555] / [i915#5325])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_ccs@ctrl-surf-copy.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-tglu-9: NOTRUN -> [SKIP][11] ([i915#5325])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_ctx_persistence@engines-cleanup:
- shard-snb: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#1099]) +2 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-snb4/igt@gem_ctx_persistence@engines-cleanup.html
* igt@gem_ctx_sseu@mmap-args:
- shard-tglu-9: NOTRUN -> [SKIP][13] ([i915#280])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][16] -> [FAIL][17] ([i915#2842])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglu-10: NOTRUN -> [FAIL][18] ([i915#2842]) +5 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_exec_fair@basic-pace@bcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglu-10: NOTRUN -> [SKIP][19] ([fdo#109313])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_gttfill@multigpu-basic:
- shard-tglu-10: NOTRUN -> [SKIP][20] ([i915#7697]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_exec_gttfill@multigpu-basic.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-tglu-10: NOTRUN -> [SKIP][21] ([fdo#109283])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_schedule@thriceslice:
- shard-snb: NOTRUN -> [SKIP][22] ([fdo#109271]) +320 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-snb4/igt@gem_exec_schedule@thriceslice.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-tglu-9: NOTRUN -> [SKIP][23] ([i915#4613]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@random-engines:
- shard-tglu-10: NOTRUN -> [SKIP][24] ([i915#4613]) +2 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_lmem_swapping@random-engines.html
* igt@gem_mmap_wc@set-cache-level:
- shard-tglu-9: NOTRUN -> [SKIP][25] ([i915#1850])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_mmap_wc@set-cache-level.html
* igt@gem_pread@exhaustion:
- shard-tglu-10: NOTRUN -> [WARN][26] ([i915#2658])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-exhaustion:
- shard-tglu-9: NOTRUN -> [WARN][27] ([i915#2658])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_pwrite@basic-exhaustion.html
- shard-snb: NOTRUN -> [WARN][28] ([i915#2658])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-snb4/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-tglu-9: NOTRUN -> [SKIP][29] ([i915#4270])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-tglu-10: NOTRUN -> [SKIP][30] ([i915#4270]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-tglu-9: NOTRUN -> [SKIP][31] ([fdo#109312])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_userptr_blits@coherency-sync:
- shard-tglu-10: NOTRUN -> [SKIP][32] ([fdo#110542])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-tglu-10: NOTRUN -> [SKIP][33] ([i915#3297])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-tglu-9: NOTRUN -> [SKIP][34] ([i915#3297])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@vma-merge:
- shard-tglu-10: NOTRUN -> [FAIL][35] ([i915#3318])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gem_userptr_blits@vma-merge.html
* igt@gen3_render_linear_blits:
- shard-tglu-9: NOTRUN -> [SKIP][36] ([fdo#109289])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [PASS][37] -> [ABORT][38] ([i915#5566])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-apl7/igt@gen9_exec_parse@allowed-single.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-apl3/igt@gen9_exec_parse@allowed-single.html
- shard-glk: [PASS][39] -> [ABORT][40] ([i915#5566])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-glk9/igt@gen9_exec_parse@allowed-single.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-glk5/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglu-10: NOTRUN -> [SKIP][41] ([i915#2527] / [i915#2856]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@gen9_exec_parse@bb-start-cmd.html
* igt@gen9_exec_parse@bb-start-far:
- shard-tglu-9: NOTRUN -> [SKIP][42] ([i915#2527] / [i915#2856]) +2 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@gen9_exec_parse@bb-start-far.html
* igt@i915_pm_backlight@bad-brightness:
- shard-tglu-9: NOTRUN -> [SKIP][43] ([i915#7561])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@i915_pm_backlight@bad-brightness.html
* igt@i915_pm_backlight@fade:
- shard-tglu-10: NOTRUN -> [SKIP][44] ([i915#7561])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@i915_pm_backlight@fade.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-tglu-10: NOTRUN -> [WARN][45] ([i915#2681]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglu-10: NOTRUN -> [SKIP][46] ([fdo#109506])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_pm_rpm@pm-tiling:
- shard-tglu-9: NOTRUN -> [SKIP][47] ([i915#3547])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@i915_pm_rpm@pm-tiling.html
* igt@i915_query@test-query-geometry-subslices:
- shard-tglu-9: NOTRUN -> [SKIP][48] ([i915#5723])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@i915_query@test-query-geometry-subslices.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu-10: NOTRUN -> [SKIP][49] ([i915#5286]) +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-tglu-10: NOTRUN -> [SKIP][50] ([fdo#111614])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-addfb:
- shard-tglu-9: NOTRUN -> [SKIP][51] ([i915#1845] / [i915#7651]) +47 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_big_fb@x-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-tglu-9: NOTRUN -> [SKIP][52] ([fdo#111615] / [i915#1845] / [i915#7651]) +7 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- shard-tglu-10: NOTRUN -> [SKIP][53] ([fdo#111615]) +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
* igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs_cc:
- shard-tglu-10: NOTRUN -> [SKIP][54] ([i915#6095]) +2 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_ccs@pipe-a-crc-primary-basic-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][55] ([i915#3689]) +8 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-yf_tiled_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][56] ([fdo#111615] / [i915#3689]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_ccs@pipe-c-bad-pixel-format-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][57] ([i915#3689] / [i915#6095])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][58] ([i915#3689] / [i915#3886]) +6 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-tglu-10: NOTRUN -> [SKIP][59] ([fdo#111827])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-tglu-9: NOTRUN -> [SKIP][60] ([i915#7828]) +3 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-tglu-10: NOTRUN -> [SKIP][61] ([i915#7828]) +5 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_color@ctm-0-25:
- shard-tglu-9: NOTRUN -> [SKIP][62] ([i915#3546])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_color@ctm-0-25.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-tglu-10: NOTRUN -> [SKIP][63] ([i915#3555]) +4 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
- shard-tglu-10: NOTRUN -> [SKIP][64] ([fdo#109274]) +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-tglu-9: NOTRUN -> [SKIP][65] ([i915#1845]) +8 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-tglu-10: NOTRUN -> [SKIP][66] ([i915#3840])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-tglu-10: NOTRUN -> [SKIP][67] ([fdo#109274] / [i915#3637]) +1 similar issue
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-tglu-9: NOTRUN -> [SKIP][68] ([fdo#109274] / [i915#3637]) +4 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible:
- shard-tglu-9: NOTRUN -> [SKIP][69] ([i915#3637]) +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1:
- shard-apl: [PASS][70] -> [FAIL][71] ([i915#79])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-apl2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [PASS][72] -> [ABORT][73] ([i915#180])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-tglu-10: NOTRUN -> [SKIP][74] ([i915#2587] / [i915#2672]) +3 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-tglu-9: NOTRUN -> [SKIP][75] ([i915#3555]) +5 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-tglu-9: NOTRUN -> [SKIP][76] ([fdo#109285])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff:
- shard-tglu-10: NOTRUN -> [SKIP][77] ([fdo#109280]) +30 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-pwrite:
- shard-tglu-9: NOTRUN -> [SKIP][78] ([i915#1849]) +34 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-tglu-10: NOTRUN -> [SKIP][79] ([fdo#110189]) +21 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
* igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
- shard-tglu-10: NOTRUN -> [SKIP][80] ([fdo#109289]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1:
- shard-tglu-10: NOTRUN -> [SKIP][81] ([i915#5176]) +7 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
- shard-tglu-9: NOTRUN -> [SKIP][82] ([i915#6953] / [i915#8152])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html
* igt@kms_prime@basic-crc-hybrid:
- shard-tglu-9: NOTRUN -> [SKIP][83] ([i915#6524])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-tglu-9: NOTRUN -> [SKIP][84] ([i915#658]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-tglu-10: NOTRUN -> [SKIP][85] ([fdo#109642] / [fdo#111068] / [i915#658]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@cursor_plane_move:
- shard-tglu-9: NOTRUN -> [SKIP][86] ([fdo#110189]) +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_psr@cursor_plane_move.html
* igt@kms_pwrite_crc:
- shard-tglu-9: NOTRUN -> [SKIP][87] ([fdo#109274] / [i915#1845])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_pwrite_crc.html
* igt@kms_setmode@basic@pipe-a-vga-1:
- shard-snb: NOTRUN -> [FAIL][88] ([i915#5465]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-snb6/igt@kms_setmode@basic@pipe-a-vga-1.html
* igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a:
- shard-tglu-9: NOTRUN -> [SKIP][89] ([fdo#109274])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html
* igt@perf_pmu@event-wait@rcs0:
- shard-tglu-10: NOTRUN -> [SKIP][90] ([fdo#112283])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@perf_pmu@event-wait@rcs0.html
* igt@prime_vgem@fence-flip-hang:
- shard-tglu-10: NOTRUN -> [SKIP][91] ([fdo#109295])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@prime_vgem@fence-flip-hang.html
* igt@v3d/v3d_mmap@mmap-bo:
- shard-tglu-10: NOTRUN -> [SKIP][92] ([fdo#109315] / [i915#2575]) +3 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@v3d/v3d_mmap@mmap-bo.html
* igt@v3d/v3d_perfmon@get-values-invalid-pointer:
- shard-tglu-9: NOTRUN -> [SKIP][93] ([fdo#109315] / [i915#2575]) +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@v3d/v3d_perfmon@get-values-invalid-pointer.html
* igt@vc4/vc4_perfmon@destroy-invalid-perfmon:
- shard-tglu-9: NOTRUN -> [SKIP][94] ([i915#2575]) +4 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-9/igt@vc4/vc4_perfmon@destroy-invalid-perfmon.html
* igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
- shard-tglu-10: NOTRUN -> [SKIP][95] ([i915#2575]) +5 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-tglu-10/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html
#### Possible fixes ####
* igt@api_intel_bb@object-reloc-keep-cache:
- {shard-rkl}: [SKIP][96] ([i915#3281]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-4/igt@api_intel_bb@object-reloc-keep-cache.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-5/igt@api_intel_bb@object-reloc-keep-cache.html
* igt@drm_fdinfo@virtual-idle:
- {shard-rkl}: [FAIL][98] ([i915#7742]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-4/igt@drm_fdinfo@virtual-idle.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-2/igt@drm_fdinfo@virtual-idle.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][100] ([fdo#103375]) -> [PASS][101] +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-5/igt@gem_eio@in-flight-suspend.html
* igt@gem_partial_pwrite_pread@reads-display:
- {shard-rkl}: [SKIP][102] ([i915#3282]) -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-4/igt@gem_partial_pwrite_pread@reads-display.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-5/igt@gem_partial_pwrite_pread@reads-display.html
* igt@gen9_exec_parse@shadow-peek:
- {shard-rkl}: [SKIP][104] ([i915#2527]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-4/igt@gen9_exec_parse@shadow-peek.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-5/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_hangman@gt-engine-error@bcs0:
- {shard-rkl}: [SKIP][106] ([i915#6258]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-rkl-5/igt@i915_hangman@gt-engine-error@bcs0.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-rkl-2/igt@i915_hangman@gt-engine-error@bcs0.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [FAIL][108] ([i915#6537]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-apl1/igt@i915_pm_rps@engine-order.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-apl2/igt@i915_pm_rps@engine-order.html
* igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2:
- shard-glk: [FAIL][110] ([i915#79]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-glk8/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a2.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- {shard-dg2-5}: [FAIL][112] ([i915#6880]) -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12799/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
[i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5445]: https://gitlab.freedesktop.org/drm/intel/issues/5445
[i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5464]: https://gitlab.freedesktop.org/drm/intel/issues/5464
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5793]: https://gitlab.freedesktop.org/drm/intel/issues/5793
[i915#5882]: https://gitlab.freedesktop.org/drm/intel/issues/5882
[i915#5889]: https://gitlab.freedesktop.org/drm/intel/issues/5889
[i915#5892]: https://gitlab.freedesktop.org/drm/intel/issues/5892
[i915#6032]: https://gitlab.freedesktop.org/drm/intel/issues/6032
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6118]: https://gitlab.freedesktop.org/drm/intel/issues/6118
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6228]: https://gitlab.freedesktop.org/drm/intel/issues/6228
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6333]: https://gitlab.freedesktop.org/drm/intel/issues/6333
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#6530]: https://gitlab.freedesktop.org/drm/intel/issues/6530
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6880]: https://gitlab.freedesktop.org/drm/intel/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7091]: https://gitlab.freedesktop.org/drm/intel/issues/7091
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7349]: https://gitlab.freedesktop.org/drm/intel/issues/7349
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7679]: https://gitlab.freedesktop.org/drm/intel/issues/7679
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#7976]: https://gitlab.freedesktop.org/drm/intel/issues/7976
[i915#7997]: https://gitlab.freedesktop.org/drm/intel/issues/7997
[i915#8077]: https://gitlab.freedesktop.org/drm/intel/issues/8077
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8155]: https://gitlab.freedesktop.org/drm/intel/issues/8155
[i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
Build changes
-------------
* Linux: CI_DRM_12799 -> Patchwork_114515v1
CI-20190529: 20190529
CI_DRM_12799: 5f6631c00a7f226c990aecc643bc9fa70da1599a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7178: ffe3f6670b91ab975f90799ab3fd0941b6eae019 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114515v1: 5f6631c00a7f226c990aecc643bc9fa70da1599a @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114515v1/index.html
[-- Attachment #2: Type: text/html, Size: 41752 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915
2023-03-02 11:35 ` Imre Deak
@ 2023-03-06 17:26 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2023-03-06 17:26 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx
On Thu, 02 Mar 2023, Imre Deak <imre.deak@intel.com> wrote:
> On Wed, Mar 01, 2023 at 02:29:44PM +0200, Jani Nikula wrote:
>> Follow the contemporary convention for struct drm_i915_private * naming.
>>
>> Cc: Imre Deak <imre.deak@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Looks ok to me, on the patchset:
> Reviewed-by: Imre Deak <imre.deak@intel.com>
Thanks, pushed to din.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/display/intel_dmc.c | 166 +++++++++++------------
>> 1 file changed, 81 insertions(+), 85 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> index 302a465ceb1f..6b162f77340e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> @@ -313,12 +313,12 @@ intel_get_stepping_info(struct drm_i915_private *i915,
>> return si;
>> }
>>
>> -static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
>> +static void gen9_set_dc_state_debugmask(struct drm_i915_private *i915)
>> {
>> /* The below bit doesn't need to be cleared ever afterwards */
>> - intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0,
>> + intel_de_rmw(i915, DC_STATE_DEBUG, 0,
>> DC_STATE_DEBUG_MASK_CORES | DC_STATE_DEBUG_MASK_MEMORY_UP);
>> - intel_de_posting_read(dev_priv, DC_STATE_DEBUG);
>> + intel_de_posting_read(i915, DC_STATE_DEBUG);
>> }
>>
>> static void disable_event_handler(struct drm_i915_private *i915,
>> @@ -476,33 +476,33 @@ void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe)
>>
>> /**
>> * intel_dmc_load_program() - write the firmware from memory to register.
>> - * @dev_priv: i915 drm device.
>> + * @i915: i915 drm device.
>> *
>> * DMC firmware is read from a .bin file and kept in internal memory one time.
>> * Everytime display comes back from low power state this function is called to
>> * copy the firmware from internal memory to registers.
>> */
>> -void intel_dmc_load_program(struct drm_i915_private *dev_priv)
>> +void intel_dmc_load_program(struct drm_i915_private *i915)
>> {
>> - struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
>> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
>> + struct i915_power_domains *power_domains = &i915->display.power.domains;
>> + struct intel_dmc *dmc = i915_to_dmc(i915);
>> enum intel_dmc_id dmc_id;
>> u32 i;
>>
>> - if (!intel_dmc_has_payload(dev_priv))
>> + if (!intel_dmc_has_payload(i915))
>> return;
>>
>> - pipedmc_clock_gating_wa(dev_priv, true);
>> + pipedmc_clock_gating_wa(i915, true);
>>
>> - disable_all_event_handlers(dev_priv);
>> + disable_all_event_handlers(i915);
>>
>> - assert_rpm_wakelock_held(&dev_priv->runtime_pm);
>> + assert_rpm_wakelock_held(&i915->runtime_pm);
>>
>> preempt_disable();
>>
>> for_each_dmc_id(dmc_id) {
>> for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) {
>> - intel_de_write_fw(dev_priv,
>> + intel_de_write_fw(i915,
>> DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i),
>> dmc->dmc_info[dmc_id].payload[i]);
>> }
>> @@ -512,23 +512,23 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv)
>>
>> for_each_dmc_id(dmc_id) {
>> for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) {
>> - intel_de_write(dev_priv, dmc->dmc_info[dmc_id].mmioaddr[i],
>> + intel_de_write(i915, dmc->dmc_info[dmc_id].mmioaddr[i],
>> dmc->dmc_info[dmc_id].mmiodata[i]);
>> }
>> }
>>
>> power_domains->dc_state = 0;
>>
>> - gen9_set_dc_state_debugmask(dev_priv);
>> + gen9_set_dc_state_debugmask(i915);
>>
>> /*
>> * Flip queue events need to be disabled before enabling DC5/6.
>> * i915 doesn't use the flip queue feature, so disable it already
>> * here.
>> */
>> - disable_all_flip_queue_events(dev_priv);
>> + disable_all_flip_queue_events(i915);
>>
>> - pipedmc_clock_gating_wa(dev_priv, false);
>> + pipedmc_clock_gating_wa(i915, false);
>> }
>>
>> /**
>> @@ -839,12 +839,12 @@ static u32 parse_dmc_fw_css(struct intel_dmc *dmc,
>>
>> static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
>> {
>> - struct drm_i915_private *dev_priv = dmc->i915;
>> + struct drm_i915_private *i915 = dmc->i915;
>> struct intel_css_header *css_header;
>> struct intel_package_header *package_header;
>> struct intel_dmc_header_base *dmc_header;
>> struct stepping_info display_info = { '*', '*'};
>> - const struct stepping_info *si = intel_get_stepping_info(dev_priv, &display_info);
>> + const struct stepping_info *si = intel_get_stepping_info(i915, &display_info);
>> enum intel_dmc_id dmc_id;
>> u32 readcount = 0;
>> u32 r, offset;
>> @@ -874,7 +874,7 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
>>
>> offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4;
>> if (offset > fw->size) {
>> - drm_err(&dev_priv->drm, "Reading beyond the fw_size\n");
>> + drm_err(&i915->drm, "Reading beyond the fw_size\n");
>> continue;
>> }
>>
>> @@ -883,19 +883,18 @@ static void parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
>> }
>> }
>>
>> -static void intel_dmc_runtime_pm_get(struct drm_i915_private *dev_priv)
>> +static void intel_dmc_runtime_pm_get(struct drm_i915_private *i915)
>> {
>> - drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
>> - dev_priv->display.dmc.wakeref =
>> - intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
>> + drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
>> + i915->display.dmc.wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
>> }
>>
>> -static void intel_dmc_runtime_pm_put(struct drm_i915_private *dev_priv)
>> +static void intel_dmc_runtime_pm_put(struct drm_i915_private *i915)
>> {
>> intel_wakeref_t wakeref __maybe_unused =
>> - fetch_and_zero(&dev_priv->display.dmc.wakeref);
>> + fetch_and_zero(&i915->display.dmc.wakeref);
>>
>> - intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
>> + intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
>> }
>>
>> static const char *dmc_fallback_path(struct drm_i915_private *i915)
>> @@ -909,21 +908,19 @@ static const char *dmc_fallback_path(struct drm_i915_private *i915)
>> static void dmc_load_work_fn(struct work_struct *work)
>> {
>> struct intel_dmc *dmc = container_of(work, typeof(*dmc), work);
>> - struct drm_i915_private *dev_priv = dmc->i915;
>> + struct drm_i915_private *i915 = dmc->i915;
>> const struct firmware *fw = NULL;
>> const char *fallback_path;
>> int err;
>>
>> - err = request_firmware(&fw, dmc->fw_path, dev_priv->drm.dev);
>> + err = request_firmware(&fw, dmc->fw_path, i915->drm.dev);
>>
>> - if (err == -ENOENT && !dev_priv->params.dmc_firmware_path) {
>> - fallback_path = dmc_fallback_path(dev_priv);
>> + if (err == -ENOENT && !i915->params.dmc_firmware_path) {
>> + fallback_path = dmc_fallback_path(i915);
>> if (fallback_path) {
>> - drm_dbg_kms(&dev_priv->drm,
>> - "%s not found, falling back to %s\n",
>> - dmc->fw_path,
>> - fallback_path);
>> - err = request_firmware(&fw, fallback_path, dev_priv->drm.dev);
>> + drm_dbg_kms(&i915->drm, "%s not found, falling back to %s\n",
>> + dmc->fw_path, fallback_path);
>> + err = request_firmware(&fw, fallback_path, i915->drm.dev);
>> if (err == 0)
>> dmc->fw_path = fallback_path;
>> }
>> @@ -931,20 +928,19 @@ static void dmc_load_work_fn(struct work_struct *work)
>>
>> parse_dmc_fw(dmc, fw);
>>
>> - if (intel_dmc_has_payload(dev_priv)) {
>> - intel_dmc_load_program(dev_priv);
>> - intel_dmc_runtime_pm_put(dev_priv);
>> + if (intel_dmc_has_payload(i915)) {
>> + intel_dmc_load_program(i915);
>> + intel_dmc_runtime_pm_put(i915);
>>
>> - drm_info(&dev_priv->drm,
>> - "Finished loading DMC firmware %s (v%u.%u)\n",
>> + drm_info(&i915->drm, "Finished loading DMC firmware %s (v%u.%u)\n",
>> dmc->fw_path, DMC_VERSION_MAJOR(dmc->version),
>> DMC_VERSION_MINOR(dmc->version));
>> } else {
>> - drm_notice(&dev_priv->drm,
>> + drm_notice(&i915->drm,
>> "Failed to load DMC firmware %s."
>> " Disabling runtime power management.\n",
>> dmc->fw_path);
>> - drm_notice(&dev_priv->drm, "DMC firmware homepage: %s",
>> + drm_notice(&i915->drm, "DMC firmware homepage: %s",
>> INTEL_UC_FIRMWARE_URL);
>> }
>>
>> @@ -953,16 +949,16 @@ static void dmc_load_work_fn(struct work_struct *work)
>>
>> /**
>> * intel_dmc_init() - initialize the firmware loading.
>> - * @dev_priv: i915 drm device.
>> + * @i915: i915 drm device.
>> *
>> * This function is called at the time of loading the display driver to read
>> * firmware from a .bin file and copied into a internal memory.
>> */
>> -void intel_dmc_init(struct drm_i915_private *dev_priv)
>> +void intel_dmc_init(struct drm_i915_private *i915)
>> {
>> struct intel_dmc *dmc;
>>
>> - if (!HAS_DMC(dev_priv))
>> + if (!HAS_DMC(i915))
>> return;
>>
>> /*
>> @@ -973,72 +969,72 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
>> * suspend as runtime suspend *requires* a working DMC for whatever
>> * reason.
>> */
>> - intel_dmc_runtime_pm_get(dev_priv);
>> + intel_dmc_runtime_pm_get(i915);
>>
>> dmc = kzalloc(sizeof(*dmc), GFP_KERNEL);
>> if (!dmc)
>> return;
>>
>> - dmc->i915 = dev_priv;
>> + dmc->i915 = i915;
>>
>> INIT_WORK(&dmc->work, dmc_load_work_fn);
>>
>> - if (IS_DG2(dev_priv)) {
>> + if (IS_DG2(i915)) {
>> dmc->fw_path = DG2_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
>> - } else if (IS_ALDERLAKE_P(dev_priv)) {
>> + } else if (IS_ALDERLAKE_P(i915)) {
>> dmc->fw_path = ADLP_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
>> - } else if (IS_ALDERLAKE_S(dev_priv)) {
>> + } else if (IS_ALDERLAKE_S(i915)) {
>> dmc->fw_path = ADLS_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
>> - } else if (IS_DG1(dev_priv)) {
>> + } else if (IS_DG1(i915)) {
>> dmc->fw_path = DG1_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
>> - } else if (IS_ROCKETLAKE(dev_priv)) {
>> + } else if (IS_ROCKETLAKE(i915)) {
>> dmc->fw_path = RKL_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
>> - } else if (IS_TIGERLAKE(dev_priv)) {
>> + } else if (IS_TIGERLAKE(i915)) {
>> dmc->fw_path = TGL_DMC_PATH;
>> dmc->max_fw_size = DISPLAY_VER12_DMC_MAX_FW_SIZE;
>> - } else if (DISPLAY_VER(dev_priv) == 11) {
>> + } else if (DISPLAY_VER(i915) == 11) {
>> dmc->fw_path = ICL_DMC_PATH;
>> dmc->max_fw_size = ICL_DMC_MAX_FW_SIZE;
>> - } else if (IS_GEMINILAKE(dev_priv)) {
>> + } else if (IS_GEMINILAKE(i915)) {
>> dmc->fw_path = GLK_DMC_PATH;
>> dmc->max_fw_size = GLK_DMC_MAX_FW_SIZE;
>> - } else if (IS_KABYLAKE(dev_priv) ||
>> - IS_COFFEELAKE(dev_priv) ||
>> - IS_COMETLAKE(dev_priv)) {
>> + } else if (IS_KABYLAKE(i915) ||
>> + IS_COFFEELAKE(i915) ||
>> + IS_COMETLAKE(i915)) {
>> dmc->fw_path = KBL_DMC_PATH;
>> dmc->max_fw_size = KBL_DMC_MAX_FW_SIZE;
>> - } else if (IS_SKYLAKE(dev_priv)) {
>> + } else if (IS_SKYLAKE(i915)) {
>> dmc->fw_path = SKL_DMC_PATH;
>> dmc->max_fw_size = SKL_DMC_MAX_FW_SIZE;
>> - } else if (IS_BROXTON(dev_priv)) {
>> + } else if (IS_BROXTON(i915)) {
>> dmc->fw_path = BXT_DMC_PATH;
>> dmc->max_fw_size = BXT_DMC_MAX_FW_SIZE;
>> }
>>
>> - if (dev_priv->params.dmc_firmware_path) {
>> - if (strlen(dev_priv->params.dmc_firmware_path) == 0) {
>> - drm_info(&dev_priv->drm,
>> + if (i915->params.dmc_firmware_path) {
>> + if (strlen(i915->params.dmc_firmware_path) == 0) {
>> + drm_info(&i915->drm,
>> "Disabling DMC firmware and runtime PM\n");
>> goto out;
>> }
>>
>> - dmc->fw_path = dev_priv->params.dmc_firmware_path;
>> + dmc->fw_path = i915->params.dmc_firmware_path;
>> }
>>
>> if (!dmc->fw_path) {
>> - drm_dbg_kms(&dev_priv->drm,
>> + drm_dbg_kms(&i915->drm,
>> "No known DMC firmware for platform, disabling runtime PM\n");
>> goto out;
>> }
>>
>> - dev_priv->display.dmc.dmc = dmc;
>> + i915->display.dmc.dmc = dmc;
>>
>> - drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
>> + drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
>> schedule_work(&dmc->work);
>>
>> return;
>> @@ -1049,71 +1045,71 @@ void intel_dmc_init(struct drm_i915_private *dev_priv)
>>
>> /**
>> * intel_dmc_suspend() - prepare DMC firmware before system suspend
>> - * @dev_priv: i915 drm device
>> + * @i915: i915 drm device
>> *
>> * Prepare the DMC firmware before entering system suspend. This includes
>> * flushing pending work items and releasing any resources acquired during
>> * init.
>> */
>> -void intel_dmc_suspend(struct drm_i915_private *dev_priv)
>> +void intel_dmc_suspend(struct drm_i915_private *i915)
>> {
>> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
>> + struct intel_dmc *dmc = i915_to_dmc(i915);
>>
>> - if (!HAS_DMC(dev_priv))
>> + if (!HAS_DMC(i915))
>> return;
>>
>> if (dmc)
>> flush_work(&dmc->work);
>>
>> /* Drop the reference held in case DMC isn't loaded. */
>> - if (!intel_dmc_has_payload(dev_priv))
>> - intel_dmc_runtime_pm_put(dev_priv);
>> + if (!intel_dmc_has_payload(i915))
>> + intel_dmc_runtime_pm_put(i915);
>> }
>>
>> /**
>> * intel_dmc_resume() - init DMC firmware during system resume
>> - * @dev_priv: i915 drm device
>> + * @i915: i915 drm device
>> *
>> * Reinitialize the DMC firmware during system resume, reacquiring any
>> * resources released in intel_dmc_suspend().
>> */
>> -void intel_dmc_resume(struct drm_i915_private *dev_priv)
>> +void intel_dmc_resume(struct drm_i915_private *i915)
>> {
>> - if (!HAS_DMC(dev_priv))
>> + if (!HAS_DMC(i915))
>> return;
>>
>> /*
>> * Reacquire the reference to keep RPM disabled in case DMC isn't
>> * loaded.
>> */
>> - if (!intel_dmc_has_payload(dev_priv))
>> - intel_dmc_runtime_pm_get(dev_priv);
>> + if (!intel_dmc_has_payload(i915))
>> + intel_dmc_runtime_pm_get(i915);
>> }
>>
>> /**
>> * intel_dmc_fini() - unload the DMC firmware.
>> - * @dev_priv: i915 drm device.
>> + * @i915: i915 drm device.
>> *
>> * Firmmware unloading includes freeing the internal memory and reset the
>> * firmware loading status.
>> */
>> -void intel_dmc_fini(struct drm_i915_private *dev_priv)
>> +void intel_dmc_fini(struct drm_i915_private *i915)
>> {
>> - struct intel_dmc *dmc = i915_to_dmc(dev_priv);
>> + struct intel_dmc *dmc = i915_to_dmc(i915);
>> enum intel_dmc_id dmc_id;
>>
>> - if (!HAS_DMC(dev_priv))
>> + if (!HAS_DMC(i915))
>> return;
>>
>> - intel_dmc_suspend(dev_priv);
>> - drm_WARN_ON(&dev_priv->drm, dev_priv->display.dmc.wakeref);
>> + intel_dmc_suspend(i915);
>> + drm_WARN_ON(&i915->drm, i915->display.dmc.wakeref);
>>
>> if (dmc) {
>> for_each_dmc_id(dmc_id)
>> kfree(dmc->dmc_info[dmc_id].payload);
>>
>> kfree(dmc);
>> - dev_priv->display.dmc.dmc = NULL;
>> + i915->display.dmc.dmc = NULL;
>> }
>> }
>>
>> --
>> 2.39.1
>>
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-03-06 17:26 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-01 12:29 [Intel-gfx] [PATCH v4 1/5] drm/i915/power: move dc state members to struct i915_power_domains Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 2/5] drm/i915/dmc: use has_dmc_id_fw() instead of poking dmc->dmc_info directly Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 3/5] drm/i915/dmc: add i915_to_dmc() and dmc->i915 and use them Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 4/5] drm/i915/dmc: allocate dmc structure dynamically Jani Nikula
2023-03-01 12:29 ` [Intel-gfx] [PATCH v4 5/5] drm/i915/dmc: mass rename dev_priv to i915 Jani Nikula
2023-03-02 11:35 ` Imre Deak
2023-03-06 17:26 ` Jani Nikula
2023-03-01 20:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/5] drm/i915/power: move dc state members to struct i915_power_domains Patchwork
2023-03-01 20:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-04 1:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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