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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org,
	kw@linux.com, krzysztof.kozlowski+dt@linaro.org,
	vkoul@kernel.org
Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v3 02/13] dt-bindings: PCI: qcom: Add iommu-map properties
Date: Wed,  8 Mar 2023 13:54:13 +0530	[thread overview]
Message-ID: <20230308082424.140224-3-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230308082424.140224-1-manivannan.sadhasivam@linaro.org>

Most of the PCIe controllers require iommu support to function properly.
So let's add the "iommu-map" property that specifies the SMMU SID of the
PCIe devices to the binding.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 92eb273581f6..55ee86facbc0 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -70,6 +70,8 @@ properties:
 
   dma-coherent: true
 
+  iommu-map: true
+
   interconnects:
     maxItems: 2
 
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org,
	kw@linux.com, krzysztof.kozlowski+dt@linaro.org,
	vkoul@kernel.org
Cc: konrad.dybcio@linaro.org, bhelgaas@google.com, kishon@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v3 02/13] dt-bindings: PCI: qcom: Add iommu-map properties
Date: Wed,  8 Mar 2023 13:54:13 +0530	[thread overview]
Message-ID: <20230308082424.140224-3-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230308082424.140224-1-manivannan.sadhasivam@linaro.org>

Most of the PCIe controllers require iommu support to function properly.
So let's add the "iommu-map" property that specifies the SMMU SID of the
PCIe devices to the binding.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 92eb273581f6..55ee86facbc0 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -70,6 +70,8 @@ properties:
 
   dma-coherent: true
 
+  iommu-map: true
+
   interconnects:
     maxItems: 2
 
-- 
2.25.1


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  parent reply	other threads:[~2023-03-08  8:25 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-08  8:24 [PATCH v3 00/13] Add PCIe RC support to Qcom SDX55 SoC Manivannan Sadhasivam
2023-03-08  8:24 ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 01/13] dt-bindings: PCI: qcom: Update maintainers entry Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` Manivannan Sadhasivam [this message]
2023-03-08  8:24   ` [PATCH v3 02/13] dt-bindings: PCI: qcom: Add iommu-map properties Manivannan Sadhasivam
2023-03-16 22:51   ` Rob Herring
2023-03-16 22:51     ` Rob Herring
2023-03-08  8:24 ` [PATCH v3 03/13] dt-bindings: PCI: qcom: Add SDX55 SoC Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 04/13] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 05/13] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 06/13] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 07/13] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 08/13] ARM: dts: qcom: sdx55: List the property values vertically Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 09/13] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 10/13] ARM: dts: qcom: sdx55-t55: Move "status" property down Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-08  8:24 ` [PATCH v3 11/13] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-20  9:27   ` Vinod Koul
2023-03-20  9:27     ` Vinod Koul
2023-03-08  8:24 ` [PATCH v3 12/13] phy: qcom-qmp-pcie: Add RC " Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-20  9:27   ` Vinod Koul
2023-03-20  9:27     ` Vinod Koul
2023-03-08  8:24 ` [PATCH v3 13/13] PCI: qcom: Add support for SDX55 SoC Manivannan Sadhasivam
2023-03-08  8:24   ` Manivannan Sadhasivam
2023-03-16  3:20 ` (subset) [PATCH v3 00/13] Add PCIe RC support to Qcom " Bjorn Andersson
2023-03-16  3:20   ` Bjorn Andersson
2023-04-11 10:09 ` Lorenzo Pieralisi
2023-04-11 10:09   ` Lorenzo Pieralisi

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