* [PATCH v3 0/3] drm/ttm: Small fixes / cleanups in prep for shrinking
@ 2023-03-09 13:16 ` Thomas Hellström
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:16 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian Koenig, Matthew Auld
I collected the, from my POW, uncontroversial patches from V1 of the TTM
shrinker series, some corrected after the initial patch submission, one
patch added from the Xe RFC ("drm/ttm: Don't print error message if
eviction was interrupted"). It would be nice to have these reviewed and
merged while reworking the rest.
v2:
- Simplify __ttm_pool_free().
- Fix the TTM_TT_FLAG bit numbers.
- Keep all allocation orders for TTM pages at or below PMD order
v3:
- Rename __tm_pool_free() to ttm_pool_free_range(). Document.
- Compile-fix.
Thomas Hellström (3):
drm/ttm/pool: Fix ttm_pool_alloc error path
drm/ttm: Reduce the number of used allocation orders for TTM pages
drm/ttm: Make the call to ttm_tt_populate() interruptible when
faulting
drivers/gpu/drm/ttm/ttm_bo_vm.c | 13 +++-
drivers/gpu/drm/ttm/ttm_pool.c | 111 ++++++++++++++++++++------------
2 files changed, 80 insertions(+), 44 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 0/3] drm/ttm: Small fixes / cleanups in prep for shrinking
@ 2023-03-09 13:16 ` Thomas Hellström
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:16 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian Koenig, Matthew Auld
I collected the, from my POW, uncontroversial patches from V1 of the TTM
shrinker series, some corrected after the initial patch submission, one
patch added from the Xe RFC ("drm/ttm: Don't print error message if
eviction was interrupted"). It would be nice to have these reviewed and
merged while reworking the rest.
v2:
- Simplify __ttm_pool_free().
- Fix the TTM_TT_FLAG bit numbers.
- Keep all allocation orders for TTM pages at or below PMD order
v3:
- Rename __tm_pool_free() to ttm_pool_free_range(). Document.
- Compile-fix.
Thomas Hellström (3):
drm/ttm/pool: Fix ttm_pool_alloc error path
drm/ttm: Reduce the number of used allocation orders for TTM pages
drm/ttm: Make the call to ttm_tt_populate() interruptible when
faulting
drivers/gpu/drm/ttm/ttm_bo_vm.c | 13 +++-
drivers/gpu/drm/ttm/ttm_pool.c | 111 ++++++++++++++++++++------------
2 files changed, 80 insertions(+), 44 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 1/3] drm/ttm/pool: Fix ttm_pool_alloc error path
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
@ 2023-03-09 13:16 ` Thomas Hellström
-1 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:16 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Huang Rui, Matthew Auld,
Dave Airlie, Christian König
When hitting an error, the error path forgot to unmap dma mappings and
could call set_pages_wb() on already uncached pages.
Fix this by introducing a common ttm_pool_free_range() function that
does the right thing.
v2:
- Simplify that common function (Christian König)
v3:
- Rename that common function to ttm_pool_free_range() (Christian König)
Fixes: d099fc8f540a ("drm/ttm: new TT backend allocation pool v3")
Cc: Christian König <christian.koenig@amd.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/ttm/ttm_pool.c | 81 +++++++++++++++++++++-------------
1 file changed, 51 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index aa116a7bbae3..dfce896c4bae 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -367,6 +367,43 @@ static int ttm_pool_page_allocated(struct ttm_pool *pool, unsigned int order,
return 0;
}
+/**
+ * ttm_pool_free_range() - Free a range of TTM pages
+ * @pool: The pool used for allocating.
+ * @tt: The struct ttm_tt holding the page pointers.
+ * @caching: The page caching mode used by the range.
+ * @start_page: index for first page to free.
+ * @end_page: index for last page to free + 1.
+ *
+ * During allocation the ttm_tt page-vector may be populated with ranges of
+ * pages with different attributes if allocation hit an error without being
+ * able to completely fulfill the allocation. This function can be used
+ * to free these individual ranges.
+ */
+static void ttm_pool_free_range(struct ttm_pool *pool, struct ttm_tt *tt,
+ enum ttm_caching caching,
+ pgoff_t start_page, pgoff_t end_page)
+{
+ struct page **pages = tt->pages;
+ unsigned int order;
+ pgoff_t i, nr;
+
+ for (i = start_page; i < end_page; i += nr, pages += nr) {
+ struct ttm_pool_type *pt = NULL;
+
+ order = ttm_pool_page_order(pool, *pages);
+ nr = (1UL << order);
+ if (tt->dma_address)
+ ttm_pool_unmap(pool, tt->dma_address[i], nr);
+
+ pt = ttm_pool_select_type(pool, caching, order);
+ if (pt)
+ ttm_pool_type_give(pt, *pages);
+ else
+ ttm_pool_free_page(pool, caching, order, *pages);
+ }
+}
+
/**
* ttm_pool_alloc - Fill a ttm_tt object
*
@@ -382,12 +419,14 @@ static int ttm_pool_page_allocated(struct ttm_pool *pool, unsigned int order,
int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
struct ttm_operation_ctx *ctx)
{
- unsigned long num_pages = tt->num_pages;
+ pgoff_t num_pages = tt->num_pages;
dma_addr_t *dma_addr = tt->dma_address;
struct page **caching = tt->pages;
struct page **pages = tt->pages;
+ enum ttm_caching page_caching;
gfp_t gfp_flags = GFP_USER;
- unsigned int i, order;
+ pgoff_t caching_divide;
+ unsigned int order;
struct page *p;
int r;
@@ -410,6 +449,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
order = min_t(unsigned int, order, __fls(num_pages))) {
struct ttm_pool_type *pt;
+ page_caching = tt->caching;
pt = ttm_pool_select_type(pool, tt->caching, order);
p = pt ? ttm_pool_type_take(pt) : NULL;
if (p) {
@@ -418,6 +458,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
if (r)
goto error_free_page;
+ caching = pages;
do {
r = ttm_pool_page_allocated(pool, order, p,
&dma_addr,
@@ -426,14 +467,15 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
if (r)
goto error_free_page;
+ caching = pages;
if (num_pages < (1 << order))
break;
p = ttm_pool_type_take(pt);
} while (p);
- caching = pages;
}
+ page_caching = ttm_cached;
while (num_pages >= (1 << order) &&
(p = ttm_pool_alloc_page(pool, gfp_flags, order))) {
@@ -442,6 +484,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
tt->caching);
if (r)
goto error_free_page;
+ caching = pages;
}
r = ttm_pool_page_allocated(pool, order, p, &dma_addr,
&num_pages, &pages);
@@ -468,15 +511,13 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
return 0;
error_free_page:
- ttm_pool_free_page(pool, tt->caching, order, p);
+ ttm_pool_free_page(pool, page_caching, order, p);
error_free_all:
num_pages = tt->num_pages - num_pages;
- for (i = 0; i < num_pages; ) {
- order = ttm_pool_page_order(pool, tt->pages[i]);
- ttm_pool_free_page(pool, tt->caching, order, tt->pages[i]);
- i += 1 << order;
- }
+ caching_divide = caching - tt->pages;
+ ttm_pool_free_range(pool, tt, tt->caching, 0, caching_divide);
+ ttm_pool_free_range(pool, tt, ttm_cached, caching_divide, num_pages);
return r;
}
@@ -492,27 +533,7 @@ EXPORT_SYMBOL(ttm_pool_alloc);
*/
void ttm_pool_free(struct ttm_pool *pool, struct ttm_tt *tt)
{
- unsigned int i;
-
- for (i = 0; i < tt->num_pages; ) {
- struct page *p = tt->pages[i];
- unsigned int order, num_pages;
- struct ttm_pool_type *pt;
-
- order = ttm_pool_page_order(pool, p);
- num_pages = 1ULL << order;
- if (tt->dma_address)
- ttm_pool_unmap(pool, tt->dma_address[i], num_pages);
-
- pt = ttm_pool_select_type(pool, tt->caching, order);
- if (pt)
- ttm_pool_type_give(pt, tt->pages[i]);
- else
- ttm_pool_free_page(pool, tt->caching, order,
- tt->pages[i]);
-
- i += num_pages;
- }
+ ttm_pool_free_range(pool, tt, tt->caching, 0, tt->num_pages);
while (atomic_long_read(&allocated_pages) > page_pool_size)
ttm_pool_shrink();
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 1/3] drm/ttm/pool: Fix ttm_pool_alloc error path
@ 2023-03-09 13:16 ` Thomas Hellström
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:16 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Huang Rui, Matthew Auld,
Dave Airlie, Christian König
When hitting an error, the error path forgot to unmap dma mappings and
could call set_pages_wb() on already uncached pages.
Fix this by introducing a common ttm_pool_free_range() function that
does the right thing.
v2:
- Simplify that common function (Christian König)
v3:
- Rename that common function to ttm_pool_free_range() (Christian König)
Fixes: d099fc8f540a ("drm/ttm: new TT backend allocation pool v3")
Cc: Christian König <christian.koenig@amd.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/ttm/ttm_pool.c | 81 +++++++++++++++++++++-------------
1 file changed, 51 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index aa116a7bbae3..dfce896c4bae 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -367,6 +367,43 @@ static int ttm_pool_page_allocated(struct ttm_pool *pool, unsigned int order,
return 0;
}
+/**
+ * ttm_pool_free_range() - Free a range of TTM pages
+ * @pool: The pool used for allocating.
+ * @tt: The struct ttm_tt holding the page pointers.
+ * @caching: The page caching mode used by the range.
+ * @start_page: index for first page to free.
+ * @end_page: index for last page to free + 1.
+ *
+ * During allocation the ttm_tt page-vector may be populated with ranges of
+ * pages with different attributes if allocation hit an error without being
+ * able to completely fulfill the allocation. This function can be used
+ * to free these individual ranges.
+ */
+static void ttm_pool_free_range(struct ttm_pool *pool, struct ttm_tt *tt,
+ enum ttm_caching caching,
+ pgoff_t start_page, pgoff_t end_page)
+{
+ struct page **pages = tt->pages;
+ unsigned int order;
+ pgoff_t i, nr;
+
+ for (i = start_page; i < end_page; i += nr, pages += nr) {
+ struct ttm_pool_type *pt = NULL;
+
+ order = ttm_pool_page_order(pool, *pages);
+ nr = (1UL << order);
+ if (tt->dma_address)
+ ttm_pool_unmap(pool, tt->dma_address[i], nr);
+
+ pt = ttm_pool_select_type(pool, caching, order);
+ if (pt)
+ ttm_pool_type_give(pt, *pages);
+ else
+ ttm_pool_free_page(pool, caching, order, *pages);
+ }
+}
+
/**
* ttm_pool_alloc - Fill a ttm_tt object
*
@@ -382,12 +419,14 @@ static int ttm_pool_page_allocated(struct ttm_pool *pool, unsigned int order,
int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
struct ttm_operation_ctx *ctx)
{
- unsigned long num_pages = tt->num_pages;
+ pgoff_t num_pages = tt->num_pages;
dma_addr_t *dma_addr = tt->dma_address;
struct page **caching = tt->pages;
struct page **pages = tt->pages;
+ enum ttm_caching page_caching;
gfp_t gfp_flags = GFP_USER;
- unsigned int i, order;
+ pgoff_t caching_divide;
+ unsigned int order;
struct page *p;
int r;
@@ -410,6 +449,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
order = min_t(unsigned int, order, __fls(num_pages))) {
struct ttm_pool_type *pt;
+ page_caching = tt->caching;
pt = ttm_pool_select_type(pool, tt->caching, order);
p = pt ? ttm_pool_type_take(pt) : NULL;
if (p) {
@@ -418,6 +458,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
if (r)
goto error_free_page;
+ caching = pages;
do {
r = ttm_pool_page_allocated(pool, order, p,
&dma_addr,
@@ -426,14 +467,15 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
if (r)
goto error_free_page;
+ caching = pages;
if (num_pages < (1 << order))
break;
p = ttm_pool_type_take(pt);
} while (p);
- caching = pages;
}
+ page_caching = ttm_cached;
while (num_pages >= (1 << order) &&
(p = ttm_pool_alloc_page(pool, gfp_flags, order))) {
@@ -442,6 +484,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
tt->caching);
if (r)
goto error_free_page;
+ caching = pages;
}
r = ttm_pool_page_allocated(pool, order, p, &dma_addr,
&num_pages, &pages);
@@ -468,15 +511,13 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
return 0;
error_free_page:
- ttm_pool_free_page(pool, tt->caching, order, p);
+ ttm_pool_free_page(pool, page_caching, order, p);
error_free_all:
num_pages = tt->num_pages - num_pages;
- for (i = 0; i < num_pages; ) {
- order = ttm_pool_page_order(pool, tt->pages[i]);
- ttm_pool_free_page(pool, tt->caching, order, tt->pages[i]);
- i += 1 << order;
- }
+ caching_divide = caching - tt->pages;
+ ttm_pool_free_range(pool, tt, tt->caching, 0, caching_divide);
+ ttm_pool_free_range(pool, tt, ttm_cached, caching_divide, num_pages);
return r;
}
@@ -492,27 +533,7 @@ EXPORT_SYMBOL(ttm_pool_alloc);
*/
void ttm_pool_free(struct ttm_pool *pool, struct ttm_tt *tt)
{
- unsigned int i;
-
- for (i = 0; i < tt->num_pages; ) {
- struct page *p = tt->pages[i];
- unsigned int order, num_pages;
- struct ttm_pool_type *pt;
-
- order = ttm_pool_page_order(pool, p);
- num_pages = 1ULL << order;
- if (tt->dma_address)
- ttm_pool_unmap(pool, tt->dma_address[i], num_pages);
-
- pt = ttm_pool_select_type(pool, tt->caching, order);
- if (pt)
- ttm_pool_type_give(pt, tt->pages[i]);
- else
- ttm_pool_free_page(pool, tt->caching, order,
- tt->pages[i]);
-
- i += num_pages;
- }
+ ttm_pool_free_range(pool, tt, tt->caching, 0, tt->num_pages);
while (atomic_long_read(&allocated_pages) > page_pool_size)
ttm_pool_shrink();
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/3] drm/ttm: Reduce the number of used allocation orders for TTM pages
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
@ 2023-03-09 13:17 ` Thomas Hellström
-1 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:17 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian König, Matthew Auld
When swapping out, we will split multi-order pages both in order to
move them to the swap-cache and to be able to return memory to the
swap cache as soon as possible on a page-by-page basis.
Reduce the page max order to the system PMD size, as we can then be nicer
to the system and avoid splitting gigantic pages.
Looking forward to when we might be able to swap out PMD size folios
without splitting, this will also be a benefit.
v2:
- Include all orders up to the PMD size (Christian König)
v3:
- Avoid compilation errors for architectures with special PFN_SHIFTs
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/ttm/ttm_pool.c | 30 +++++++++++++++++++-----------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index dfce896c4bae..18c342a919a2 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -47,6 +47,11 @@
#include "ttm_module.h"
+#define TTM_MAX_ORDER (PMD_SHIFT - PAGE_SHIFT)
+#define __TTM_DIM_ORDER (TTM_MAX_ORDER + 1)
+/* Some architectures have a weird PMD_SHIFT */
+#define TTM_DIM_ORDER (__TTM_DIM_ORDER <= MAX_ORDER ? __TTM_DIM_ORDER : MAX_ORDER)
+
/**
* struct ttm_pool_dma - Helper object for coherent DMA mappings
*
@@ -65,11 +70,11 @@ module_param(page_pool_size, ulong, 0644);
static atomic_long_t allocated_pages;
-static struct ttm_pool_type global_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_uncached[MAX_ORDER];
+static struct ttm_pool_type global_write_combined[TTM_DIM_ORDER];
+static struct ttm_pool_type global_uncached[TTM_DIM_ORDER];
-static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_dma32_uncached[MAX_ORDER];
+static struct ttm_pool_type global_dma32_write_combined[TTM_DIM_ORDER];
+static struct ttm_pool_type global_dma32_uncached[TTM_DIM_ORDER];
static spinlock_t shrinker_lock;
static struct list_head shrinker_list;
@@ -444,7 +449,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
else
gfp_flags |= GFP_HIGHUSER;
- for (order = min_t(unsigned int, MAX_ORDER - 1, __fls(num_pages));
+ for (order = min_t(unsigned int, TTM_MAX_ORDER, __fls(num_pages));
num_pages;
order = min_t(unsigned int, order, __fls(num_pages))) {
struct ttm_pool_type *pt;
@@ -563,7 +568,7 @@ void ttm_pool_init(struct ttm_pool *pool, struct device *dev,
if (use_dma_alloc) {
for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
- for (j = 0; j < MAX_ORDER; ++j)
+ for (j = 0; j < TTM_DIM_ORDER; ++j)
ttm_pool_type_init(&pool->caching[i].orders[j],
pool, i, j);
}
@@ -583,7 +588,7 @@ void ttm_pool_fini(struct ttm_pool *pool)
if (pool->use_dma_alloc) {
for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
- for (j = 0; j < MAX_ORDER; ++j)
+ for (j = 0; j < TTM_DIM_ORDER; ++j)
ttm_pool_type_fini(&pool->caching[i].orders[j]);
}
@@ -637,7 +642,7 @@ static void ttm_pool_debugfs_header(struct seq_file *m)
unsigned int i;
seq_puts(m, "\t ");
- for (i = 0; i < MAX_ORDER; ++i)
+ for (i = 0; i < TTM_DIM_ORDER; ++i)
seq_printf(m, " ---%2u---", i);
seq_puts(m, "\n");
}
@@ -648,7 +653,7 @@ static void ttm_pool_debugfs_orders(struct ttm_pool_type *pt,
{
unsigned int i;
- for (i = 0; i < MAX_ORDER; ++i)
+ for (i = 0; i < TTM_DIM_ORDER; ++i)
seq_printf(m, " %8u", ttm_pool_type_count(&pt[i]));
seq_puts(m, "\n");
}
@@ -751,13 +756,16 @@ int ttm_pool_mgr_init(unsigned long num_pages)
{
unsigned int i;
+ BUILD_BUG_ON(TTM_DIM_ORDER > MAX_ORDER);
+ BUILD_BUG_ON(TTM_DIM_ORDER < 1);
+
if (!page_pool_size)
page_pool_size = num_pages;
spin_lock_init(&shrinker_lock);
INIT_LIST_HEAD(&shrinker_list);
- for (i = 0; i < MAX_ORDER; ++i) {
+ for (i = 0; i < TTM_DIM_ORDER; ++i) {
ttm_pool_type_init(&global_write_combined[i], NULL,
ttm_write_combined, i);
ttm_pool_type_init(&global_uncached[i], NULL, ttm_uncached, i);
@@ -790,7 +798,7 @@ void ttm_pool_mgr_fini(void)
{
unsigned int i;
- for (i = 0; i < MAX_ORDER; ++i) {
+ for (i = 0; i < TTM_DIM_ORDER; ++i) {
ttm_pool_type_fini(&global_write_combined[i]);
ttm_pool_type_fini(&global_uncached[i]);
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 2/3] drm/ttm: Reduce the number of used allocation orders for TTM pages
@ 2023-03-09 13:17 ` Thomas Hellström
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:17 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian König, Matthew Auld
When swapping out, we will split multi-order pages both in order to
move them to the swap-cache and to be able to return memory to the
swap cache as soon as possible on a page-by-page basis.
Reduce the page max order to the system PMD size, as we can then be nicer
to the system and avoid splitting gigantic pages.
Looking forward to when we might be able to swap out PMD size folios
without splitting, this will also be a benefit.
v2:
- Include all orders up to the PMD size (Christian König)
v3:
- Avoid compilation errors for architectures with special PFN_SHIFTs
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/ttm/ttm_pool.c | 30 +++++++++++++++++++-----------
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index dfce896c4bae..18c342a919a2 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -47,6 +47,11 @@
#include "ttm_module.h"
+#define TTM_MAX_ORDER (PMD_SHIFT - PAGE_SHIFT)
+#define __TTM_DIM_ORDER (TTM_MAX_ORDER + 1)
+/* Some architectures have a weird PMD_SHIFT */
+#define TTM_DIM_ORDER (__TTM_DIM_ORDER <= MAX_ORDER ? __TTM_DIM_ORDER : MAX_ORDER)
+
/**
* struct ttm_pool_dma - Helper object for coherent DMA mappings
*
@@ -65,11 +70,11 @@ module_param(page_pool_size, ulong, 0644);
static atomic_long_t allocated_pages;
-static struct ttm_pool_type global_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_uncached[MAX_ORDER];
+static struct ttm_pool_type global_write_combined[TTM_DIM_ORDER];
+static struct ttm_pool_type global_uncached[TTM_DIM_ORDER];
-static struct ttm_pool_type global_dma32_write_combined[MAX_ORDER];
-static struct ttm_pool_type global_dma32_uncached[MAX_ORDER];
+static struct ttm_pool_type global_dma32_write_combined[TTM_DIM_ORDER];
+static struct ttm_pool_type global_dma32_uncached[TTM_DIM_ORDER];
static spinlock_t shrinker_lock;
static struct list_head shrinker_list;
@@ -444,7 +449,7 @@ int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,
else
gfp_flags |= GFP_HIGHUSER;
- for (order = min_t(unsigned int, MAX_ORDER - 1, __fls(num_pages));
+ for (order = min_t(unsigned int, TTM_MAX_ORDER, __fls(num_pages));
num_pages;
order = min_t(unsigned int, order, __fls(num_pages))) {
struct ttm_pool_type *pt;
@@ -563,7 +568,7 @@ void ttm_pool_init(struct ttm_pool *pool, struct device *dev,
if (use_dma_alloc) {
for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
- for (j = 0; j < MAX_ORDER; ++j)
+ for (j = 0; j < TTM_DIM_ORDER; ++j)
ttm_pool_type_init(&pool->caching[i].orders[j],
pool, i, j);
}
@@ -583,7 +588,7 @@ void ttm_pool_fini(struct ttm_pool *pool)
if (pool->use_dma_alloc) {
for (i = 0; i < TTM_NUM_CACHING_TYPES; ++i)
- for (j = 0; j < MAX_ORDER; ++j)
+ for (j = 0; j < TTM_DIM_ORDER; ++j)
ttm_pool_type_fini(&pool->caching[i].orders[j]);
}
@@ -637,7 +642,7 @@ static void ttm_pool_debugfs_header(struct seq_file *m)
unsigned int i;
seq_puts(m, "\t ");
- for (i = 0; i < MAX_ORDER; ++i)
+ for (i = 0; i < TTM_DIM_ORDER; ++i)
seq_printf(m, " ---%2u---", i);
seq_puts(m, "\n");
}
@@ -648,7 +653,7 @@ static void ttm_pool_debugfs_orders(struct ttm_pool_type *pt,
{
unsigned int i;
- for (i = 0; i < MAX_ORDER; ++i)
+ for (i = 0; i < TTM_DIM_ORDER; ++i)
seq_printf(m, " %8u", ttm_pool_type_count(&pt[i]));
seq_puts(m, "\n");
}
@@ -751,13 +756,16 @@ int ttm_pool_mgr_init(unsigned long num_pages)
{
unsigned int i;
+ BUILD_BUG_ON(TTM_DIM_ORDER > MAX_ORDER);
+ BUILD_BUG_ON(TTM_DIM_ORDER < 1);
+
if (!page_pool_size)
page_pool_size = num_pages;
spin_lock_init(&shrinker_lock);
INIT_LIST_HEAD(&shrinker_list);
- for (i = 0; i < MAX_ORDER; ++i) {
+ for (i = 0; i < TTM_DIM_ORDER; ++i) {
ttm_pool_type_init(&global_write_combined[i], NULL,
ttm_write_combined, i);
ttm_pool_type_init(&global_uncached[i], NULL, ttm_uncached, i);
@@ -790,7 +798,7 @@ void ttm_pool_mgr_fini(void)
{
unsigned int i;
- for (i = 0; i < MAX_ORDER; ++i) {
+ for (i = 0; i < TTM_DIM_ORDER; ++i) {
ttm_pool_type_fini(&global_write_combined[i]);
ttm_pool_type_fini(&global_uncached[i]);
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/3] drm/ttm: Make the call to ttm_tt_populate() interruptible when faulting
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
@ 2023-03-09 13:17 ` Thomas Hellström
-1 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:17 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian Koenig, Matthew Auld
When swapping in, or under memory pressure ttm_tt_populate() may sleep
for a substantiable amount of time. Allow interrupts during the sleep.
This will also allow us to inject -EINTR errors during swapin in upcoming
patches.
Also avoid returning VM_FAULT_OOM, since that will confuse the core
mm, making it print out a confused message and retrying the fault.
Return VM_FAULT_SIGBUS also under OOM conditions.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/ttm/ttm_bo_vm.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index ca7744b852f5..4bca6b54520a 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -218,14 +218,21 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
prot = ttm_io_prot(bo, bo->resource, prot);
if (!bo->resource->bus.is_iomem) {
struct ttm_operation_ctx ctx = {
- .interruptible = false,
+ .interruptible = true,
.no_wait_gpu = false,
.force_alloc = true
};
ttm = bo->ttm;
- if (ttm_tt_populate(bdev, bo->ttm, &ctx))
- return VM_FAULT_OOM;
+ err = ttm_tt_populate(bdev, bo->ttm, &ctx);
+ if (err) {
+ if (err == -EINTR || err == -ERESTARTSYS ||
+ err == -EAGAIN)
+ return VM_FAULT_NOPAGE;
+
+ pr_debug("TTM fault hit %pe.\n", ERR_PTR(err));
+ return VM_FAULT_SIGBUS;
+ }
} else {
/* Iomem should not be marked encrypted */
prot = pgprot_decrypted(prot);
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 3/3] drm/ttm: Make the call to ttm_tt_populate() interruptible when faulting
@ 2023-03-09 13:17 ` Thomas Hellström
0 siblings, 0 replies; 10+ messages in thread
From: Thomas Hellström @ 2023-03-09 13:17 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, intel-gfx, Christian Koenig, Matthew Auld
When swapping in, or under memory pressure ttm_tt_populate() may sleep
for a substantiable amount of time. Allow interrupts during the sleep.
This will also allow us to inject -EINTR errors during swapin in upcoming
patches.
Also avoid returning VM_FAULT_OOM, since that will confuse the core
mm, making it print out a confused message and retrying the fault.
Return VM_FAULT_SIGBUS also under OOM conditions.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
drivers/gpu/drm/ttm/ttm_bo_vm.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index ca7744b852f5..4bca6b54520a 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -218,14 +218,21 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
prot = ttm_io_prot(bo, bo->resource, prot);
if (!bo->resource->bus.is_iomem) {
struct ttm_operation_ctx ctx = {
- .interruptible = false,
+ .interruptible = true,
.no_wait_gpu = false,
.force_alloc = true
};
ttm = bo->ttm;
- if (ttm_tt_populate(bdev, bo->ttm, &ctx))
- return VM_FAULT_OOM;
+ err = ttm_tt_populate(bdev, bo->ttm, &ctx);
+ if (err) {
+ if (err == -EINTR || err == -ERESTARTSYS ||
+ err == -EAGAIN)
+ return VM_FAULT_NOPAGE;
+
+ pr_debug("TTM fault hit %pe.\n", ERR_PTR(err));
+ return VM_FAULT_SIGBUS;
+ }
} else {
/* Iomem should not be marked encrypted */
prot = pgprot_decrypted(prot);
--
2.39.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/ttm: Small fixes / cleanups in prep for shrinking (rev2)
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
` (3 preceding siblings ...)
(?)
@ 2023-03-15 9:38 ` Patchwork
-1 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-15 9:38 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 2743 bytes --]
== Series Details ==
Series: drm/ttm: Small fixes / cleanups in prep for shrinking (rev2)
URL : https://patchwork.freedesktop.org/series/114774/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12829 -> Patchwork_114774v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/index.html
Participating hosts (36 -> 33)
------------------------------
Missing (3): bat-rpls-2 fi-snb-2520m fi-bsw-n3050
Known issues
------------
Here are the changes found in Patchwork_114774v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@mman:
- bat-rpls-1: [PASS][1] -> [TIMEOUT][2] ([i915#6794])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/bat-rpls-1/igt@i915_selftest@live@mman.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/bat-rpls-1/igt@i915_selftest@live@mman.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][3] ([i915#5354]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [DMESG-FAIL][4] ([i915#5334] / [i915#7872]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
Build changes
-------------
* Linux: CI_DRM_12829 -> Patchwork_114774v2
CI-20190529: 20190529
CI_DRM_12829: d947159409deea43f404f35cc758740c714c8888 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7185: 6707461ddb214bb8a75c5fcf2747941c9d9b11ae @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114774v2: d947159409deea43f404f35cc758740c714c8888 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
8fdd9b2fa76c drm/ttm: Make the call to ttm_tt_populate() interruptible when faulting
a70b4b93a66d drm/ttm: Reduce the number of used allocation orders for TTM pages
8b35e90ab971 drm/ttm/pool: Fix ttm_pool_alloc error path
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/index.html
[-- Attachment #2: Type: text/html, Size: 3410 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/ttm: Small fixes / cleanups in prep for shrinking (rev2)
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
` (4 preceding siblings ...)
(?)
@ 2023-03-16 0:20 ` Patchwork
-1 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2023-03-16 0:20 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 27079 bytes --]
== Series Details ==
Series: drm/ttm: Small fixes / cleanups in prep for shrinking (rev2)
URL : https://patchwork.freedesktop.org/series/114774/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12829_full -> Patchwork_114774v2_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114774v2_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114774v2_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (8 -> 7)
------------------------------
Missing (1): shard-tglu0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114774v2_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_reloc@basic-write-cpu:
- shard-glk: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk1/igt@gem_exec_reloc@basic-write-cpu.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk7/igt@gem_exec_reloc@basic-write-cpu.html
#### Warnings ####
* igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-glk: [SKIP][3] ([fdo#109271] / [i915#3886]) -> [TIMEOUT][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk1/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk7/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-render:
- shard-glk: [SKIP][5] ([fdo#109271]) -> [TIMEOUT][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-render.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-render.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rpm@cursor-dpms:
- {shard-tglu}: [PASS][7] -> [FAIL][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-1/igt@i915_pm_rpm@cursor-dpms.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-6/igt@i915_pm_rpm@cursor-dpms.html
* igt@i915_suspend@basic-s3-without-i915:
- {shard-tglu}: NOTRUN -> [INCOMPLETE][9]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-9/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- {shard-tglu}: [PASS][10] -> [DMESG-WARN][11] +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
Known issues
------------
Here are the changes found in Patchwork_114774v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk7/igt@gem_exec_fair@basic-none@rcs0.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk6/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_lmem_swapping@heavy-random:
- shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@gem_lmem_swapping@heavy-random.html
* igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271]) +34 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3886])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_content_protection@uevent@pipe-a-dp-1:
- shard-apl: NOTRUN -> [FAIL][17] ([i915#1339])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@kms_content_protection@uevent@pipe-a-dp-1.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][18] -> [FAIL][19] ([i915#2346])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-apl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#2122])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2:
- shard-glk: [PASS][22] -> [FAIL][23] ([i915#79])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk8/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a2.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-apl: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#533])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@kms_vblank@pipe-d-wait-idle.html
* igt@perf@enable-disable:
- shard-glk: [PASS][25] -> [TIMEOUT][26] ([i915#6943])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk1/igt@perf@enable-disable.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk7/igt@perf@enable-disable.html
#### Possible fixes ####
* igt@drm_fdinfo@virtual-idle:
- {shard-rkl}: [FAIL][27] ([i915#7742]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-4/igt@drm_fdinfo@virtual-idle.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-1/igt@drm_fdinfo@virtual-idle.html
* igt@fbdev@read:
- {shard-rkl}: [SKIP][29] ([i915#2582]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-1/igt@fbdev@read.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@fbdev@read.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-tglu}: [FAIL][31] ([i915#6268]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@gem_ctx_exec@basic-nohangcheck.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-5/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@reset-stress:
- {shard-dg1}: [FAIL][33] ([i915#5784]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-dg1-12/igt@gem_eio@reset-stress.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-dg1-17/igt@gem_eio@reset-stress.html
* igt@gem_eio@suspend:
- {shard-rkl}: [FAIL][35] ([i915#5115] / [i915#7052]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-3/igt@gem_eio@suspend.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-2/igt@gem_eio@suspend.html
* igt@gem_exec_balancer@fairslice:
- {shard-rkl}: [SKIP][37] ([i915#6259]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@gem_exec_balancer@fairslice.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-1/igt@gem_exec_balancer@fairslice.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][39] ([i915#2842]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-glk: [FAIL][41] ([i915#2842]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-glk4/igt@gem_exec_fair@basic-none-vip@rcs0.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-glk2/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- {shard-tglu}: [FAIL][43] ([i915#2842]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-3/igt@gem_exec_fair@basic-throttle@rcs0.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-8/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_reloc@basic-write-gtt:
- {shard-rkl}: [SKIP][45] ([i915#3281]) -> [PASS][46] +4 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-4/igt@gem_exec_reloc@basic-write-gtt.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-5/igt@gem_exec_reloc@basic-write-gtt.html
* igt@gem_exec_schedule@semaphore-power:
- {shard-rkl}: [SKIP][47] ([i915#7276]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-3/igt@gem_exec_schedule@semaphore-power.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-5/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- {shard-dg1}: [DMESG-WARN][49] ([i915#4936]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-dg1-13/igt@gem_lmem_swapping@smem-oom@lmem0.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-dg1-14/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gen9_exec_parse@batch-zero-length:
- {shard-rkl}: [SKIP][51] ([i915#2527]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-3/igt@gen9_exec_parse@batch-zero-length.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-5/igt@gen9_exec_parse@batch-zero-length.html
* {igt@i915_pm_dc@dc5-dpms-negative}:
- {shard-tglu}: [SKIP][53] ([i915#8018]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@i915_pm_dc@dc5-dpms-negative.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-1/igt@i915_pm_dc@dc5-dpms-negative.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-rkl}: [SKIP][55] ([i915#3361]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-2/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_dc@dc6-psr:
- {shard-rkl}: [SKIP][57] ([i915#658]) -> [PASS][58] +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-3/igt@i915_pm_dc@dc6-psr.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rpm@dpms-mode-unset-lpsp:
- {shard-dg1}: [SKIP][59] ([i915#1397]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-dg1-13/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-dg1-14/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html
* igt@i915_pm_rpm@system-suspend:
- {shard-rkl}: [FAIL][61] ([fdo#103375]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-3/igt@i915_pm_rpm@system-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-2/igt@i915_pm_rpm@system-suspend.html
* igt@i915_suspend@forcewake:
- shard-apl: [ABORT][63] ([i915#180]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-apl4/igt@i915_suspend@forcewake.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-apl7/igt@i915_suspend@forcewake.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- {shard-rkl}: [SKIP][65] ([i915#1845] / [i915#4098]) -> [PASS][66] +30 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@kms_big_fb@linear-32bpp-rotate-0.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
- {shard-tglu}: [SKIP][67] ([i915#1845]) -> [PASS][68] +7 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
* igt@kms_cursor_legacy@torture-bo@pipe-c:
- {shard-tglu}: [INCOMPLETE][69] ([i915#8011]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-1/igt@kms_cursor_legacy@torture-bo@pipe-c.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-6/igt@kms_cursor_legacy@torture-bo@pipe-c.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-pwrite:
- {shard-tglu}: [SKIP][71] ([i915#1849]) -> [PASS][72] +21 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-pwrite.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
- {shard-rkl}: [SKIP][73] ([i915#1849] / [i915#4098]) -> [PASS][74] +13 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-planes:
- {shard-tglu}: [SKIP][75] ([i915#1849] / [i915#3558]) -> [PASS][76] +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-8/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
* igt@kms_plane@plane-position-covered@pipe-a-planes:
- {shard-rkl}: [SKIP][77] ([i915#1849]) -> [PASS][78] +3 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@kms_plane@plane-position-covered@pipe-a-planes.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@kms_plane@plane-position-covered@pipe-a-planes.html
* igt@kms_psr@primary_render:
- {shard-rkl}: [SKIP][79] ([i915#1072]) -> [PASS][80] +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-1/igt@kms_psr@primary_render.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@kms_psr@primary_render.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- {shard-rkl}: [SKIP][81] ([i915#5461]) -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-rkl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_universal_plane@cursor-fb-leak-pipe-d:
- {shard-tglu}: [SKIP][83] ([fdo#109274]) -> [PASS][84] +2 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html
* igt@kms_vblank@pipe-d-wait-forked-busy:
- {shard-tglu}: [SKIP][85] ([i915#1845] / [i915#7651]) -> [PASS][86] +51 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12829/shard-tglu-6/igt@kms_vblank@pipe-d-wait-forked-busy.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/shard-tglu-5/igt@kms_vblank@pipe-d-wait-forked-busy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
[i915#5115]: https://gitlab.freedesktop.org/drm/intel/issues/5115
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6259]: https://gitlab.freedesktop.org/drm/intel/issues/6259
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6943]: https://gitlab.freedesktop.org/drm/intel/issues/6943
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128
[i915#7276]: https://gitlab.freedesktop.org/drm/intel/issues/7276
[i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
[i915#8275]: https://gitlab.freedesktop.org/drm/intel/issues/8275
Build changes
-------------
* Linux: CI_DRM_12829 -> Patchwork_114774v2
CI-20190529: 20190529
CI_DRM_12829: d947159409deea43f404f35cc758740c714c8888 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7185: 6707461ddb214bb8a75c5fcf2747941c9d9b11ae @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114774v2: d947159409deea43f404f35cc758740c714c8888 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114774v2/index.html
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2023-03-09 13:16 [PATCH v3 0/3] drm/ttm: Small fixes / cleanups in prep for shrinking Thomas Hellström
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
2023-03-09 13:16 ` [PATCH v3 1/3] drm/ttm/pool: Fix ttm_pool_alloc error path Thomas Hellström
2023-03-09 13:16 ` [Intel-gfx] " Thomas Hellström
2023-03-09 13:17 ` [PATCH v3 2/3] drm/ttm: Reduce the number of used allocation orders for TTM pages Thomas Hellström
2023-03-09 13:17 ` [Intel-gfx] " Thomas Hellström
2023-03-09 13:17 ` [PATCH v3 3/3] drm/ttm: Make the call to ttm_tt_populate() interruptible when faulting Thomas Hellström
2023-03-09 13:17 ` [Intel-gfx] " Thomas Hellström
2023-03-15 9:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/ttm: Small fixes / cleanups in prep for shrinking (rev2) Patchwork
2023-03-16 0:20 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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