From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: <neil.armstrong@linaro.org>, <jbrunet@baylibre.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<khilman@baylibre.com>, <martin.blumenstingl@googlemail.com>,
<jian.hu@amlogic.com>, <kernel@sberdevices.ru>,
<rockosov@gmail.com>, <linux-amlogic@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings
Date: Tue, 14 Mar 2023 14:48:25 +0300 [thread overview]
Message-ID: <20230314114825.yiv4vcszr6b7m45w@CAB-WSD-L081021> (raw)
In-Reply-To: <ffebef1d-8447-181b-1890-3e638d399c62@linaro.org>
On Tue, Mar 14, 2023 at 12:28:40PM +0100, Krzysztof Kozlowski wrote:
> On 13/03/2023 21:12, Dmitry Rokosov wrote:
[...]
> > +#define CLKID_SPIFC 84
> > +#define CLKID_USB_BUS 85
> > +#define CLKID_SD_EMMC 86
> > +#define CLKID_PSRAM 87
> > +#define CLKID_DMC 88
>
> And what is here? Between 88 and 121?
>
Explained below.
> > +#define CLKID_GEN_SEL 121
> > +
> > +#endif /* __A1_CLKC_H */
> > diff --git a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > new file mode 100644
> > index 000000000000..8e97d3fb9d30
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > @@ -0,0 +1,20 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
>
> I found in changelog:
> "fix license issue, it's GPL-2.0+ only in the current version"
> and I do not understand.
>
> The license is wrong, so what did you fix?
>
Sorry don't get you. Why is it wrong?
I've changed all new source files to GPL-2.0+ except yaml, because yaml
dt bindings schemas require the following license:
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
I've pointed it in the changelog.
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + * Author: Jian Hu <jian.hu@amlogic.com>
> > + *
> > + * Copyright (c) 2023, SberDevices. All Rights Reserved.
> > + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> > + */
> > +
> > +#ifndef __A1_PLL_CLKC_H
> > +#define __A1_PLL_CLKC_H
> > +
> > +#define CLKID_FIXED_PLL 1
> > +#define CLKID_FCLK_DIV2 6
> > +#define CLKID_FCLK_DIV3 7
> > +#define CLKID_FCLK_DIV5 8
> > +#define CLKID_FCLK_DIV7 9
> > +#define CLKID_HIFI_PLL 10
>
>
> Probably I asked about this... why indices are not continuous? You know
> that consumers are allowed to use number 2 and it will be your ABI, even
> though you did not write it in the binding? That's a tricky and
> confusing pattern for no real gains.
Actually, indices are continuou but splitted into two parts: public and
private. The public part is located in the dt bindings and can be included
from device tree sources. The private part is in the drivers/clk/meson
folder, and only clk drivers can use it.
I know, there is some trick when the user just inserts a digit value and
doesn't use constants. But I'm starting from the assumption that such
dts changes will not be approved by maintainers. In other words, the user
*must* apply defined ABI constants from dt bindings; it's a strong
restriction.
--
Thank you,
Dmitry
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: <neil.armstrong@linaro.org>, <jbrunet@baylibre.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<khilman@baylibre.com>, <martin.blumenstingl@googlemail.com>,
<jian.hu@amlogic.com>, <kernel@sberdevices.ru>,
<rockosov@gmail.com>, <linux-amlogic@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings
Date: Tue, 14 Mar 2023 14:48:25 +0300 [thread overview]
Message-ID: <20230314114825.yiv4vcszr6b7m45w@CAB-WSD-L081021> (raw)
In-Reply-To: <ffebef1d-8447-181b-1890-3e638d399c62@linaro.org>
On Tue, Mar 14, 2023 at 12:28:40PM +0100, Krzysztof Kozlowski wrote:
> On 13/03/2023 21:12, Dmitry Rokosov wrote:
[...]
> > +#define CLKID_SPIFC 84
> > +#define CLKID_USB_BUS 85
> > +#define CLKID_SD_EMMC 86
> > +#define CLKID_PSRAM 87
> > +#define CLKID_DMC 88
>
> And what is here? Between 88 and 121?
>
Explained below.
> > +#define CLKID_GEN_SEL 121
> > +
> > +#endif /* __A1_CLKC_H */
> > diff --git a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > new file mode 100644
> > index 000000000000..8e97d3fb9d30
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > @@ -0,0 +1,20 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
>
> I found in changelog:
> "fix license issue, it's GPL-2.0+ only in the current version"
> and I do not understand.
>
> The license is wrong, so what did you fix?
>
Sorry don't get you. Why is it wrong?
I've changed all new source files to GPL-2.0+ except yaml, because yaml
dt bindings schemas require the following license:
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
I've pointed it in the changelog.
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + * Author: Jian Hu <jian.hu@amlogic.com>
> > + *
> > + * Copyright (c) 2023, SberDevices. All Rights Reserved.
> > + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> > + */
> > +
> > +#ifndef __A1_PLL_CLKC_H
> > +#define __A1_PLL_CLKC_H
> > +
> > +#define CLKID_FIXED_PLL 1
> > +#define CLKID_FCLK_DIV2 6
> > +#define CLKID_FCLK_DIV3 7
> > +#define CLKID_FCLK_DIV5 8
> > +#define CLKID_FCLK_DIV7 9
> > +#define CLKID_HIFI_PLL 10
>
>
> Probably I asked about this... why indices are not continuous? You know
> that consumers are allowed to use number 2 and it will be your ABI, even
> though you did not write it in the binding? That's a tricky and
> confusing pattern for no real gains.
Actually, indices are continuou but splitted into two parts: public and
private. The public part is located in the dt bindings and can be included
from device tree sources. The private part is in the drivers/clk/meson
folder, and only clk drivers can use it.
I know, there is some trick when the user just inserts a digit value and
doesn't use constants. But I'm starting from the assumption that such
dts changes will not be approved by maintainers. In other words, the user
*must* apply defined ABI constants from dt bindings; it's a strong
restriction.
--
Thank you,
Dmitry
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: <neil.armstrong@linaro.org>, <jbrunet@baylibre.com>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<khilman@baylibre.com>, <martin.blumenstingl@googlemail.com>,
<jian.hu@amlogic.com>, <kernel@sberdevices.ru>,
<rockosov@gmail.com>, <linux-amlogic@lists.infradead.org>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings
Date: Tue, 14 Mar 2023 14:48:25 +0300 [thread overview]
Message-ID: <20230314114825.yiv4vcszr6b7m45w@CAB-WSD-L081021> (raw)
In-Reply-To: <ffebef1d-8447-181b-1890-3e638d399c62@linaro.org>
On Tue, Mar 14, 2023 at 12:28:40PM +0100, Krzysztof Kozlowski wrote:
> On 13/03/2023 21:12, Dmitry Rokosov wrote:
[...]
> > +#define CLKID_SPIFC 84
> > +#define CLKID_USB_BUS 85
> > +#define CLKID_SD_EMMC 86
> > +#define CLKID_PSRAM 87
> > +#define CLKID_DMC 88
>
> And what is here? Between 88 and 121?
>
Explained below.
> > +#define CLKID_GEN_SEL 121
> > +
> > +#endif /* __A1_CLKC_H */
> > diff --git a/include/dt-bindings/clock/amlogic,a1-pll-clkc.h b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > new file mode 100644
> > index 000000000000..8e97d3fb9d30
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/amlogic,a1-pll-clkc.h
> > @@ -0,0 +1,20 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
>
> I found in changelog:
> "fix license issue, it's GPL-2.0+ only in the current version"
> and I do not understand.
>
> The license is wrong, so what did you fix?
>
Sorry don't get you. Why is it wrong?
I've changed all new source files to GPL-2.0+ except yaml, because yaml
dt bindings schemas require the following license:
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
I've pointed it in the changelog.
> > +/*
> > + * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
> > + * Author: Jian Hu <jian.hu@amlogic.com>
> > + *
> > + * Copyright (c) 2023, SberDevices. All Rights Reserved.
> > + * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> > + */
> > +
> > +#ifndef __A1_PLL_CLKC_H
> > +#define __A1_PLL_CLKC_H
> > +
> > +#define CLKID_FIXED_PLL 1
> > +#define CLKID_FCLK_DIV2 6
> > +#define CLKID_FCLK_DIV3 7
> > +#define CLKID_FCLK_DIV5 8
> > +#define CLKID_FCLK_DIV7 9
> > +#define CLKID_HIFI_PLL 10
>
>
> Probably I asked about this... why indices are not continuous? You know
> that consumers are allowed to use number 2 and it will be your ABI, even
> though you did not write it in the binding? That's a tricky and
> confusing pattern for no real gains.
Actually, indices are continuou but splitted into two parts: public and
private. The public part is located in the dt bindings and can be included
from device tree sources. The private part is in the drivers/clk/meson
folder, and only clk drivers can use it.
I know, there is some trick when the user just inserts a digit value and
doesn't use constants. But I'm starting from the assumption that such
dts changes will not be approved by maintainers. In other words, the user
*must* apply defined ABI constants from dt bindings; it's a strong
restriction.
--
Thank you,
Dmitry
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2023-03-14 11:48 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 20:12 [PATCH v10 0/5] add Amlogic A1 clock controller drivers Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 1/5] clk: meson: make pll rst bit as optional Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 2/5] clk: meson: introduce new pll power-on sequence for A1 SoC family Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-14 11:28 ` Krzysztof Kozlowski
2023-03-14 11:28 ` Krzysztof Kozlowski
2023-03-14 11:28 ` Krzysztof Kozlowski
2023-03-14 11:48 ` Dmitry Rokosov [this message]
2023-03-14 11:48 ` Dmitry Rokosov
2023-03-14 11:48 ` Dmitry Rokosov
2023-03-14 14:05 ` Krzysztof Kozlowski
2023-03-14 14:05 ` Krzysztof Kozlowski
2023-03-14 14:05 ` Krzysztof Kozlowski
2023-03-14 15:01 ` Dmitry Rokosov
2023-03-14 15:01 ` Dmitry Rokosov
2023-03-14 15:01 ` Dmitry Rokosov
2023-03-14 15:19 ` Krzysztof Kozlowski
2023-03-14 15:19 ` Krzysztof Kozlowski
2023-03-14 15:19 ` Krzysztof Kozlowski
2023-03-14 15:33 ` neil.armstrong
2023-03-14 15:33 ` neil.armstrong
2023-03-14 15:33 ` neil.armstrong
2023-03-14 15:37 ` Krzysztof Kozlowski
2023-03-14 15:37 ` Krzysztof Kozlowski
2023-03-14 15:37 ` Krzysztof Kozlowski
2023-03-14 15:40 ` neil.armstrong
2023-03-14 15:40 ` neil.armstrong
2023-03-14 15:40 ` neil.armstrong
2023-03-14 15:56 ` Dmitry Rokosov
2023-03-14 15:56 ` Dmitry Rokosov
2023-03-14 15:56 ` Dmitry Rokosov
2023-03-14 16:37 ` Krzysztof Kozlowski
2023-03-14 16:37 ` Krzysztof Kozlowski
2023-03-14 16:37 ` Krzysztof Kozlowski
2023-03-14 19:28 ` Dmitry Rokosov
2023-03-14 19:28 ` Dmitry Rokosov
2023-03-14 19:28 ` Dmitry Rokosov
2023-03-14 16:02 ` Dmitry Rokosov
2023-03-14 16:02 ` Dmitry Rokosov
2023-03-14 16:02 ` Dmitry Rokosov
2023-03-17 18:53 ` Rob Herring
2023-03-17 18:53 ` Rob Herring
2023-03-17 18:53 ` Rob Herring
2023-03-17 20:27 ` Dmitry Rokosov
2023-03-17 20:27 ` Dmitry Rokosov
2023-03-17 20:27 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 4/5] clk: meson: a1: add Amlogic A1 PLL clock controller driver Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 5/5] clk: meson: a1: add Amlogic A1 Peripherals " Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
2023-03-13 20:12 ` Dmitry Rokosov
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