From: Dario Binacchi <dario.binacchi@amarulasolutions.com> To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Amarula patchwork <linux-amarula@amarulasolutions.com>, Vincent Mailhol <mailhol.vincent@wanadoo.fr>, Alexandre Torgue <alexandre.torgue@foss.st.com>, michael@amarulasolutions.com, Rob Herring <robh@kernel.org>, Marc Kleine-Budde <mkl@pengutronix.de>, Dario Binacchi <dario.binacchi@amarulasolutions.com>, "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Wolfgang Grandegger <wg@grandegger.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RESEND PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Date: Wed, 15 Mar 2023 22:10:37 +0100 [thread overview] Message-ID: <20230315211040.2455855-3-dario.binacchi@amarulasolutions.com> (raw) In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> Add documentation of device tree bindings for the STM32 basic extended CAN (bxcan) controller. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Rob Herring <robh@kernel.org> --- (no changes since v5) Changes in v5: - Add Rob Herring's Reviewed-by tag. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. Changes in v3: - Remove 'Dario Binacchi <dariobin@libero.it>' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. .../bindings/net/can/st,stm32-bxcan.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 000000000000..c9194345d202 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi <dario.binacchi@amarulasolutions.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-master: + description: + Master and slave mode of the bxCAN peripheral is only relevant + if the chip has two CAN peripherals. In that case they share + some of the required logic. + type: boolean + + reg: + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + st,gcan: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + The phandle to the gcan node which allows to access the 512-bytes + SRAM memory shared by the two bxCAN cells (CAN1 master and CAN2 + slave) in dual CAN peripheral configuration. + +required: + - compatible + - reg + - interrupts + - resets + - clocks + - st,gcan + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32fx-clock.h> + #include <dt-bindings/mfd/stm32f4-rcc.h> + + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + }; -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Dario Binacchi <dario.binacchi@amarulasolutions.com> To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Amarula patchwork <linux-amarula@amarulasolutions.com>, Vincent Mailhol <mailhol.vincent@wanadoo.fr>, Alexandre Torgue <alexandre.torgue@foss.st.com>, michael@amarulasolutions.com, Rob Herring <robh@kernel.org>, Marc Kleine-Budde <mkl@pengutronix.de>, Dario Binacchi <dario.binacchi@amarulasolutions.com>, "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Wolfgang Grandegger <wg@grandegger.com>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RESEND PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Date: Wed, 15 Mar 2023 22:10:37 +0100 [thread overview] Message-ID: <20230315211040.2455855-3-dario.binacchi@amarulasolutions.com> (raw) In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> Add documentation of device tree bindings for the STM32 basic extended CAN (bxcan) controller. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Rob Herring <robh@kernel.org> --- (no changes since v5) Changes in v5: - Add Rob Herring's Reviewed-by tag. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. Changes in v3: - Remove 'Dario Binacchi <dariobin@libero.it>' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. .../bindings/net/can/st,stm32-bxcan.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml new file mode 100644 index 000000000000..c9194345d202 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics bxCAN controller + +description: STMicroelectronics BxCAN controller for CAN bus + +maintainers: + - Dario Binacchi <dario.binacchi@amarulasolutions.com> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + enum: + - st,stm32f4-bxcan + + st,can-master: + description: + Master and slave mode of the bxCAN peripheral is only relevant + if the chip has two CAN peripherals. In that case they share + some of the required logic. + type: boolean + + reg: + maxItems: 1 + + interrupts: + items: + - description: transmit interrupt + - description: FIFO 0 receive interrupt + - description: FIFO 1 receive interrupt + - description: status change error interrupt + + interrupt-names: + items: + - const: tx + - const: rx0 + - const: rx1 + - const: sce + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + st,gcan: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: + The phandle to the gcan node which allows to access the 512-bytes + SRAM memory shared by the two bxCAN cells (CAN1 master and CAN2 + slave) in dual CAN peripheral configuration. + +required: + - compatible + - reg + - interrupts + - resets + - clocks + - st,gcan + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/stm32fx-clock.h> + #include <dt-bindings/mfd/stm32f4-rcc.h> + + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + }; -- 2.32.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-03-15 21:11 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-15 21:10 [RESEND PATCH v7 0/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 1/5] dt-bindings: arm: stm32: add compatible for syscon gcan node Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi [this message] 2023-03-15 21:10 ` [RESEND PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 4/5] ARM: dts: stm32: add pin map for CAN controller on stm32f4 Dario Binacchi 2023-03-15 21:10 ` Dario Binacchi 2023-03-15 21:10 ` [RESEND PATCH v7 5/5] can: bxcan: add support for ST bxCAN controller Dario Binacchi 2023-03-24 15:40 ` Marc Kleine-Budde 2023-03-24 15:54 ` Marc Kleine-Budde 2023-03-21 11:25 ` [RESEND PATCH v7 0/5] " Dario Binacchi 2023-03-21 11:25 ` Dario Binacchi 2023-03-21 17:50 ` Alexandre TORGUE 2023-03-21 17:50 ` Alexandre TORGUE 2023-03-24 15:56 ` Marc Kleine-Budde 2023-03-24 15:56 ` Marc Kleine-Budde 2023-03-26 16:07 ` Dario Binacchi 2023-03-26 16:07 ` Dario Binacchi 2023-03-27 7:51 ` Marc Kleine-Budde 2023-03-27 7:51 ` Marc Kleine-Budde -- strict thread matches above, loose matches on Subject: below -- 2023-02-07 11:29 Dario Binacchi 2023-02-07 11:29 ` [RESEND PATCH v7 2/5] dt-bindings: net: can: add STM32 bxcan DT bindings Dario Binacchi 2023-02-07 11:29 ` Dario Binacchi
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