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* [PATCH v4 00/12] target/s390x: Handle unaligned accesses
@ 2023-03-16 16:44 Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 01/12] target/s390x: Handle branching to odd addresses Ilya Leoshkevich
                   ` (11 more replies)
  0 siblings, 12 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich

v3: https://lists.gnu.org/archive/html/qemu-devel/2023-03/msg04687.html
v3 -> v4: Get rid of the preprocessor magic in the new tests (Thomas).

v2: https://lists.gnu.org/archive/html/qemu-devel/2023-03/msg04231.html
v2 -> v3: Fix clang build (Thomas).

v1: https://lists.gnu.org/archive/html/qemu-devel/2023-03/msg03821.html
v1 -> v2: Use MO_ALIGN (Richard).

Patches that need review:
- [PATCH 12/12] tests/tcg/s390x: Test unaligned accesses

Hi,

This series makes accessing unaligned addresses with branching, LPSWE,
EXECUTE and relative long instructions fail with a specification
exception instead of succeeding.

Patches 1-10 are fixes, patch 11 adjusts a comment to reflect a change
done by fixes, patch 12 adds a number of softmmu and user tests.

Best regards,
Ilya

Ilya Leoshkevich (12):
  target/s390x: Handle branching to odd addresses
  target/s390x: Handle EXECUTE of odd addresses
  target/s390x: Handle LGRL from non-aligned addresses
  target/s390x: Handle LRL and LGFRL from non-aligned addresses
  target/s390x: Handle LLGFRL from non-aligned addresses
  target/s390x: Handle CRL and CGFRL with non-aligned addresses
  target/s390x: Handle CGRL and CLGRL with non-aligned addresses
  target/s390x: Handle CLRL and CLGFRL with non-aligned addresses
  target/s390x: Handle STRL to non-aligned addresses
  target/s390x: Handle STGRL to non-aligned addresses
  target/s390x: Update do_unaligned_access() comment
  tests/tcg/s390x: Test unaligned accesses

 target/s390x/cpu.h                          |  9 ++++
 target/s390x/tcg/excp_helper.c              |  4 +-
 target/s390x/tcg/insn-data.h.inc            | 46 ++++++++++-----------
 target/s390x/tcg/mem_helper.c               | 12 +++++-
 target/s390x/tcg/translate.c                | 24 +++++++----
 tests/tcg/s390x/Makefile.softmmu-target     | 15 +++++--
 tests/tcg/s390x/Makefile.target             |  8 ++++
 tests/tcg/s390x/br-odd.S                    | 16 +++++++
 tests/tcg/s390x/cgrl-unaligned.S            | 16 +++++++
 tests/tcg/s390x/clrl-unaligned.S            | 16 +++++++
 tests/tcg/s390x/crl-unaligned.S             | 16 +++++++
 tests/tcg/s390x/ex-odd.S                    | 17 ++++++++
 tests/tcg/s390x/lgrl-unaligned.S            | 16 +++++++
 tests/tcg/s390x/llgfrl-unaligned.S          | 16 +++++++
 tests/tcg/s390x/lpswe-unaligned.S           | 18 ++++++++
 tests/tcg/s390x/lrl-unaligned.S             | 16 +++++++
 tests/tcg/s390x/pgm-specification-softmmu.S | 40 ++++++++++++++++++
 tests/tcg/s390x/pgm-specification-user.c    | 37 +++++++++++++++++
 tests/tcg/s390x/pgm-specification.mak       | 15 +++++++
 tests/tcg/s390x/softmmu.ld                  | 20 +++++++++
 tests/tcg/s390x/stgrl-unaligned.S           | 16 +++++++
 tests/tcg/s390x/strl-unaligned.S            | 16 +++++++
 22 files changed, 371 insertions(+), 38 deletions(-)
 create mode 100644 tests/tcg/s390x/br-odd.S
 create mode 100644 tests/tcg/s390x/cgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/clrl-unaligned.S
 create mode 100644 tests/tcg/s390x/crl-unaligned.S
 create mode 100644 tests/tcg/s390x/ex-odd.S
 create mode 100644 tests/tcg/s390x/lgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/llgfrl-unaligned.S
 create mode 100644 tests/tcg/s390x/lpswe-unaligned.S
 create mode 100644 tests/tcg/s390x/lrl-unaligned.S
 create mode 100644 tests/tcg/s390x/pgm-specification-softmmu.S
 create mode 100644 tests/tcg/s390x/pgm-specification-user.c
 create mode 100644 tests/tcg/s390x/pgm-specification.mak
 create mode 100644 tests/tcg/s390x/softmmu.ld
 create mode 100644 tests/tcg/s390x/stgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/strl-unaligned.S

-- 
2.39.2



^ permalink raw reply	[flat|nested] 17+ messages in thread
* [PATCH v4 01/12] target/s390x: Handle branching to odd addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 02/12] target/s390x: Handle EXECUTE of " Ilya Leoshkevich
                   ` (10 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Harold Grovesteen, Nina Schoetterl-Glausch

Let branching happen and try to generate a new translation block with
an odd address. Generate a specification exception in
cpu_get_tb_cpu_state().

Reported-by: Harold Grovesteen <h.grovsteen@tx.rr.com>
Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/cpu.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index 7d6d01325b2..0a76e96e078 100644
--- a/target/s390x/cpu.h
+++ b/target/s390x/cpu.h
@@ -29,6 +29,7 @@
 #include "cpu_models.h"
 #include "exec/cpu-defs.h"
 #include "qemu/cpu-float.h"
+#include "tcg/tcg_s390x.h"
 
 #define ELF_MACHINE_UNAME "S390X"
 
@@ -381,6 +382,14 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch)
 static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc,
                                         target_ulong *cs_base, uint32_t *flags)
 {
+    if (env->psw.addr & 1) {
+        /*
+         * Instructions must be at even addresses.
+         * This needs to be checked before address translation.
+         */
+        env->int_pgm_ilen = 2; /* see s390_cpu_tlb_fill() */
+        tcg_s390_program_interrupt(env, PGM_SPECIFICATION, 0);
+    }
     *pc = env->psw.addr;
     *cs_base = env->ex_value;
     *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW;
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 02/12] target/s390x: Handle EXECUTE of odd addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 01/12] target/s390x: Handle branching to odd addresses Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 03/12] target/s390x: Handle LGRL from non-aligned addresses Ilya Leoshkevich
                   ` (9 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Generate a specification exception in the helper before trying to fetch
the instruction.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/mem_helper.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index 6835c26dda4..9d1c4bb7374 100644
--- a/target/s390x/tcg/mem_helper.c
+++ b/target/s390x/tcg/mem_helper.c
@@ -2468,8 +2468,16 @@ void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr,
 */
 void HELPER(ex)(CPUS390XState *env, uint32_t ilen, uint64_t r1, uint64_t addr)
 {
-    uint64_t insn = cpu_lduw_code(env, addr);
-    uint8_t opc = insn >> 8;
+    uint64_t insn;
+    uint8_t opc;
+
+    /* EXECUTE targets must be at even addresses.  */
+    if (addr & 1) {
+        tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC());
+    }
+
+    insn = cpu_lduw_code(env, addr);
+    opc = insn >> 8;
 
     /* Or in the contents of R1[56:63].  */
     insn |= r1 & 0xff;
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 03/12] target/s390x: Handle LGRL from non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 01/12] target/s390x: Handle branching to odd addresses Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 02/12] target/s390x: Handle EXECUTE of " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 04/12] target/s390x: Handle LRL and LGFRL " Ilya Leoshkevich
                   ` (8 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 6 +++---
 target/s390x/tcg/translate.c     | 3 ++-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 6fe8ca51437..d439d803509 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -414,7 +414,7 @@
     C(0xe358, LY,      RXY_a, LD,  0, a2, new, r1_32, ld32s, 0)
     C(0xb904, LGR,     RRE,   Z,   0, r2_o, 0, r1, mov2, 0)
     C(0xb914, LGFR,    RRE,   Z,   0, r2_32s, 0, r1, mov2, 0)
-    C(0xe304, LG,      RXY_a, Z,   0, a2, r1, 0, ld64, 0)
+    D(0xe304, LG,      RXY_a, Z,   0, a2, r1, 0, ld64, 0, 0)
     C(0xe314, LGF,     RXY_a, Z,   0, a2, r1, 0, ld32s, 0)
     F(0x2800, LDR,     RR_a,  Z,   0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2)
     F(0x6800, LD,      RX_a,  Z,   0, m2_64, 0, f1, mov2, 0, IF_AFP1)
@@ -427,7 +427,7 @@
     C(0xc001, LGFI,    RIL_a, EI,  0, i2, 0, r1, mov2, 0)
 /* LOAD RELATIVE LONG */
     C(0xc40d, LRL,     RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0)
-    C(0xc408, LGRL,    RIL_b, GIE, 0, ri2, r1, 0, ld64, 0)
+    D(0xc408, LGRL,    RIL_b, GIE, 0, ri2, r1, 0, ld64, 0, MO_ALIGN)
     C(0xc40c, LGFRL,   RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0)
 /* LOAD ADDRESS */
     C(0x4100, LA,      RX_a,  Z,   0, a2, 0, r1, mov2, 0)
@@ -457,7 +457,7 @@
     C(0xb902, LTGR,    RRE,   Z,   0, r2_o, 0, r1, mov2, s64)
     C(0xb912, LTGFR,   RRE,   Z,   0, r2_32s, 0, r1, mov2, s64)
     C(0xe312, LT,      RXY_a, EI,  0, a2, new, r1_32, ld32s, s64)
-    C(0xe302, LTG,     RXY_a, EI,  0, a2, r1, 0, ld64, s64)
+    D(0xe302, LTG,     RXY_a, EI,  0, a2, r1, 0, ld64, s64, 0)
     C(0xe332, LTGF,    RXY_a, GIE, 0, a2, r1, 0, ld32s, s64)
     F(0xb302, LTEBR,   RRE,   Z,   0, e2, 0, cond_e1e2, mov2, f32, IF_BFP)
     F(0xb312, LTDBR,   RRE,   Z,   0, f2, 0, f1, mov2, f64, IF_BFP)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 14c3896d529..a40289512da 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2782,7 +2782,8 @@ static DisasJumpType op_ld32u(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_ld64(DisasContext *s, DisasOps *o)
 {
-    tcg_gen_qemu_ld64(o->out, o->in2, get_mem_index(s));
+    tcg_gen_qemu_ld_i64(o->out, o->in2, get_mem_index(s),
+                        MO_TEUQ | s->insn->data);
     return DISAS_NEXT;
 }
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 04/12] target/s390x: Handle LRL and LGFRL from non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (2 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 03/12] target/s390x: Handle LGRL from non-aligned addresses Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 05/12] target/s390x: Handle LLGFRL " Ilya Leoshkevich
                   ` (7 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 14 +++++++-------
 target/s390x/tcg/translate.c     |  3 ++-
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index d439d803509..5aff4c0873a 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -410,12 +410,12 @@
 
 /* LOAD */
     C(0x1800, LR,      RR_a,  Z,   0, r2_o, 0, cond_r1r2_32, mov2, 0)
-    C(0x5800, L,       RX_a,  Z,   0, a2, new, r1_32, ld32s, 0)
-    C(0xe358, LY,      RXY_a, LD,  0, a2, new, r1_32, ld32s, 0)
+    D(0x5800, L,       RX_a,  Z,   0, a2, new, r1_32, ld32s, 0, 0)
+    D(0xe358, LY,      RXY_a, LD,  0, a2, new, r1_32, ld32s, 0, 0)
     C(0xb904, LGR,     RRE,   Z,   0, r2_o, 0, r1, mov2, 0)
     C(0xb914, LGFR,    RRE,   Z,   0, r2_32s, 0, r1, mov2, 0)
     D(0xe304, LG,      RXY_a, Z,   0, a2, r1, 0, ld64, 0, 0)
-    C(0xe314, LGF,     RXY_a, Z,   0, a2, r1, 0, ld32s, 0)
+    D(0xe314, LGF,     RXY_a, Z,   0, a2, r1, 0, ld32s, 0, 0)
     F(0x2800, LDR,     RR_a,  Z,   0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2)
     F(0x6800, LD,      RX_a,  Z,   0, m2_64, 0, f1, mov2, 0, IF_AFP1)
     F(0xed65, LDY,     RXY_a, LD,  0, m2_64, 0, f1, mov2, 0, IF_AFP1)
@@ -426,9 +426,9 @@
 /* LOAD IMMEDIATE */
     C(0xc001, LGFI,    RIL_a, EI,  0, i2, 0, r1, mov2, 0)
 /* LOAD RELATIVE LONG */
-    C(0xc40d, LRL,     RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0)
+    D(0xc40d, LRL,     RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0, MO_ALIGN)
     D(0xc408, LGRL,    RIL_b, GIE, 0, ri2, r1, 0, ld64, 0, MO_ALIGN)
-    C(0xc40c, LGFRL,   RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0)
+    D(0xc40c, LGFRL,   RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0, MO_ALIGN)
 /* LOAD ADDRESS */
     C(0x4100, LA,      RX_a,  Z,   0, a2, 0, r1, mov2, 0)
     C(0xe371, LAY,     RXY_a, LD,  0, a2, 0, r1, mov2, 0)
@@ -456,9 +456,9 @@
     C(0x1200, LTR,     RR_a,  Z,   0, r2_o, 0, cond_r1r2_32, mov2, s32)
     C(0xb902, LTGR,    RRE,   Z,   0, r2_o, 0, r1, mov2, s64)
     C(0xb912, LTGFR,   RRE,   Z,   0, r2_32s, 0, r1, mov2, s64)
-    C(0xe312, LT,      RXY_a, EI,  0, a2, new, r1_32, ld32s, s64)
+    D(0xe312, LT,      RXY_a, EI,  0, a2, new, r1_32, ld32s, s64, 0)
     D(0xe302, LTG,     RXY_a, EI,  0, a2, r1, 0, ld64, s64, 0)
-    C(0xe332, LTGF,    RXY_a, GIE, 0, a2, r1, 0, ld32s, s64)
+    D(0xe332, LTGF,    RXY_a, GIE, 0, a2, r1, 0, ld32s, s64, 0)
     F(0xb302, LTEBR,   RRE,   Z,   0, e2, 0, cond_e1e2, mov2, f32, IF_BFP)
     F(0xb312, LTDBR,   RRE,   Z,   0, f2, 0, f1, mov2, f64, IF_BFP)
     F(0xb342, LTXBR,   RRE,   Z,   x2h, x2l, 0, x1_P, movx, f128, IF_BFP)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index a40289512da..f89e1ce353b 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2770,7 +2770,8 @@ static DisasJumpType op_ld16u(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_ld32s(DisasContext *s, DisasOps *o)
 {
-    tcg_gen_qemu_ld32s(o->out, o->in2, get_mem_index(s));
+    tcg_gen_qemu_ld_tl(o->out, o->in2, get_mem_index(s),
+                       MO_TESL | s->insn->data);
     return DISAS_NEXT;
 }
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 05/12] target/s390x: Handle LLGFRL from non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (3 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 04/12] target/s390x: Handle LRL and LGFRL " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 06/12] target/s390x: Handle CRL and CGFRL with " Ilya Leoshkevich
                   ` (6 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 6 +++---
 target/s390x/tcg/translate.c     | 3 ++-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 5aff4c0873a..3abd2dbedd5 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -502,16 +502,16 @@
     C(0xc405, LHRL,    RIL_b, GIE, 0, ri2, new, r1_32, ld16s, 0)
     C(0xc404, LGHRL,   RIL_b, GIE, 0, ri2, r1, 0, ld16s, 0)
 /* LOAD HIGH */
-    C(0xe3ca, LFH,     RXY_a, HW,  0, a2, new, r1_32h, ld32u, 0)
+    D(0xe3ca, LFH,     RXY_a, HW,  0, a2, new, r1_32h, ld32u, 0, 0)
 /* LOAG HIGH AND TRAP */
     C(0xe3c8, LFHAT,   RXY_a, LAT, 0, m2_32u, r1, 0, lfhat, 0)
 /* LOAD LOGICAL */
     C(0xb916, LLGFR,   RRE,   Z,   0, r2_32u, 0, r1, mov2, 0)
-    C(0xe316, LLGF,    RXY_a, Z,   0, a2, r1, 0, ld32u, 0)
+    D(0xe316, LLGF,    RXY_a, Z,   0, a2, r1, 0, ld32u, 0, 0)
 /* LOAD LOGICAL AND TRAP */
     C(0xe39d, LLGFAT,  RXY_a, LAT, 0, a2, r1, 0, llgfat, 0)
 /* LOAD LOGICAL RELATIVE LONG */
-    C(0xc40e, LLGFRL,  RIL_b, GIE, 0, ri2, r1, 0, ld32u, 0)
+    D(0xc40e, LLGFRL,  RIL_b, GIE, 0, ri2, r1, 0, ld32u, 0, MO_ALIGN)
 /* LOAD LOGICAL CHARACTER */
     C(0xb994, LLCR,    RRE,   EI,  0, r2_8u, 0, r1_32, mov2, 0)
     C(0xb984, LLGCR,   RRE,   EI,  0, r2_8u, 0, r1, mov2, 0)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index f89e1ce353b..1f459f0f2bd 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -2777,7 +2777,8 @@ static DisasJumpType op_ld32s(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_ld32u(DisasContext *s, DisasOps *o)
 {
-    tcg_gen_qemu_ld32u(o->out, o->in2, get_mem_index(s));
+    tcg_gen_qemu_ld_tl(o->out, o->in2, get_mem_index(s),
+                       MO_TEUL | s->insn->data);
     return DISAS_NEXT;
 }
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 06/12] target/s390x: Handle CRL and CGFRL with non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (4 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 05/12] target/s390x: Handle LLGFRL " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 07/12] target/s390x: Handle CGRL and CLGRL " Ilya Leoshkevich
                   ` (5 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/translate.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 1f459f0f2bd..983bb4edc39 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5858,7 +5858,8 @@ static void in2_mri2_16u(DisasContext *s, DisasOps *o)
 static void in2_mri2_32s(DisasContext *s, DisasOps *o)
 {
     o->in2 = tcg_temp_new_i64();
-    tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s));
+    tcg_gen_qemu_ld_tl(o->in2, gen_ri2(s), get_mem_index(s),
+                       MO_TESL | MO_ALIGN);
 }
 #define SPEC_in2_mri2_32s 0
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 07/12] target/s390x: Handle CGRL and CLGRL with non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (5 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 06/12] target/s390x: Handle CRL and CGFRL with " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 08/12] target/s390x: Handle CLRL and CLGFRL " Ilya Leoshkevich
                   ` (4 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/translate.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 983bb4edc39..d3b8126d8c6 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5873,7 +5873,8 @@ static void in2_mri2_32u(DisasContext *s, DisasOps *o)
 static void in2_mri2_64(DisasContext *s, DisasOps *o)
 {
     o->in2 = tcg_temp_new_i64();
-    tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s));
+    tcg_gen_qemu_ld_i64(o->in2, gen_ri2(s), get_mem_index(s),
+                        MO_TEUQ | MO_ALIGN);
 }
 #define SPEC_in2_mri2_64 0
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 08/12] target/s390x: Handle CLRL and CLGFRL with non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (6 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 07/12] target/s390x: Handle CGRL and CLGRL " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 09/12] target/s390x: Handle STRL to " Ilya Leoshkevich
                   ` (3 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/translate.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index d3b8126d8c6..c67f8440db8 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5866,7 +5866,8 @@ static void in2_mri2_32s(DisasContext *s, DisasOps *o)
 static void in2_mri2_32u(DisasContext *s, DisasOps *o)
 {
     o->in2 = tcg_temp_new_i64();
-    tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s));
+    tcg_gen_qemu_ld_tl(o->in2, gen_ri2(s), get_mem_index(s),
+                       MO_TEUL | MO_ALIGN);
 }
 #define SPEC_in2_mri2_32u 0
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 09/12] target/s390x: Handle STRL to non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (7 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 08/12] target/s390x: Handle CLRL and CLGFRL " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 10/12] target/s390x: Handle STGRL " Ilya Leoshkevich
                   ` (2 subsequent siblings)
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 12 ++++++------
 target/s390x/tcg/translate.c     |  3 ++-
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 3abd2dbedd5..30c02b3fcd6 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -840,15 +840,15 @@
     F(0xed15, SQDB,    RXE,   Z,   0, m2_64, new, f1, sqdb, 0, IF_BFP)
 
 /* STORE */
-    C(0x5000, ST,      RX_a,  Z,   r1_o, a2, 0, 0, st32, 0)
-    C(0xe350, STY,     RXY_a, LD,  r1_o, a2, 0, 0, st32, 0)
+    D(0x5000, ST,      RX_a,  Z,   r1_o, a2, 0, 0, st32, 0, 0)
+    D(0xe350, STY,     RXY_a, LD,  r1_o, a2, 0, 0, st32, 0, 0)
     C(0xe324, STG,     RXY_a, Z,   r1_o, a2, 0, 0, st64, 0)
     F(0x6000, STD,     RX_a,  Z,   f1, a2, 0, 0, st64, 0, IF_AFP1)
     F(0xed67, STDY,    RXY_a, LD,  f1, a2, 0, 0, st64, 0, IF_AFP1)
-    F(0x7000, STE,     RX_a,  Z,   e1, a2, 0, 0, st32, 0, IF_AFP1)
-    F(0xed66, STEY,    RXY_a, LD,  e1, a2, 0, 0, st32, 0, IF_AFP1)
+    E(0x7000, STE,     RX_a,  Z,   e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
+    E(0xed66, STEY,    RXY_a, LD,  e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
 /* STORE RELATIVE LONG */
-    C(0xc40f, STRL,    RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0)
+    D(0xc40f, STRL,    RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN)
     C(0xc40b, STGRL,   RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0)
 /* STORE CHARACTER */
     C(0x4200, STC,     RX_a,  Z,   r1_o, a2, 0, 0, st8, 0)
@@ -867,7 +867,7 @@
 /* STORE HALFWORD RELATIVE LONG */
     C(0xc407, STHRL,   RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0)
 /* STORE HIGH */
-    C(0xe3cb, STFH,    RXY_a, HW,  r1_sr32, a2, 0, 0, st32, 0)
+    D(0xe3cb, STFH,    RXY_a, HW,  r1_sr32, a2, 0, 0, st32, 0, 0)
 /* STORE ON CONDITION */
     D(0xebf3, STOC,    RSY_b, LOC, 0, 0, 0, 0, soc, 0, 0)
     D(0xebe3, STOCG,   RSY_b, LOC, 0, 0, 0, 0, soc, 0, 1)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index c67f8440db8..8fd21425dba 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -4370,7 +4370,8 @@ static DisasJumpType op_st16(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_st32(DisasContext *s, DisasOps *o)
 {
-    tcg_gen_qemu_st32(o->in1, o->in2, get_mem_index(s));
+    tcg_gen_qemu_st_tl(o->in1, o->in2, get_mem_index(s),
+                       MO_TEUL | s->insn->data);
     return DISAS_NEXT;
 }
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 10/12] target/s390x: Handle STGRL to non-aligned addresses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (8 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 09/12] target/s390x: Handle STRL to " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 11/12] target/s390x: Update do_unaligned_access() comment Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich,
	Nina Schoetterl-Glausch

Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/insn-data.h.inc | 8 ++++----
 target/s390x/tcg/translate.c     | 3 ++-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc
index 30c02b3fcd6..597d968b0e8 100644
--- a/target/s390x/tcg/insn-data.h.inc
+++ b/target/s390x/tcg/insn-data.h.inc
@@ -842,14 +842,14 @@
 /* STORE */
     D(0x5000, ST,      RX_a,  Z,   r1_o, a2, 0, 0, st32, 0, 0)
     D(0xe350, STY,     RXY_a, LD,  r1_o, a2, 0, 0, st32, 0, 0)
-    C(0xe324, STG,     RXY_a, Z,   r1_o, a2, 0, 0, st64, 0)
-    F(0x6000, STD,     RX_a,  Z,   f1, a2, 0, 0, st64, 0, IF_AFP1)
-    F(0xed67, STDY,    RXY_a, LD,  f1, a2, 0, 0, st64, 0, IF_AFP1)
+    D(0xe324, STG,     RXY_a, Z,   r1_o, a2, 0, 0, st64, 0, 0)
+    E(0x6000, STD,     RX_a,  Z,   f1, a2, 0, 0, st64, 0, 0, IF_AFP1)
+    E(0xed67, STDY,    RXY_a, LD,  f1, a2, 0, 0, st64, 0, 0, IF_AFP1)
     E(0x7000, STE,     RX_a,  Z,   e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
     E(0xed66, STEY,    RXY_a, LD,  e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
 /* STORE RELATIVE LONG */
     D(0xc40f, STRL,    RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN)
-    C(0xc40b, STGRL,   RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0)
+    D(0xc40b, STGRL,   RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0, MO_ALIGN)
 /* STORE CHARACTER */
     C(0x4200, STC,     RX_a,  Z,   r1_o, a2, 0, 0, st8, 0)
     C(0xe372, STCY,    RXY_a, LD,  r1_o, a2, 0, 0, st8, 0)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 8fd21425dba..7626692df22 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -4377,7 +4377,8 @@ static DisasJumpType op_st32(DisasContext *s, DisasOps *o)
 
 static DisasJumpType op_st64(DisasContext *s, DisasOps *o)
 {
-    tcg_gen_qemu_st64(o->in1, o->in2, get_mem_index(s));
+    tcg_gen_qemu_st_i64(o->in1, o->in2, get_mem_index(s),
+                        MO_TEUQ | s->insn->data);
     return DISAS_NEXT;
 }
 
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 11/12] target/s390x: Update do_unaligned_access() comment
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (9 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 10/12] target/s390x: Handle STGRL " Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-16 16:44 ` [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
  11 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich

Relative long instructions now depend on do_unaligned_access() too.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 target/s390x/tcg/excp_helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c
index bc767f04438..cafdef77234 100644
--- a/target/s390x/tcg/excp_helper.c
+++ b/target/s390x/tcg/excp_helper.c
@@ -85,8 +85,8 @@ void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc)
 
 /*
  * Unaligned accesses are only diagnosed with MO_ALIGN.  At the moment,
- * this is only for the atomic operations, for which we want to raise a
- * specification exception.
+ * this is only for the atomic and relative long operations, for which we want
+ * to raise a specification exception.
  */
 static G_NORETURN
 void do_unaligned_access(CPUState *cs, uintptr_t retaddr)
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses
  2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
                   ` (10 preceding siblings ...)
  2023-03-16 16:44 ` [PATCH v4 11/12] target/s390x: Update do_unaligned_access() comment Ilya Leoshkevich
@ 2023-03-16 16:44 ` Ilya Leoshkevich
  2023-03-17  8:43   ` Thomas Huth
  2023-03-17 10:54   ` Thomas Huth
  11 siblings, 2 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-16 16:44 UTC (permalink / raw)
  To: Richard Henderson, David Hildenbrand
  Cc: Thomas Huth, qemu-s390x, qemu-devel, Ilya Leoshkevich

Add a number of small test that check whether accessing unaligned
addresses in various ways leads to a specification exception.

Run these test both in softmmu and user configurations; expect a PGM
in one case and SIGILL in the other.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
 tests/tcg/s390x/Makefile.softmmu-target     | 15 ++++++--
 tests/tcg/s390x/Makefile.target             |  8 +++++
 tests/tcg/s390x/br-odd.S                    | 16 +++++++++
 tests/tcg/s390x/cgrl-unaligned.S            | 16 +++++++++
 tests/tcg/s390x/clrl-unaligned.S            | 16 +++++++++
 tests/tcg/s390x/crl-unaligned.S             | 16 +++++++++
 tests/tcg/s390x/ex-odd.S                    | 17 +++++++++
 tests/tcg/s390x/lgrl-unaligned.S            | 16 +++++++++
 tests/tcg/s390x/llgfrl-unaligned.S          | 16 +++++++++
 tests/tcg/s390x/lpswe-unaligned.S           | 18 ++++++++++
 tests/tcg/s390x/lrl-unaligned.S             | 16 +++++++++
 tests/tcg/s390x/pgm-specification-softmmu.S | 40 +++++++++++++++++++++
 tests/tcg/s390x/pgm-specification-user.c    | 37 +++++++++++++++++++
 tests/tcg/s390x/pgm-specification.mak       | 15 ++++++++
 tests/tcg/s390x/softmmu.ld                  | 20 +++++++++++
 tests/tcg/s390x/stgrl-unaligned.S           | 16 +++++++++
 tests/tcg/s390x/strl-unaligned.S            | 16 +++++++++
 17 files changed, 311 insertions(+), 3 deletions(-)
 create mode 100644 tests/tcg/s390x/br-odd.S
 create mode 100644 tests/tcg/s390x/cgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/clrl-unaligned.S
 create mode 100644 tests/tcg/s390x/crl-unaligned.S
 create mode 100644 tests/tcg/s390x/ex-odd.S
 create mode 100644 tests/tcg/s390x/lgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/llgfrl-unaligned.S
 create mode 100644 tests/tcg/s390x/lpswe-unaligned.S
 create mode 100644 tests/tcg/s390x/lrl-unaligned.S
 create mode 100644 tests/tcg/s390x/pgm-specification-softmmu.S
 create mode 100644 tests/tcg/s390x/pgm-specification-user.c
 create mode 100644 tests/tcg/s390x/pgm-specification.mak
 create mode 100644 tests/tcg/s390x/softmmu.ld
 create mode 100644 tests/tcg/s390x/stgrl-unaligned.S
 create mode 100644 tests/tcg/s390x/strl-unaligned.S

diff --git a/tests/tcg/s390x/Makefile.softmmu-target b/tests/tcg/s390x/Makefile.softmmu-target
index 725b6c598db..6d8bf299b28 100644
--- a/tests/tcg/s390x/Makefile.softmmu-target
+++ b/tests/tcg/s390x/Makefile.softmmu-target
@@ -1,11 +1,20 @@
 S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
 VPATH+=$(S390X_SRC)
 QEMU_OPTS=-action panic=exit-failure -kernel
+LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
+LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
 
-%: %.S
-	$(CC) -march=z13 -m64 -nostdlib -static -Wl,-Ttext=0 \
-		-Wl,--build-id=none $< -o $@
+%.o: %.S
+	$(CC) -march=z13 -m64 -c $< -o $@
+
+%: %.o $(LINK_SCRIPT)
+	$(CC) $< -o $@ $(LDFLAGS)
 
 TESTS += unaligned-lowcore
 TESTS += bal
 TESTS += sam
+
+include $(S390X_SRC)/pgm-specification.mak
+$(PGM_SPECIFICATION_TESTS): pgm-specification-softmmu.o
+$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-softmmu.o
+TESTS += $(PGM_SPECIFICATION_TESTS)
diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
index cf93b966862..1002ab79886 100644
--- a/tests/tcg/s390x/Makefile.target
+++ b/tests/tcg/s390x/Makefile.target
@@ -2,6 +2,9 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
 VPATH+=$(S390X_SRC)
 CFLAGS+=-march=zEC12 -m64
 
+%.o: %.c
+	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
+
 config-cc.mak: Makefile
 	$(quiet-@)( \
 	    $(call cc-option,-march=z14, CROSS_CC_HAS_Z14); \
@@ -33,6 +36,11 @@ TESTS+=chrl
 cdsg: CFLAGS+=-pthread
 cdsg: LDFLAGS+=-pthread
 
+include $(S390X_SRC)/pgm-specification.mak
+$(PGM_SPECIFICATION_TESTS): pgm-specification-user.o
+$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
+TESTS += $(PGM_SPECIFICATION_TESTS)
+
 Z13_TESTS=vistr
 $(Z13_TESTS): CFLAGS+=-march=z13 -O2
 TESTS+=$(Z13_TESTS)
diff --git a/tests/tcg/s390x/br-odd.S b/tests/tcg/s390x/br-odd.S
new file mode 100644
index 00000000000..2fae47a9e34
--- /dev/null
+++ b/tests/tcg/s390x/br-odd.S
@@ -0,0 +1,16 @@
+/*
+ * Test BRanching to a non-mapped odd address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    lgrl %r1,odd_addr
+    br %r1
+
+    .align 8
+odd_addr:
+    .quad 0xDDDDDDDDDDDDDDDD
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,0xDDDDDDDDDDDDDDDD
diff --git a/tests/tcg/s390x/cgrl-unaligned.S b/tests/tcg/s390x/cgrl-unaligned.S
new file mode 100644
index 00000000000..164d68f2e64
--- /dev/null
+++ b/tests/tcg/s390x/cgrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test CGRL with a non-doubleword aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    cgrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .long 0
+unaligned:
+    .quad 0
diff --git a/tests/tcg/s390x/clrl-unaligned.S b/tests/tcg/s390x/clrl-unaligned.S
new file mode 100644
index 00000000000..182b1b6462f
--- /dev/null
+++ b/tests/tcg/s390x/clrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test CLRL with a non-word aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    clrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .short 0
+unaligned:
+    .long 0
diff --git a/tests/tcg/s390x/crl-unaligned.S b/tests/tcg/s390x/crl-unaligned.S
new file mode 100644
index 00000000000..b86fbe0ef3f
--- /dev/null
+++ b/tests/tcg/s390x/crl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test CRL with a non-word aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    crl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .short 0
+unaligned:
+    .long 0
diff --git a/tests/tcg/s390x/ex-odd.S b/tests/tcg/s390x/ex-odd.S
new file mode 100644
index 00000000000..4e42a47df34
--- /dev/null
+++ b/tests/tcg/s390x/ex-odd.S
@@ -0,0 +1,17 @@
+/*
+ * Test EXECUTing a non-mapped odd address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    lgrl %r1,odd_addr
+fail:
+    ex 0,0(%r1)
+
+    .align 8
+odd_addr:
+    .quad 0xDDDDDDDDDDDDDDDD
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,fail
diff --git a/tests/tcg/s390x/lgrl-unaligned.S b/tests/tcg/s390x/lgrl-unaligned.S
new file mode 100644
index 00000000000..ef8d51d47c9
--- /dev/null
+++ b/tests/tcg/s390x/lgrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test LGRL from a non-doubleword aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    lgrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .long 0
+unaligned:
+    .quad 0
diff --git a/tests/tcg/s390x/llgfrl-unaligned.S b/tests/tcg/s390x/llgfrl-unaligned.S
new file mode 100644
index 00000000000..c9b4eeaecf5
--- /dev/null
+++ b/tests/tcg/s390x/llgfrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test LLGFRL from a non-word aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    llgfrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .short 0
+unaligned:
+    .long 0
diff --git a/tests/tcg/s390x/lpswe-unaligned.S b/tests/tcg/s390x/lpswe-unaligned.S
new file mode 100644
index 00000000000..989f249a6ad
--- /dev/null
+++ b/tests/tcg/s390x/lpswe-unaligned.S
@@ -0,0 +1,18 @@
+/*
+ * Test LPSWE from a non-doubleword aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    larl %r1,unaligned
+fail:
+    lpswe 0(%r1)
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,fail
+    .long 0
+unaligned:
+    .quad 0
diff --git a/tests/tcg/s390x/lrl-unaligned.S b/tests/tcg/s390x/lrl-unaligned.S
new file mode 100644
index 00000000000..11eb07f93a7
--- /dev/null
+++ b/tests/tcg/s390x/lrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test LRL from a non-word aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    lrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .short 0
+unaligned:
+    .long 0
diff --git a/tests/tcg/s390x/pgm-specification-softmmu.S b/tests/tcg/s390x/pgm-specification-softmmu.S
new file mode 100644
index 00000000000..d534f4e505d
--- /dev/null
+++ b/tests/tcg/s390x/pgm-specification-softmmu.S
@@ -0,0 +1,40 @@
+/*
+ * Common softmmu code for specification exception testing.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .section .head
+    .org 0x8d
+ilc:
+    .org 0x8e
+program_interruption_code:
+    .org 0x150
+program_old_psw:
+    .org 0x1D0                         /* program new PSW */
+    .quad 0x180000000,pgm              /* 64-bit mode */
+    .org 0x200                         /* lowcore padding */
+
+    .globl _start
+_start:
+    lpswe test_psw
+
+pgm:
+    chhsi program_interruption_code,0x6          /* PGM_SPECIFICATION? */
+    jne failure
+    lg %r0,expected_old_psw+8                    /* ilc adjustment */
+    llgc %r1,ilc
+    agr %r0,%r1
+    stg %r0,expected_old_psw+8
+    clc expected_old_psw(16),program_old_psw     /* correct location? */
+    jne failure
+    lpswe success_psw
+failure:
+    lpswe failure_psw
+
+    .align 8
+test_psw:
+    .quad 0x180000000,test             /* 64-bit mode */
+success_psw:
+    .quad 0x2000180000000,0xfff        /* see is_special_wait_psw() */
+failure_psw:
+    .quad 0x2000180000000,0            /* disabled wait */
diff --git a/tests/tcg/s390x/pgm-specification-user.c b/tests/tcg/s390x/pgm-specification-user.c
new file mode 100644
index 00000000000..9ee6907b7c2
--- /dev/null
+++ b/tests/tcg/s390x/pgm-specification-user.c
@@ -0,0 +1,37 @@
+/*
+ * Common user code for specification exception testing.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include <assert.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+extern void test(void);
+extern long expected_old_psw[2];
+
+static void handle_sigill(int sig, siginfo_t *info, void *ucontext)
+{
+    if ((long)info->si_addr != expected_old_psw[1]) {
+        _exit(EXIT_FAILURE);
+    }
+    _exit(EXIT_SUCCESS);
+}
+
+int main(void)
+{
+    struct sigaction act;
+    int err;
+
+    memset(&act, 0, sizeof(act));
+    act.sa_sigaction = handle_sigill;
+    act.sa_flags = SA_SIGINFO;
+    err = sigaction(SIGILL, &act, NULL);
+    assert(err == 0);
+
+    test();
+
+    return EXIT_FAILURE;
+}
diff --git a/tests/tcg/s390x/pgm-specification.mak b/tests/tcg/s390x/pgm-specification.mak
new file mode 100644
index 00000000000..2999aee26e6
--- /dev/null
+++ b/tests/tcg/s390x/pgm-specification.mak
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# List of specification exception tests.
+# Shared between the softmmu and the user makefiles.
+PGM_SPECIFICATION_TESTS = \
+	br-odd \
+	cgrl-unaligned \
+	clrl-unaligned \
+	crl-unaligned \
+	ex-odd \
+	lgrl-unaligned \
+	llgfrl-unaligned \
+	lpswe-unaligned \
+	lrl-unaligned \
+	stgrl-unaligned \
+	strl-unaligned
diff --git a/tests/tcg/s390x/softmmu.ld b/tests/tcg/s390x/softmmu.ld
new file mode 100644
index 00000000000..ea944eaa3cb
--- /dev/null
+++ b/tests/tcg/s390x/softmmu.ld
@@ -0,0 +1,20 @@
+/*
+ * Linker script for the softmmu test kernels.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+ENTRY(_start)
+
+SECTIONS {
+    . = 0;
+
+    .text : {
+        *(.head)
+        *(.text)
+    }
+
+    /DISCARD/ : {
+        *(*)
+    }
+}
diff --git a/tests/tcg/s390x/stgrl-unaligned.S b/tests/tcg/s390x/stgrl-unaligned.S
new file mode 100644
index 00000000000..32df37780ad
--- /dev/null
+++ b/tests/tcg/s390x/stgrl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test STGRL to a non-doubleword aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    stgrl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .long 0
+unaligned:
+    .quad 0
diff --git a/tests/tcg/s390x/strl-unaligned.S b/tests/tcg/s390x/strl-unaligned.S
new file mode 100644
index 00000000000..1d248819f02
--- /dev/null
+++ b/tests/tcg/s390x/strl-unaligned.S
@@ -0,0 +1,16 @@
+/*
+ * Test STRL to a non-word aligned address.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+    .globl test
+test:
+    strl %r1,unaligned
+
+    .align 8
+    .globl expected_old_psw
+expected_old_psw:
+    .quad 0x180000000,test
+    .short 0
+unaligned:
+    .long 0
-- 
2.39.2



^ permalink raw reply related	[flat|nested] 17+ messages in thread
* Re: [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses
  2023-03-16 16:44 ` [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
@ 2023-03-17  8:43   ` Thomas Huth
  2023-03-17 10:54   ` Thomas Huth
  1 sibling, 0 replies; 17+ messages in thread
From: Thomas Huth @ 2023-03-17  8:43 UTC (permalink / raw)
  To: Ilya Leoshkevich, Richard Henderson, David Hildenbrand
  Cc: qemu-s390x, qemu-devel

On 16/03/2023 17.44, Ilya Leoshkevich wrote:
> Add a number of small test that check whether accessing unaligned
> addresses in various ways leads to a specification exception.
> 
> Run these test both in softmmu and user configurations; expect a PGM
> in one case and SIGILL in the other.
> 
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---

Thanks for reworking this! It looks much nicer now, indeed!

Reviewed-by: Thomas Huth <thuth@redhat.com>



^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses
  2023-03-16 16:44 ` [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
  2023-03-17  8:43   ` Thomas Huth
@ 2023-03-17 10:54   ` Thomas Huth
  2023-03-17 11:00     ` Thomas Huth
  1 sibling, 1 reply; 17+ messages in thread
From: Thomas Huth @ 2023-03-17 10:54 UTC (permalink / raw)
  To: Ilya Leoshkevich, Richard Henderson, David Hildenbrand
  Cc: qemu-s390x, qemu-devel

On 16/03/2023 17.44, Ilya Leoshkevich wrote:
> Add a number of small test that check whether accessing unaligned
> addresses in various ways leads to a specification exception.
> 
> Run these test both in softmmu and user configurations; expect a PGM
> in one case and SIGILL in the other.
> 
> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> ---
...
> diff --git a/tests/tcg/s390x/Makefile.softmmu-target b/tests/tcg/s390x/Makefile.softmmu-target
> index 725b6c598db..6d8bf299b28 100644
> --- a/tests/tcg/s390x/Makefile.softmmu-target
> +++ b/tests/tcg/s390x/Makefile.softmmu-target
> @@ -1,11 +1,20 @@
>   S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
>   VPATH+=$(S390X_SRC)
>   QEMU_OPTS=-action panic=exit-failure -kernel
> +LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
> +LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
>   
> -%: %.S
> -	$(CC) -march=z13 -m64 -nostdlib -static -Wl,-Ttext=0 \
> -		-Wl,--build-id=none $< -o $@
> +%.o: %.S
> +	$(CC) -march=z13 -m64 -c $< -o $@
> +
> +%: %.o $(LINK_SCRIPT)
> +	$(CC) $< -o $@ $(LDFLAGS)
>   
>   TESTS += unaligned-lowcore
>   TESTS += bal
>   TESTS += sam
> +
> +include $(S390X_SRC)/pgm-specification.mak
> +$(PGM_SPECIFICATION_TESTS): pgm-specification-softmmu.o
> +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-softmmu.o
> +TESTS += $(PGM_SPECIFICATION_TESTS)
> diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target
> index cf93b966862..1002ab79886 100644
> --- a/tests/tcg/s390x/Makefile.target
> +++ b/tests/tcg/s390x/Makefile.target
> @@ -2,6 +2,9 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
>   VPATH+=$(S390X_SRC)
>   CFLAGS+=-march=zEC12 -m64
>   
> +%.o: %.c
> +	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
> +
>   config-cc.mak: Makefile
>   	$(quiet-@)( \
>   	    $(call cc-option,-march=z14, CROSS_CC_HAS_Z14); \
> @@ -33,6 +36,11 @@ TESTS+=chrl
>   cdsg: CFLAGS+=-pthread
>   cdsg: LDFLAGS+=-pthread
>   
> +include $(S390X_SRC)/pgm-specification.mak
> +$(PGM_SPECIFICATION_TESTS): pgm-specification-user.o
> +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
> +TESTS += $(PGM_SPECIFICATION_TESTS)
...
> diff --git a/tests/tcg/s390x/softmmu.ld b/tests/tcg/s390x/softmmu.ld
> new file mode 100644
> index 00000000000..ea944eaa3cb
> --- /dev/null
> +++ b/tests/tcg/s390x/softmmu.ld
> @@ -0,0 +1,20 @@
> +/*
> + * Linker script for the softmmu test kernels.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +ENTRY(_start)
> +
> +SECTIONS {
> +    . = 0;
> +
> +    .text : {
> +        *(.head)
> +        *(.text)
> +    }
> +
> +    /DISCARD/ : {
> +        *(*)
> +    }
> +}

I just gave it a try, and while it's basically working, I see a lot of these 
messages in the console:

/usr/bin/ld: warning: .note.gnu.build-id section discarded, --build-id ignored

I think you should either pass --build-id=none to the linker, or add a 
.note.gnu.build-id section to the linker script?

  Thomas



^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses
  2023-03-17 10:54   ` Thomas Huth
@ 2023-03-17 11:00     ` Thomas Huth
  2023-03-17 11:02       ` Ilya Leoshkevich
  0 siblings, 1 reply; 17+ messages in thread
From: Thomas Huth @ 2023-03-17 11:00 UTC (permalink / raw)
  To: Ilya Leoshkevich, Richard Henderson, David Hildenbrand
  Cc: qemu-s390x, qemu-devel

On 17/03/2023 11.54, Thomas Huth wrote:
> On 16/03/2023 17.44, Ilya Leoshkevich wrote:
>> Add a number of small test that check whether accessing unaligned
>> addresses in various ways leads to a specification exception.
>>
>> Run these test both in softmmu and user configurations; expect a PGM
>> in one case and SIGILL in the other.
>>
>> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
>> ---
> ...
>> diff --git a/tests/tcg/s390x/Makefile.softmmu-target 
>> b/tests/tcg/s390x/Makefile.softmmu-target
>> index 725b6c598db..6d8bf299b28 100644
>> --- a/tests/tcg/s390x/Makefile.softmmu-target
>> +++ b/tests/tcg/s390x/Makefile.softmmu-target
>> @@ -1,11 +1,20 @@
>>   S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
>>   VPATH+=$(S390X_SRC)
>>   QEMU_OPTS=-action panic=exit-failure -kernel
>> +LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
>> +LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
>> -%: %.S
>> -    $(CC) -march=z13 -m64 -nostdlib -static -Wl,-Ttext=0 \
>> -        -Wl,--build-id=none $< -o $@
>> +%.o: %.S
>> +    $(CC) -march=z13 -m64 -c $< -o $@
>> +
>> +%: %.o $(LINK_SCRIPT)
>> +    $(CC) $< -o $@ $(LDFLAGS)
>>   TESTS += unaligned-lowcore
>>   TESTS += bal
>>   TESTS += sam
>> +
>> +include $(S390X_SRC)/pgm-specification.mak
>> +$(PGM_SPECIFICATION_TESTS): pgm-specification-softmmu.o
>> +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-softmmu.o
>> +TESTS += $(PGM_SPECIFICATION_TESTS)
>> diff --git a/tests/tcg/s390x/Makefile.target 
>> b/tests/tcg/s390x/Makefile.target
>> index cf93b966862..1002ab79886 100644
>> --- a/tests/tcg/s390x/Makefile.target
>> +++ b/tests/tcg/s390x/Makefile.target
>> @@ -2,6 +2,9 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
>>   VPATH+=$(S390X_SRC)
>>   CFLAGS+=-march=zEC12 -m64
>> +%.o: %.c
>> +    $(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
>> +
>>   config-cc.mak: Makefile
>>       $(quiet-@)( \
>>           $(call cc-option,-march=z14, CROSS_CC_HAS_Z14); \
>> @@ -33,6 +36,11 @@ TESTS+=chrl
>>   cdsg: CFLAGS+=-pthread
>>   cdsg: LDFLAGS+=-pthread
>> +include $(S390X_SRC)/pgm-specification.mak
>> +$(PGM_SPECIFICATION_TESTS): pgm-specification-user.o
>> +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
>> +TESTS += $(PGM_SPECIFICATION_TESTS)
> ...
>> diff --git a/tests/tcg/s390x/softmmu.ld b/tests/tcg/s390x/softmmu.ld
>> new file mode 100644
>> index 00000000000..ea944eaa3cb
>> --- /dev/null
>> +++ b/tests/tcg/s390x/softmmu.ld
>> @@ -0,0 +1,20 @@
>> +/*
>> + * Linker script for the softmmu test kernels.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0-or-later
>> + */
>> +
>> +ENTRY(_start)
>> +
>> +SECTIONS {
>> +    . = 0;
>> +
>> +    .text : {
>> +        *(.head)
>> +        *(.text)
>> +    }
>> +
>> +    /DISCARD/ : {
>> +        *(*)
>> +    }
>> +}
> 
> I just gave it a try, and while it's basically working, I see a lot of these 
> messages in the console:
> 
> /usr/bin/ld: warning: .note.gnu.build-id section discarded, --build-id ignored
> 
> I think you should either pass --build-id=none to the linker, or add a 
> .note.gnu.build-id section to the linker script?

This seems to work:

diff --git a/tests/tcg/s390x/Makefile.softmmu-target b/tests/tcg/s390x/Makefile.softmmu-target
--- a/tests/tcg/s390x/Makefile.softmmu-target
+++ b/tests/tcg/s390x/Makefile.softmmu-target
@@ -2,7 +2,7 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
  VPATH+=$(S390X_SRC)
  QEMU_OPTS=-action panic=exit-failure -kernel
  LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
-LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
+LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT) -Wl,--build-id=none
  
  %.o: %.S
         $(CC) -march=z13 -m64 -c $< -o $@

I'll squash that in ... no need to resend.

  Thomas



^ permalink raw reply	[flat|nested] 17+ messages in thread
* Re: [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses
  2023-03-17 11:00     ` Thomas Huth
@ 2023-03-17 11:02       ` Ilya Leoshkevich
  0 siblings, 0 replies; 17+ messages in thread
From: Ilya Leoshkevich @ 2023-03-17 11:02 UTC (permalink / raw)
  To: Thomas Huth, Richard Henderson, David Hildenbrand; +Cc: qemu-s390x, qemu-devel

On Fri, 2023-03-17 at 12:00 +0100, Thomas Huth wrote:
> On 17/03/2023 11.54, Thomas Huth wrote:
> > On 16/03/2023 17.44, Ilya Leoshkevich wrote:
> > > Add a number of small test that check whether accessing unaligned
> > > addresses in various ways leads to a specification exception.
> > > 
> > > Run these test both in softmmu and user configurations; expect a
> > > PGM
> > > in one case and SIGILL in the other.
> > > 
> > > Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
> > > ---
> > ...
> > > diff --git a/tests/tcg/s390x/Makefile.softmmu-target 
> > > b/tests/tcg/s390x/Makefile.softmmu-target
> > > index 725b6c598db..6d8bf299b28 100644
> > > --- a/tests/tcg/s390x/Makefile.softmmu-target
> > > +++ b/tests/tcg/s390x/Makefile.softmmu-target
> > > @@ -1,11 +1,20 @@
> > >   S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
> > >   VPATH+=$(S390X_SRC)
> > >   QEMU_OPTS=-action panic=exit-failure -kernel
> > > +LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
> > > +LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
> > > -%: %.S
> > > -    $(CC) -march=z13 -m64 -nostdlib -static -Wl,-Ttext=0 \
> > > -        -Wl,--build-id=none $< -o $@
> > > +%.o: %.S
> > > +    $(CC) -march=z13 -m64 -c $< -o $@
> > > +
> > > +%: %.o $(LINK_SCRIPT)
> > > +    $(CC) $< -o $@ $(LDFLAGS)
> > >   TESTS += unaligned-lowcore
> > >   TESTS += bal
> > >   TESTS += sam
> > > +
> > > +include $(S390X_SRC)/pgm-specification.mak
> > > +$(PGM_SPECIFICATION_TESTS): pgm-specification-softmmu.o
> > > +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-softmmu.o
> > > +TESTS += $(PGM_SPECIFICATION_TESTS)
> > > diff --git a/tests/tcg/s390x/Makefile.target 
> > > b/tests/tcg/s390x/Makefile.target
> > > index cf93b966862..1002ab79886 100644
> > > --- a/tests/tcg/s390x/Makefile.target
> > > +++ b/tests/tcg/s390x/Makefile.target
> > > @@ -2,6 +2,9 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
> > >   VPATH+=$(S390X_SRC)
> > >   CFLAGS+=-march=zEC12 -m64
> > > +%.o: %.c
> > > +    $(CC) $(CFLAGS) $(EXTRA_CFLAGS) -c $< -o $@
> > > +
> > >   config-cc.mak: Makefile
> > >       $(quiet-@)( \
> > >           $(call cc-option,-march=z14, CROSS_CC_HAS_Z14); \
> > > @@ -33,6 +36,11 @@ TESTS+=chrl
> > >   cdsg: CFLAGS+=-pthread
> > >   cdsg: LDFLAGS+=-pthread
> > > +include $(S390X_SRC)/pgm-specification.mak
> > > +$(PGM_SPECIFICATION_TESTS): pgm-specification-user.o
> > > +$(PGM_SPECIFICATION_TESTS): LDFLAGS+=pgm-specification-user.o
> > > +TESTS += $(PGM_SPECIFICATION_TESTS)
> > ...
> > > diff --git a/tests/tcg/s390x/softmmu.ld
> > > b/tests/tcg/s390x/softmmu.ld
> > > new file mode 100644
> > > index 00000000000..ea944eaa3cb
> > > --- /dev/null
> > > +++ b/tests/tcg/s390x/softmmu.ld
> > > @@ -0,0 +1,20 @@
> > > +/*
> > > + * Linker script for the softmmu test kernels.
> > > + *
> > > + * SPDX-License-Identifier: GPL-2.0-or-later
> > > + */
> > > +
> > > +ENTRY(_start)
> > > +
> > > +SECTIONS {
> > > +    . = 0;
> > > +
> > > +    .text : {
> > > +        *(.head)
> > > +        *(.text)
> > > +    }
> > > +
> > > +    /DISCARD/ : {
> > > +        *(*)
> > > +    }
> > > +}
> > 
> > I just gave it a try, and while it's basically working, I see a lot
> > of these 
> > messages in the console:
> > 
> > /usr/bin/ld: warning: .note.gnu.build-id section discarded, --
> > build-id ignored
> > 
> > I think you should either pass --build-id=none to the linker, or
> > add a 
> > .note.gnu.build-id section to the linker script?
> 
> This seems to work:
> 
> diff --git a/tests/tcg/s390x/Makefile.softmmu-target
> b/tests/tcg/s390x/Makefile.softmmu-target
> --- a/tests/tcg/s390x/Makefile.softmmu-target
> +++ b/tests/tcg/s390x/Makefile.softmmu-target
> @@ -2,7 +2,7 @@ S390X_SRC=$(SRC_PATH)/tests/tcg/s390x
>   VPATH+=$(S390X_SRC)
>   QEMU_OPTS=-action panic=exit-failure -kernel
>   LINK_SCRIPT=$(S390X_SRC)/softmmu.ld
> -LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT)
> +LDFLAGS=-nostdlib -static -Wl,-T$(LINK_SCRIPT) -Wl,--build-id=none
>   
>   %.o: %.S
>          $(CC) -march=z13 -m64 -c $< -o $@
> 
> I'll squash that in ... no need to resend.
> 
>   Thomas

Thanks! The Makefile used to have this, but I thought that the linker
script would replace this (since it /DISCARD/s the build id), and I did
not notice the warnings.

Your diff looks good to me.


^ permalink raw reply	[flat|nested] 17+ messages in thread
end of thread, other threads:[~2023-03-17 11:03 UTC | newest]

Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-16 16:44 [PATCH v4 00/12] target/s390x: Handle unaligned accesses Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 01/12] target/s390x: Handle branching to odd addresses Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 02/12] target/s390x: Handle EXECUTE of " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 03/12] target/s390x: Handle LGRL from non-aligned addresses Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 04/12] target/s390x: Handle LRL and LGFRL " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 05/12] target/s390x: Handle LLGFRL " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 06/12] target/s390x: Handle CRL and CGFRL with " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 07/12] target/s390x: Handle CGRL and CLGRL " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 08/12] target/s390x: Handle CLRL and CLGFRL " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 09/12] target/s390x: Handle STRL to " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 10/12] target/s390x: Handle STGRL " Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 11/12] target/s390x: Update do_unaligned_access() comment Ilya Leoshkevich
2023-03-16 16:44 ` [PATCH v4 12/12] tests/tcg/s390x: Test unaligned accesses Ilya Leoshkevich
2023-03-17  8:43   ` Thomas Huth
2023-03-17 10:54   ` Thomas Huth
2023-03-17 11:00     ` Thomas Huth
2023-03-17 11:02       ` Ilya Leoshkevich

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