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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Michael Tsirkin <mst@redhat.com>, <qemu-devel@nongnu.org>
Cc: <linuxarm@huawei.com>, Fan Ni <fan.ni@samsung.com>,
	Dave Jiang <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>
Subject: [RESEND PATCH 0/2] hw/cxl: Fix decoder commit and uncommit handling
Date: Wed, 22 Mar 2023 10:27:29 +0000	[thread overview]
Message-ID: <20230322102731.4219-1-Jonathan.Cameron@huawei.com> (raw)

Resending because all but patch 1 seem to have failed to make it out of
our network.

Issue reported in discussion of:
https://lore.kernel.org/all/20230228224014.1402545-1-fan.ni@samsung.com/

The committed bit for HDM decoders is expected reset when commit transitions
from 1->0.  Whilst looking at that it was noticed that hardware was resetting
the commit bit which is not an option allowed by the CXL spec.

In common with many other areas the code did not take into account
big endian architectures, so fix that whilst we are here.

Note testing this exposed a kernel bug around repeated attempts to clear
a decoder out of order. That's been reported but not yet fixed.

Jonathan Cameron (2):
  hw/cxl: Fix endian handling for decoder commit.
  hw/cxl: Fix incorrect reset of commit and associated clearing of
    committed.

 hw/cxl/cxl-component-utils.c | 14 ++++++++------
 hw/mem/cxl_type3.c           | 28 +++++++++++++++++++++++++---
 2 files changed, 33 insertions(+), 9 deletions(-)

-- 
2.37.2


WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: Michael Tsirkin <mst@redhat.com>, <qemu-devel@nongnu.org>
Cc: <linuxarm@huawei.com>, Fan Ni <fan.ni@samsung.com>,
	Dave Jiang <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>
Subject: [RESEND PATCH 0/2] hw/cxl: Fix decoder commit and uncommit handling
Date: Wed, 22 Mar 2023 10:27:29 +0000	[thread overview]
Message-ID: <20230322102731.4219-1-Jonathan.Cameron@huawei.com> (raw)

Resending because all but patch 1 seem to have failed to make it out of
our network.

Issue reported in discussion of:
https://lore.kernel.org/all/20230228224014.1402545-1-fan.ni@samsung.com/

The committed bit for HDM decoders is expected reset when commit transitions
from 1->0.  Whilst looking at that it was noticed that hardware was resetting
the commit bit which is not an option allowed by the CXL spec.

In common with many other areas the code did not take into account
big endian architectures, so fix that whilst we are here.

Note testing this exposed a kernel bug around repeated attempts to clear
a decoder out of order. That's been reported but not yet fixed.

Jonathan Cameron (2):
  hw/cxl: Fix endian handling for decoder commit.
  hw/cxl: Fix incorrect reset of commit and associated clearing of
    committed.

 hw/cxl/cxl-component-utils.c | 14 ++++++++------
 hw/mem/cxl_type3.c           | 28 +++++++++++++++++++++++++---
 2 files changed, 33 insertions(+), 9 deletions(-)

-- 
2.37.2



             reply	other threads:[~2023-03-22 10:27 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22 10:27 Jonathan Cameron [this message]
2023-03-22 10:27 ` [RESEND PATCH 0/2] hw/cxl: Fix decoder commit and uncommit handling Jonathan Cameron via
2023-03-22 10:27 ` [RESEND PATCH 1/2] hw/cxl: Fix endian handling for decoder commit Jonathan Cameron
2023-03-22 10:27   ` Jonathan Cameron via
2023-03-22 10:34   ` Philippe Mathieu-Daudé
2023-03-22 10:27 ` [RESEND PATCH 2/2] hw/cxl: Fix incorrect reset of commit and associated clearing of committed Jonathan Cameron
2023-03-22 10:27   ` Jonathan Cameron via
2023-03-22 10:33 ` Jonathan Cameron
2023-03-22 10:33   ` Jonathan Cameron via
2023-03-22 16:21   ` Fan Ni
2023-03-24 14:01     ` Jonathan Cameron
2023-03-24 14:01       ` Jonathan Cameron via
2023-03-24 17:05   ` Dave Jiang

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