From: Weiwei Li <liweiwei@iscas.ac.cn>
To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Cc: palmer@dabbelt.com, alistair.francis@wdc.com,
bin.meng@windriver.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, wangjunqiang@iscas.ac.cn,
lazyparser@gmail.com, Weiwei Li <liweiwei@iscas.ac.cn>
Subject: [PATCH 0/8] target/riscv: Simplification for RVH related check and code style fix
Date: Fri, 24 Mar 2023 20:38:01 +0800 [thread overview]
Message-ID: <20230324123809.107714-1-liweiwei@iscas.ac.cn> (raw)
This patchset tries to simplify the RVH related check and fix some code style problems, such as problems for indentation, multi-line comments and lines with over 80 characters.
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-cleanup-upstream
Weiwei Li (8):
target/riscv: Remove redundant call to riscv_cpu_virt_enabled
target/riscv: Remove redundant check on RVH
target/riscv: Remove check on RVH for riscv_cpu_virt_enabled
target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled
target/riscv: Remove redundant parentheses
target/riscv: Fix format for indentation
target/riscv: Fix format for comments
target/riscv: Fix lines with over 80 characters
target/riscv/arch_dump.c | 7 +-
target/riscv/cpu.c | 6 +-
target/riscv/cpu.h | 26 ++-
target/riscv/cpu_bits.h | 2 +-
target/riscv/cpu_helper.c | 86 ++++---
target/riscv/csr.c | 6 +-
target/riscv/insn_trans/trans_rvv.c.inc | 54 ++---
target/riscv/op_helper.c | 7 +-
target/riscv/pmp.c | 48 ++--
target/riscv/pmp.h | 9 +-
target/riscv/pmu.c | 3 +-
target/riscv/sbi_ecall_interface.h | 8 +-
target/riscv/translate.c | 8 +-
target/riscv/vector_helper.c | 292 ++++++++++++++----------
14 files changed, 316 insertions(+), 246 deletions(-)
--
2.25.1
next reply other threads:[~2023-03-24 15:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-24 12:38 Weiwei Li [this message]
2023-03-24 12:38 ` [PATCH 1/8] target/riscv: Remove redundant call to riscv_cpu_virt_enabled Weiwei Li
2023-03-24 18:04 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 2/8] target/riscv: Remove redundant check on RVH Weiwei Li
2023-03-24 18:04 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 3/8] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled Weiwei Li
2023-03-24 18:05 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 4/8] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled Weiwei Li
2023-03-24 18:10 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 5/8] target/riscv: Remove redundant parentheses Weiwei Li
2023-03-24 18:10 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 6/8] target/riscv: Fix format for indentation Weiwei Li
2023-03-25 14:23 ` LIU Zhiwei
2023-03-26 12:38 ` liweiwei
2023-03-24 12:38 ` [PATCH 7/8] target/riscv: Fix format for comments Weiwei Li
2023-03-24 18:12 ` Richard Henderson
2023-03-24 12:38 ` [PATCH 8/8] target/riscv: Fix lines with over 80 characters Weiwei Li
2023-03-25 15:05 ` [PATCH 0/8] target/riscv: Simplification for RVH related check and code style fix LIU Zhiwei
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